NVIDIA today announced it is turbocharging the NVIDIA HGX AI supercomputing platform with new technologies that fuse AI with high performance computing, making supercomputing more useful to a growing number of industries.

To accelerate the new era of industrial AI and HPC, NVIDIA has added three key technologies to its HGX platform: the NVIDIA A100 80 GB PCIe GPU, NVIDIA NDR 400G InfiniBand networking, and NVIDIA Magnum IO GPUDirect Storage software. Together, they provide the extreme performance to enable industrial HPC innovation.

Colorful Technology Company Limited, a professional manufacturer of graphics cards, motherboards, all-in-one gaming and multimedia solutions, and high-performance storage, announces the launch of the GPU History Museum in partnership with NVIDIA. COLORFUL has recently relocated to Shenzhen New Generation Industrial Park. With that, COLORFUL is proud to announce the launch of the first GPU History Museum in China. The museum will showcase the beginnings of the Graphics Processing Unit (GPU), to the development and evolution of graphics cards up to the present generation.

Intel will detail its 12th Gen Core "Alder Lake" client and "Sapphire Rapids" server CPU microarchitectures at the Hot Chips 33 conclave, this August. In fact, Intel's presentation leads the CPU sessions on the opening day of August 23. "Alder Lake" will be the session opener, followed by AMD's presentation of the already-launched "Zen 3," and IBM's 5 GHz Z processor powering its next-gen mainframes. A talk on Xeon "Sapphire Rapids" follows this. Hot Chips is predominantly an engineering conclave, where highly technical sessions are presented by engineers from major semiconductor firms; and so the sessions on "Alder Lake" and "Sapphire Rapids" are expected to be very juicy.

"Alder Lake" is Intel's attempt at changing the PC ecosystem by introducing hybrid CPU cores, a concept introduced to the x86 machine architecture with "Lakefield." The processor will also support next-generation I/O, such as DDR5 memory. The "Sapphire Rapids" server CPU microarchitecture will see an increase in CPU core counts, next-gen I/O such as PCI-Express 5.0, CXL 1.1, DDR5 memory, and more.

IBM today unveiled a breakthrough in semiconductor design and process with the development of the world's first chip announced with 2 nanometer (nm) nanosheet technology. Semiconductors play critical roles in everything from computing, to appliances, to communication devices, transportation systems, and critical infrastructure.

Demand for increased chip performance and energy efficiency continues to rise, especially in the era of hybrid cloud, AI, and the Internet of Things. IBM's new 2 nm chip technology helps advance the state-of-the-art in the semiconductor industry, addressing this growing demand. It is projected to achieve 45 percent higher performance, or 75 percent lower energy use, than today's most advanced 7 nm node chips.

We saw the modified Nintendo Game Boy last month which could crank out Bitcoins at a blistering 0.8 hashes per second or ~125 trillion times slower than a modern Bitcoin ASIC miner. If you are searching for something a bit more modest than the Game Boy take a look at the Commodore 64 which has been modded to achieve a Bitcoin mining rate of 0.3 hashes per second. The Commodore 64 was released by IBM in 1982 featuring the MOS Technology 6510 processor clocked at 1.023 MHz and paired with 64 KB RAM and 20 KB ROM.

While the Commodore currently falls behind the Game Boy there is hope on the horizon with the creator of the program claiming a 10x performance improvement to over 3 hashes per second is possible by re-writing the code in machine language. The commodore 64 can be further upgraded with the SuperCPU upgrade which boosts mining speeds to over 60 hashes per second completely destroying the Game Boy but still falling just short of the latest ASIC miners at ~18,000,000,000,000 hashes per second. Obviously, this demonstration was not meant as a practical application but it is interesting to see how cryptocurrency mining can be implemented on older hardware and the amazing rate of technological advancement we have seen over the last 40 years.

Magnetic tape storage is one of the oldest technologies used for storing data. The technology was invented way back in 1928, and it is almost 100 years old. By today's standards, the technology is considered to be slow, however, it offers something that no modern HDD or SDD offers. Today, in collaboration with Fujifilm, IBM has developed a Strontium Ferrite (SrFe) magnetic layer for LTO-8 tapes that are capable of storing an amazing 580 TeraBytes of data in a single cartridge. The new technology will enable the modern world to store ever-increasing data sizes we are now counting in zettabytes. To store all of that data, one would need a high-capacity storage device to store all of the "cold data" that doesn't need real-time processing and has information of value.

That is exactly why IBM and Fujifilm have been developing the LTO-8 tape drives that are capable of 580 TB of capacity in a single cartridge. The technology can achieve that capacity thanks to the Strontium Ferrite (SrFe), which is capable of 317Gb/in2 recording density. With 1255 meters of the tape, IBM and Fujifilm have been able to achieve this density metric.

The 56th edition of the TOP500 saw the Japanese Fugaku supercomputer solidify its number one status in a list that reflects a flattening performance growth curve. Although two new systems managed to make it into the top 10, the full list recorded the smallest number of new entries since the project began in 1993.

The entry level to the list moved up to 1.32 petaflops on the High Performance Linpack (HPL) benchmark, a small increase from 1.23 petaflops recorded in the June 2020 rankings. In a similar vein, the aggregate performance of all 500 systems grew from 2.22 exaflops in June to just 2.43 exaflops on the latest list. Likewise, average concurrency per system barely increased at all, growing from 145,363 cores six months ago to 145,465 cores in the current list.

NVIDIA today introduced the next generation of NVIDIA Mellanox 400G InfiniBand, giving AI developers and scientific researchers the fastest networking performance available to take on the world's most challenging problems.

As computing requirements continue to grow exponentially in areas such as drug discovery, climate research and genomics, NVIDIA Mellanox 400G InfiniBand is accelerating this work through a dramatic leap in performance offered on the world's only fully offloadable, in-network computing platform. The seventh generation of Mellanox InfiniBand provides ultra-low latency and doubles data throughput with NDR 400 Gb/s and adds new NVIDIA In-Network Computing engines to provide additional acceleration.

Today, IBM has unveiled a new milestone on its quantum computing road map, achieving the company's highest Quantum Volume to date. Combining a series of new software and hardware techniques to improve overall performance, IBM has upgraded one of its newest 27-qubit client-deployed systems to achieve a Quantum Volume 64. The company has made a total of 28 quantum computers available over the last four years through IBM Quantum Experience.

In order to achieve a Quantum Advantage, the point where certain information processing tasks can be performed more efficiently or cost effectively on a quantum computer, versus a classical one, it will require improved quantum circuits, the building blocks of quantum applications. Quantum Volume measures the length and complexity of circuits - the higher the Quantum Volume, the higher the potential for exploring solutions to real world problems across industry, government, and research.

To achieve this milestone, the company focused on a new set of techniques and improvements that used knowledge of the hardware to optimally run the Quantum Volume circuits. These hardware-aware methods are extensible and will improve any quantum circuit run on any IBM Quantum system, resulting in improvements to the experiments and applications which users can explore. These techniques will be available in upcoming releases and improvements to the IBM Cloud software services and the cross-platform open source software development kit (SDK) Qiskit.

IBM today revealed the next generation of its IBM POWER central processing unit (CPU) family: IBM POWER10. Designed to offer a platform to meet the unique needs of enterprise hybrid cloud computing, the IBM POWER10 processor uses a design focused on energy efficiency and performance in a 7 nm form factor with an expected improvement of up to 3x greater processor energy efficiency, workload capacity, and container density than the IBM POWER9 processor.

Designed over five years with hundreds of new and pending patents, the IBM POWER10 processor is an important evolution in IBM's roadmap for POWER. Systems taking advantage of IBM POWER10 are expected to be available in the second half of 2021. Some of the new processor innovations include:

Fujifilm, a Japanese company focused on photography, imaging, printing, and biotechnology, predicts that it can build a 400 terabyte cartridge using Strontium Ferrite (SrFe) technology. Thanks to a report by Blocks&Files, who was press-briefed by Fujifilm, we have some information on the future of tape storage. Tape storage uses Linear Tape-Open (LTO) technology, which is an open standard developed by IBM to ensure all tape-based storage devices use the same format, instead of proprietary magnetic formats. We are currently at the LTO-8 version of this technology, which was released in 2017. Currently, LTO-8 can hold 12 TB in a single cartridge.

Fujifilm, one of the remaining makers of tape storage, predicts that it can pack 400 TB of tape storage in the LTO-13 era. Starting from LTO-12, Fujifilm plans to deploy Strontium Ferrite (SrFe) technology, which is different from the current Barium Ferrite (BaFe). The problem with BaFe is that each new LTO generation uses smaller and smaller particles and that leads to some problems where a tape bit value can't be read, and magnetic polarities would be disturbed if particles get too small. 400 TB tape drives using LTO-13 should be in circulation around 2032/33 according to a Blocks&Files prediction. Below you can check out the table provided by Blocks&Files that shows LTO generations and their abilities.

Today the Hot Chips program committee officially announced the August conference line-up, posted to hotchips.org. For this first-ever live-streamed Hot Chips Symposium, the program is better than ever!

In a session on deep learning training for data centers, we have a mix of talks from the internet giant Google showcasing their TPUv2 and TPUv3, and a talk from startup Cerebras on their 2nd gen wafer-scale AI solution, as well as ETH Zurich's 4096-core RISC-V based AI chip. And in deep learning inference, we have talks from several of China's biggest AI infrastructure companies: Baidu, Alibaba, and SenseTime. We also have some new startups that will showcase their interesting solutions—LightMatter talking about its optical computing solution, and TensTorrent giving a first-look at its new architecture for AI.

Cisco today announced the appointment of Dr. Lisa T. Su, AMD president and CEO, to its board of directors effective today. "Lisa is an accomplished business leader with deep expertise in the semiconductor industry," said Chuck Robbins, chairman and CEO, Cisco. "We look forward to her contributions to Cisco's board and our business as we continue to develop ground breaking technologies, and a new internet for the 5G era that will help our customers innovate faster than ever before."

Dr. Su, 50, joined AMD in 2012 and has held the position of President and Chief Executive Officer since October 2014. She also serves on AMD's Board of Directors. Previously, Dr. Su served as Senior Vice President and General Manager, Networking and Multimedia at Freescale Semiconductor, Inc., and was responsible for global strategy, marketing and engineering for the company's embedded communications and applications processor business. Dr. Su joined Freescale in 2007 as Chief Technology Officer, where she led the company's technology roadmap and research and development efforts.

The ThinkPad brand from Lenovo has always represented serious business on the move, right from its IBM origins. At CES 2020, the company unveiled what is possibly the best foldable PC design we've seen till date, the ThinkPad X1 Fold. The X1 Fold is a 13.3-inch tablet that folds perfectly along the middle to either a book-like orientation, or as a laptop, in which the top half becomes the display, and the bottom half your keyboard of whichever possible layout. If a touchscreen keyboard doesn't appeal to you, you can dock an accessory that has a physical keyboard and trackpad.

Under the hood of the X1 Fold is an Intel "Lakefield" Hybrid x86 SoC that combines high-performance and high-efficiency x86 cores and dynamically allots workload to them while power-gating on the fly (a la ARM big.LITTLE). When it comes out mid-2020 (likely a Computex 2020 launch), the ThinkPad X1 Fold will be driven by Windows 10X, a new operating system Microsoft is designing specifically for dual-screen mobile computing devices. The Flex 5G is Lenovo's first business notebook with an integrated 5G modem (in addition to Wi-Fi 6), so you can enjoy high-speed mobile Internet on the move. Lastly, we spotted the Lenovo Ducati notebook, a co-branded product of the company's MotoGP team sponsorship.

AMD (NASDAQ:AMD) today announced revenue for the third quarter of 2019 of $1.80 billion, operating income of $186 million, net income of $120 million and diluted earnings per share of $0.11. On a non-GAAP(*) basis, operating income was $240 million, net income was $219 million and diluted earnings per share was $0.18.

"Our first full quarter of 7 nm Ryzen, Radeon and EPYC processor sales drove our highest quarterly revenue since 2005, our highest quarterly gross margin since 2012 and a significant increase in net income year-over-year," said Dr. Lisa Su, AMD president and CEO. "I am extremely pleased with our progress as we have the strongest product portfolio in our history, significant customer momentum and a leadership product roadmap for 2020 and beyond."

GlobalFoundries is planning to sell a minority stake in the company through an IPO (initial public offering) in 2022, company CEO Tom Caulfield told the Wall Street Journal. In February, it was reported that with the discontinuation of the 7 nm development and sale of certain facilities, the perception was made that GloFo was looking to be acquired by another semiconductor company. The same course of actions could have also served as prelude to taking the company public, and as it turns out, GloFo is heading toward the latter.

TimesUnion comments that the decision to discontinue 7 nm development and shedding some assets slowed down development of future technologies, but returned the company to profitability, so it could be put up for an IPO. Caulfield didn't comment on what is the size of the stake sale, but the source comments it could be aimed at alleviating the strain on GloFo's original investors, the Abu Dhabi government, which has invested over $21 billion in the company over the past 10 years. GlobalFoundries was formed as AMD spun off its semiconductor business in 2009, with seed capital from the Abu Dhabi government. Over the decade, the company built fabs in New York state, and acquired fabs across Vermont, and Singapore, along with tech acquisition from IBM.

AMD has completed design phase of its "Zen 3" architecture and rumors are already appearing about its details. This time, Hardwareluxx has reported that AMD could bake a four-way simultaneous multithreading technology in its Zen 3 core to enable more performance and boost parallel processing power of its data center CPUs. Expected to arrive sometime in 2020, Zen 3 server CPUs, codenamed "MILAN", are expected to bring many architectural improvements and make use of TSMC's 7nm+ Extreme Ultra Violet lithography that brings as much as 20% increase in transistor density.

Perhaps the biggest change we could see is the addition of four-way SMT that should allow a CPU to have four virtual threads per core that will improve parallel processing power and enable data center users to run more virtual machines than ever before. Four-way SMT will theoretically boost performance by dividing micro-ops into four smaller groups so that each thread could execute part of the operation, thus making the execution time much shorter. This being only one application of four-way SMT, we can expect AMD to leverage this feature in a way that is most practical and brings the best performance possible.

Today, Alibaba, Cisco, Dell EMC, Facebook, Google, Hewlett Packard Enterprise, Huawei, Intel Corporation and Microsoft announce the incorporation of the Compute Express Link (CXL) Consortium, and unveiled the names of its newly-elected members to its Board of Directors. The core group of key industry partners announced their intent to incorporate in March 2019, and remain dedicated to advancing the CXL standard, a new high-speed CPU-to-Device and CPU-to-Memory interconnect which accelerates next-generation data center performance.

The five new CXL board members are as follows: Steve Fields, Fellow and Chief Engineer of Power Systems, IBM; Gaurav Singh, Corporate Vice President, Xilinx; Dong Wei, Standards Architect and Fellow at ARM Holdings; Nathan Kalyanasundharam, Senior Fellow at AMD Semiconductor; and Larrie Carr, Fellow, Technical Strategy and Architecture, Data Center Solutions, Microchip Technology Inc.

IBM (NYSE: IBM) today announced IBM z15, a new enterprise platform delivering the ability to manage the privacy of customer data across hybrid multicloud environments. With z15, clients can manage who gets access to data via policy-based controls, with an industry-first capability to revoke access to data across the hybrid cloud.

The movement of data between partners and third parties is often the root cause of data breaches. In fact, 60 percent of businesses reported they suffered a data breach caused by a vendor or third party in 2018. With the growing adoption of hybrid multicloud environments, the importance of maintaining data security and privacy only grows more acute and challenging.

NVIDIA will implement the 7 nanometer EUV (extreme ultraviolet) lithography to build its future generation of GPUs slated for 2020, according to Japanese publication MyNavi.jp. The GPU giant could be among the first customers besides IBM, to contract Samsung for 7 nm EUV mass-production of GPUs. IBM will use the Korean semiconductor giant for manufacturing Z-series processors and FPGAs. Samsung announced in October 2018 that it will begin risk-production on its 7 nm EUV node in early-2019.

An earlier report from 2018 also forecast NVIDIA implementing 7 nm DUV (deep ultraviolet) node of TSMC for its 2019 GPU lineup. With news of the company now working with Samsung on 7 nm EUV for 2020, this seems less likely. It's possible that NVIDIA could somehow split its next generation GPU lineup between TSMC 7 nm DUV and Samsung 7 nm EUV, with the latter being used for chips with higher transistor-counts, taking advantage of the node's higher deliverable transistor densities.

IBM today announced an agreement with Samsung to manufacture 7-nanometer (nm) microprocessors for IBM Power Systems , IBM Z and LinuxONE , high-performance computing (HPC) systems, and cloud offerings. The agreement combines Samsung's industry-leading semiconductor manufacturing with IBM's high-performance CPU designs. This combination is being designed to drive unmatched systems performance, including acceleration, memory and I/O bandwidth, encryption and compression speed, as well as system scaling. It positions IBM and Samsung as strategic partners leading the new era of high-performance computing specifically designed for AI.

"At IBM, our first priority is our clients," said John Acocella, Vice President of Enterprise Systems and Technology Development for IBM Systems. "IBM selected Samsung to build our next generation of microprocessors because they share our level of commitment to the performance, reliability, security, and innovation that will position our clients for continued success on the next generation of IBM hardware."

IBM and Red Hat, the world's leading provider of open source cloud software, announced today that the companies have reached a definitive agreement under which IBM will acquire all of the issued and outstanding common shares of Red Hat for $190.00 per share in cash, representing a total enterprise value of approximately $34 billion.

"The acquisition of Red Hat is a game-changer. It changes everything about the cloud market," said Ginni Rometty, IBM Chairman, President and Chief Executive Officer. "IBM will become the world's #1 hybrid cloud provider, offering companies the only open cloud solution that will unlock the full value of the cloud for their businesses.

We previously covered in more depth the fact that the US was gearing up to overtake China's Sunway TaihuLight, then the world's fastest supercomputer, with its Summit machine, built in collaboration between IBM (with its water-cooled Power Systems AC922 nodes with 24-core processors and 96 processing threads) and NVIDIA (GV100 GPUs).

Now, this US dream has finally come to pass, and in a big way - the Summit delivers more than double the performance of China's posterchild, coming in at 200 PetaFLOPs of computing power. Summit boasts of 27,648 Volta Tensor Core GPUs and 9,216 CPUs within its 5,600 square feet. The Summit supercomputer consumes 15 MW of power (the site where it's deployed is able to deliver up to 20 MW), which is on-par with China's Sunway - but remember, it more than doubles the peak PetaFlops from 93 to 200. A good step in the battle for supercomputer supremacy, but China still has an increasing foothold in the number of systems it has employed and registered with the TOP500.

Globalfoundries' Chief Technical Officer, Gary Patton, talked about the future he believes can be possible in future manufacturing processes, calling for particular attention towards the next step in the ladder at 7 nm. Apparently, the 7 nm process at Globalfoundries has received a shot in the arm from the integration of ex IBM engineering specialists (remember that IBM practically paid Globalfoundries to take its manufacturing division of its hands), and the company now expects better than foreseen technical specs and achievements of its 7 nm process.

While a move from 14 nm to 7 nm was expected to provide, at the very best, a halving in the actual size of a chip manufactured in 7 nm compared to 14 nm, Gary Patton is now saying that the are should actually be reduced by up to 2.7 times the original size. To put that into perspective, AMD's 1000 series processors on the Zeppelin die and 14 nm process, which come in at 213 mm² for the full, 8-core design, could be brought down to just 80 mm² instead. AMD could potentially use up that extra die space to either build in some overprovisioning, should the process still be in its infancy and yields need a small boost; or cram it with double the amount of cores and other architectural improvements, and still have chips that are smaller than the original Zen dies.

IBM today unveiled its next-generation Power Systems Servers incorporating its newly designed POWER9 processor. Built specifically for compute-intensive AI workloads, the new POWER9 systems are capable of improving the training times of deep learning frameworks by nearly 4x allowing enterprises to build more accurate AI applications, faster.

The new POWER9-based AC922 Power Systems are the first to embed PCI-Express 4.0, next-generation NVIDIA NVLink and OpenCAPI, which combined can accelerate data movement, calculated at 9.5x faster than PCI-E 3.0 based x86 systems. The system was designed to drive demonstrable performance improvements across popular AI frameworks such as Chainer, TensorFlow and Caffe, as well as accelerated databases such as Kinetica. As a result, data scientists can build applications faster, ranging from deep learning insights in scientific research, real-time fraud detection and credit risk analysis.