AMD today announced the immediate availability of five new members of the AMD Opteron 6100 Series processor family that specifically address rising demand for low-power, balanced systems for SMBs and increased performance-per-dollar-per-watt for enterprise and public sector environments. Key partners including Acer, Dell and HP are launching new or refreshed AMD Opteron 6000 Series platform-based systems this quarter, powered by these new 12- and 8-core AMD Opteron processors.

"These new server CPUs deliver greater performance than we've ever had before," said Patrick Patla, vice president and general manager, Server Business, AMD. "When we launched the AMD Opteron 6000 Series platforms last year, we eliminated the '4P tax' and met market demands for higher performance-per-dollar-per-watt. Our customers' benchmarks and testimonials bear out these improvements, and these five new parts-and the rave reviews-prove that we continue to deliver on our vision."

AMD has started shipping its 8-core and 12-core "Magny Cours" Opteron processors for sockets G34 (2P-4P+), and C32 (1P-2P). The processors mark entry of several new technologies for AMD, such as a multi-chip module (MCM) approach towards increasing the processor's resources without having to complicate chip design any further than improving on those of the Shanghai and Istanbul. The new Opteron chips further make use of third-generation HyperTransport interconnect technologies for 6.4 GT/s interconnect speeds between the processor and host, and between processors on multi-socket configurations. It also embraces the Registered DDR3 memory technology. Each processor addresses memory over up to four independent (unganged) memory channels. Technologies such as HT Assist improve inter-silicon bandwidth on the MCMs. The processors further benefit from 12 MB of L3 caches on board, and 512 KB of dedicated L2 caches per processor core.

In the company's blog, the Director of Product Marketing for Server/Workstation products, John Fruehe, writes "Production began last month and our OEM partners have been receiving production parts this month." The new processors come in G34/C32 packages (1974-pin land-grid array). There are two product lines: the 1P/2P capable (cheaper) Opteron 4000 series, and 2P to 4P capable Opteron 6000 series. There are a total of 18 SKUs AMD has planned some of these are listed as followed, with OEM prices in EUR:

As part of its Financial Analyst Day for 2009, AMD listed out its priorities for the year ahead, looking into 2010. While the company has lived up to its development targets for this year by releasing a full-fledged lineup of PC and server processors built on the 45 nm process, increasing its market share with graphics products, and releasing the first DirectX 11 compliant (back then referred to as 'next generation') GPU, the year ahead looks equally ambitious for AMD.

AMD set the following product priorities for 2010: to deliver four new winning PC platforms in the first half of 2010, improve battery life of its notebook platform, expand homegrown DirectCompute 11 and OpenCL developer tools, propagate DirectX 11 graphics to notebooks, launch the company's first 12-core Opteron processor, and more interestingly, sample the company's next-generation "Bulldozer" architecture to industry customers, along with sampling the company's first Fusion-design "Bobcat" processor, which integrates the CPU with GPU, along with sampling some of the company's first processors built on the 32 nm manufacturing process.

Here's the first CPU-Z validation of AMD's 12-core Magny Cours processor. Whatever details the existing version of CPU-Z does read, perfectly matches the specifications of the processor sketched out so far. Firstly, it's based on AMD's upcoming socket G3 package that marks Opteron's transition to high-level integration within a single package. With 1,974 pins, socket G3 is able to provide as many as six 16-bit HyperTransport 3.1 links, and four DDR3 memory channels. The package is one of AMD's first multi-chip modules, that houses two six-core dies (dubbed "nodes"), onto one package, and connects the two using a HyperTransport link.

Each node has 6 x 512 KB of L2 cache and 6 MB L3 cache shared between the six cores. Out of 6 MB, 1 MB of the cache is reserved for low-level system operations, namely the HT Assist (probe filter) that aims to lower memory subsystem latencies, reduces queuing delays due to lower HyperTransport traffic overhead, and minimizes probe traffic to increase system bandwidth. The CPU-Z reading of 10 MB total chip L3 cache is spot-on. Also seen on the validation page are details on the reference motherboard, called "AMD Dinar", that uses SR5690 (same chip as 890FX) + SB750 chipset. The CPU-Z validation can be found here.