Micron Technology, Inc. (Nasdaq: MU) today announced results for its second quarter of fiscal 2025, which ended February 27, 2025.

Fiscal Q2 2025 highlights

• Revenue of $8.05 billion versus $8.71 billion for the prior quarter and $5.82 billion for the same period last year
• GAAP net income of $1.58 billion, or $1.41 per diluted share
• Non-GAAP net income of $1.78 billion, or $1.56 per diluted share
• Operating cash flow of $3.94 billion versus $3.24 billion for the prior quarter and $1.22 billion for the same period last year

"Micron delivered fiscal Q2 EPS above guidance and data center revenue tripled from a year ago," said Sanjay Mehrotra, Chairman, President and CEO of Micron Technology. "We are extending our technology leadership with the launch of our 1-gamma DRAM node. We expect record quarterly revenue in fiscal Q3, with DRAM and NAND demand growth in both data center and consumer-oriented markets, and we are on track for record revenue and significantly improved profitability in fiscal 2025."

Micron Technology Inc. today announced it has appointed two experienced business leaders, Mark Liu and Christie Simons, to its board of directors.

Liu spent over 30 years with Taiwan Semiconductor Manufacturing Company (TSMC), where he held increasingly important leadership positions, including senior vice president (2004-2012), co-chief operations officer (2012-2013), president and co-CEO (2013-2018), and executive chairman (2018-2024). Under his leadership, TSMC became the world's largest semiconductor foundry. Currently, he is the founder and chairman of J&M Copper Beech Ventures, a multi-strategy investment fund. Liu began his career at Intel Corporation as part of the company's development of its 32-bit microprocessor technology. He then moved to AT&T Bell Laboratory where he conducted fundamental high-speed electronics research. Liu's other board commitments include the University of California, Berkeley Engineering Advisory Board. He holds a bachelor's degree in electrical engineering from National Taiwan University, and master's and Ph.D. degrees in electrical engineering and computer science from the University of California, Berkeley.

TrendForce's latest research reveals that the NAND Flash market faced downward pressure in 4Q24 as PC and smartphone manufacturers continued inventory clearance efforts, leading to significant supply chain adjustments. Consequently, NAND Flash prices reversed downward, with ASP dropping 4% QoQ, while overall bit shipments declined by 2%. Total industry revenue fell 6.2% QoQ to US$16.52 billion.

Looking ahead to 1Q25, the traditional slow season effect remains unavoidable despite suppliers actively reducing production. Server and other key end-market inventory restocking has slowed, and with both order volumes and contract prices declining sharply. NAND Flash industry revenue is expected to drop by up to 20% QoQ. However, as production cuts take effect and prices stabilize, the NAND Flash market is expected to recover in the second half of 2025.

TrendForce's latest research reveals that global DRAM industry revenue surpassed US$28 billion in 4Q24, marking a 9.9% QoQ increase. This growth was primarily driven by rising contract prices for server DDR5 and concentrated shipments of HBM, leading to continued revenue expansion for the top three DRAM suppliers.

Most contract prices across applications were seen to have reversed downward. However, increased procurement of high-capacity server DDR5 by major American CSPs helped sustain price momentum for server DRAM.

Micron Technology, Inc., today announced it is the first in the industry to ship samples of its 1γ (1-gamma), sixth-generation (10 nm-class) DRAM node-based DDR5 memory designed for next-generation CPUs to ecosystem partners and select customers. This 1γ DRAM milestone builds on Micron's previous 1α (1-alpha) and 1β (1-beta) DRAM node leadership to deliver innovations that will power future computing platforms from the cloud to industrial and consumer applications to Edge AI devices like AI PCs, smartphones and automobiles. The Micron 1γ DRAM node will first be leveraged in its 16 Gb DDR5 DRAM and over time will be integrated across Micron's memory portfolio to meet the industry's accelerating demand for high-performance, energy-efficient memory solutions for AI. Designed to offer speed capabilities of up to 9200 MT/s, the 16 Gb DDR5 product provides up to a 15% speed increase and over 20% power reduction compared to its predecessor.

Inside sources—familiar with goings-ons at leading DRAM manufacturing firms—have predicted the end of DDR3 and DDR4 production lines. According to a DigiTimes Asia report (citing Nikkei), industry observers have noticed that the DRAM market is undergoing a so-called "shift." They believe that pricing trends are decreasing due to weak demand. Samsung Electronics, SK Hynix, and Micron are named as major players; allegedly involved in devising new strategies—in reaction to fluid market circumstances. The DigiTimes insider network proposes that the big three: "may phase out DDR3 and DDR4 by 2025...by the end of 2025...anticipating a future focused on advanced memory technologies." Older standards are falling out of favor, with DDR5 and high-bandwidth memory (HBM) on the ascent. Industry watchdogs reckon that possible DDR3 and DDR4 supply shortages could occur "post-summer 2025."

Taiwan's Nanya Technology has predicted that the overall DRAM market will "bottom out" within the first half of 2025. An eventual recovery is envisioned by the second quarter; AI-related demands could help drive up demand by a large margin. Additionally, Nanya points to improved inventory management and global economic stimulus. Taiwanese DRAM production houses are expected to pick up some slack, but an unnamed "key component distributor" anticipates serious after-effects. An anonymous source believes that the: "anticipated halt in production could lead to significant supply constraints, challenging market dynamics and impacting pricing strategies." Nanya Technology and Winbond Electronics produce specialized DRAM-types; therefore are not touted to be great gap fillers. The latter is reportedly reacting to weak demand for "mature" DDR products—DigiTimes commented on this development: "Winbond Electronics is advancing its manufacturing by transitioning to a 16 nm process in the latter half of 2025. This upgrade from the current 20 nm process, primarily used for 4 Gb DDR3 and DDR4, will enable Winbond to produce 8 Gb DDR memory."

Micron Technology, Inc., today announced the Micron 4600 PCIe Gen 5 NVMe SSD, an innovative client storage drive for OEMs that is designed to deliver exceptional performance and user experience for gamers, creators and professionals. Leveraging Micron G9 TLC NAND, the 4600 SSD is Micron's first Gen 5 client SSD and doubles the performance of its predecessor.

The Micron 4600 SSD showcases sequential read speeds of 14.5 GB/s and write speeds of 12.0 GB/s. These capabilities allow users to load a large language model (LLM) from the SSD to DRAM in less than one second, enhancing the user experience with AI PCs. For AI model loading times, the 4600 SSD reduces load times by up to 62% compared to Gen 4 performance SSDs ensuring rapid deployment of LLMs and other AI workloads. Additionally, the 4600 SSD provides up to 107% improved energy efficiency (MB/s per watt) compared to Gen 4 performance SSDs, enhancing battery life and overall system efficiency.

NVIDIA and its memory partners, SK Hynix, Samsung, and Micron, are preparing a new memory form factor called System on Chip Advanced Memory Module—SOCAMM shortly. This technology, adapting to the now well-known CAMM memory module standard, aims to bring additional memory density to NVIDIA systems. Taking inspiration from NVIDIA's Project DIGITS, it has now been developed independently by NVIDIA outside of any official memory consortium like JEDEC. Utilizing a detachable module design, SOCAMM delivers superior specifications compared to existing solutions, featuring 694 I/O ports (versus LPCAMM's 644 and traditional DRAM's 260), direct LPDDR5X memory substrate integration, and a more compact form factor.

For reference, current-generation Project DIGITS is using NVIDIA GB10 Grace Blackwell Superchip capable of delivering one PetaFLOP of FP4 compute, paired with 128 GB of LPDDR5X memory. This configuration limits the size of AI models that run locally on the device, resulting in up to 200 billion parameter models running on a single Project DIGITS AI PC. Two stacked Project DIGITS PCs are needed for models like Llama 3.1 405B with 405 billion parameters. Most interestingly, memory capacity is the primary limiting factor; hence, NVIDIA devotes its time to developing a more memory-dense SOCAMM standard. Being a replacement compatible with LPDDR5, it can use the same controller silicon IP with only the SoC substrate being modified to fit the new memory. With NVIDIA rumored to enter the consumer PC market this year, we could also see an early implementation in consumer PC products, but the next-generation Project DIGITS is the primary target.

IndiaTimes reports that Tata Projects announced on Tuesday that Micron Technology's semiconductor assembly and test facility at Sanand near Ahmedabad (India) will be ready by December 2025. Amit Agrawal, Project Director at Tata Projects, said workers have finished 60 percent of India's first semiconductor plant, the rest will be done by year's end. The plant covers about 50 acres in the Sanand industrial area and the building started in July last year. Tata Projects is putting up this semiconductor Assembly, Testing, Marking and Packaging (ATMP) facility for Micron.

"An ATMP facility is essentially a backend fab facility where testing, packaging and marking of semiconductors are carried out. This is perhaps the largest back-end semiconductor fab unit in the world. So far, 60 percent of work has been completed on Phase-1 with the help of a total workforce of 3,500," Agrawal told reporters. "We will hand over this facility to Micron by December 2025 after finishing civil work, mechanical, electrical and plumbing work along with engineering-related tasks as per the designs given by Micron. The final call to commence the plant will be taken by Micron" added Amit Agrawal, Project Director at Tata Projects.

TrendForce's latest research report highlights that the NAND Flash industry will continue to face dual pressure from weak demand and oversupply in 2025. In response, manufacturers including Micron, Kioxia/SanDisk, Samsung, and SK hynix/Solidigm have similar plans to cut production—a move that could accelerate industry consolidation in the long term.

TrendForce reports that NAND Flash manufacturers are primarily implementing production cuts by lowering utilization rates and delaying process upgrades. These actions are driven by three major factors:

We first announced Raspberry Pi 5 back in the autumn of 2023, with just two choices of memory density: 4 GB and 8 GB. Last summer, we released the 2 GB variant, aimed at cost-sensitive applications. And today we're launching its bigger sibling, the 16 GB variant, priced at $120.

Why 16 GB, and why now?
We're continually surprised by the uses that people find for our hardware. Many of these fit into 8 GB (or even 2 GB) of SDRAM, but the threefold step up in performance between Raspberry Pi 4 and Raspberry Pi 5 opens up use cases like large language models and computational fluid dynamics, which benefit from having more storage per core. And while Raspberry Pi OS has been tuned to have low base memory requirements, heavyweight distributions like Ubuntu benefit from additional memory capacity for desktop use cases. The optimized D0 stepping of the Broadcom BCM2712 application processor includes support for memories larger than 8 GB. And our friends at Micron were able to offer us a single package containing eight of their 16Gbit LPDDR4X die, making a 16 GB product feasible for the first time.

Micron at the 2025 International CES showed us product that hint at the company planning a strong comeback to the client and PC-DIY market segments. The company's Crucial brand is already a high-volume player in the client segment, but the company never really approached the enthusiast segment. Products like the company's new T705 Pro and P510 NVMe SSDs, and DDR5 Pro Overclocking memory, seek to change this. We begin our tour with PC memory, and the DDR5 Pro OC CUDIMMs. Crucial has jumped onto the CKD bandwagon, introducing memory modules and kits that come with DDR5-6400 out of the box, but which are geared for manual overclocking to take advantage of the 1β DRAM chips underneath (hence the name).

The company also showed us their first DDR5 CSODIMM suitable for the next generation of notebooks with HX-segment processors. This module comes with a CKD and a DDR5-6400 JEDEC-standard SPD profile out of the box. Lastly, there's the Micron-branded LPCAMM2, which comes in speeds of up to LPDDR5X-8533, and is suitable for the next generation of ultraportables.

JEDEC Solid State Technology Association, the global leader in the development of standards for the microelectronics industry, today announced the publication of JESD220G: Universal Flash Storage 4.1. In addition, an update to the complementary JESD223F UFS Host Controller Interface (UFSHCI) version 4.1 standard has also been published. Developed for mobile applications and computing systems requiring high performance with low power consumption, UFS 4.1 offers faster data access and improved performance over the earlier version of the standard while maintaining hardware compatibility to UFS 4.0. Both standards are available for download from the JEDEC website.

"JEDEC members are continually innovating to shape the standards that will drive the next generation of mobile devices and advanced applications, and the committee's dedication to ongoing improvements to the UFS series is paving the way for future innovation," said Mian Quddus, Chairman of the JEDEC Board of Directors and the JC-64 Committee for Embedded Memory Storage and Removable Memory Cards.

Micron Technology, Inc. (Nasdaq: MU) broke ground today on a new High-Bandwidth Memory (HBM) advanced packaging facility adjacent to the company's current facilities in Singapore. Micron marked the occasion with a ceremony attended by Gan Kim Yong, Deputy Prime Minister and Minister for Trade and Industry of Singapore, Png Cheong Boon, Chairman of the Singapore Economic Development Board, Pee Beng Kong, Executive Vice President of the Singapore Economic Development Board, and Tan Boon Khai, CEO of JTC Corporation.

The new HBM advanced packaging facility will be the first facility of its kind in Singapore. Operations for the new facility are scheduled to begin in 2026, with meaningful expansion of Micron's total advanced packaging capacity beginning in calendar 2027 to meet the demands of AI growth. The launch of this facility will further strengthen Singapore's local semiconductor ecosystem and innovation.

Micron Technology, Inc., today announced expansions across its Crucial consumer memory and storage portfolio, including unveiling the high-speed Crucial P510 SSD, and expanding density and form factor options across its existing DRAM portfolio to enable broader choice and flexibility for consumers. The P510 features read and write speeds of up to 11,000/9,550 megabytes per second (MB/s), bringing blazing fast Gen 5 performance to the masses.

"With the exciting memory and storage offerings we're debuting today, Crucial's portfolio is now broader and stronger than ever before," said Dinesh Bahal, corporate vice president and general manager of Micron's Commercial Products Group. "These updates - from making fast Gen 5 SSDs available to the mainstream to launching high-density memory options - illustrate our commitment to driving innovation, performance and value for every consumer from casual gamers to creatives and students to hardcore enthusiasts."

At CES 2025, we found the SSD controller that will spur high-end NVMe Gen 5 SSD adoption. Until now, high-end Gen 5 SSDs were driven by Phison's E26 series controller that the company built on TSMC's 12 nm process. The company on Monday launched the new E28 series controller (full name PS5028-E28). This chip is built on the much more advanced TSMC 6 nm process. The new process lets Phison to significantly lower the electrical cost of its NAND flash interface serializer-deserializer, and step up performance closer to the interface limits of PCI-Express 5.0 x4. The controller offers sequential speeds of up to 14.5 GB/s, which is an increase from last year's E26 Max14um variant.

The company showed us the bare E28 controller chip, and a reference-design SSD based on it. Not much to report, except that the drive lacked any cooling solution. Production SSDs powered by the E28 will still need heatsinks to achieve optimal performance, although they won't run as hot as drives powered by the E26. The company didn't have any performance demo stations set up with this drive.

Micron Technology, Inc. (Nasdaq: MU) today announced it is appointing Mike Cordano as the company's executive vice president of worldwide sales, effective immediately. Cordano will succeed Mike Bokan, who announced a few months ago his intention to retire from Micron in fiscal 2025 after more than twenty-eight years with the company. Bokan will support Cordano over the next several months to ensure a seamless transition. Cordano will report directly to Sanjay Mehrotra, President and CEO of Micron.

Cordano joins Micron with a 30-year track record of success in executive leadership, driving innovative business development, and executing successful go-to-market strategies. His experience includes over 8 years at Western Digital (WD), where he held ever-increasing executive positions, including President and Chief Operating Officer and President of the Hitachi Global Storage Technology (HGST) subsidiary. Immediately before the acquisition by WD, he held the position of Executive Vice President of Sales and Marketing at HGST. Most recently, he was the Founder and Partner of Prime Impact Capital.

Micron Technology, Inc. today announced results for its first quarter of fiscal 2025, which ended November 28, 2024.

Fiscal Q1 2025 highlights

• Revenue of $8.71 billion versus $7.75 billion for the prior quarter and $4.73 billion for the same period last year
• GAAP net income of $1.87 billion, or $1.67 per diluted share
• Non-GAAP net income of $2.04 billion, or $1.79 per diluted share
• Operating cash flow of $3.24 billion versus $3.41 billion for the prior quarter and $1.40 billion for the same period last year

"Micron delivered a record quarter, and our data center revenue surpassed 50% of our total revenue for the first time," said Sanjay Mehrotra, President and CEO of Micron Technology. "While consumer-oriented markets are weaker in the near term, we anticipate a return to growth in the second half of our fiscal year. We continue to gain share in the highest margin and strategically important parts of the market and are exceptionally well positioned to leverage AI-driven growth to create substantial value for all stakeholders."

Marvell Technology, Inc. (NASDAQ: MRVL), a leader in data infrastructure semiconductor solutions, today announced that it has pioneered a new custom HBM compute architecture that enables XPUs to achieve greater compute and memory density. The new technology is available to all of its custom silicon customers to improve the performance, efficiency and TCO of their custom XPUs. Marvell is collaborating with its cloud customers and leading HBM manufacturers, Micron, Samsung Electronics, and SK hynix to define and develop custom HBM solutions for next-generation XPUs.

HBM is a critical component integrated within the XPU using advanced 2.5D packaging technology and high-speed industry-standard interfaces. However, the scaling of XPUs is limited by the current standard interface-based architecture. The new Marvell custom HBM compute architecture introduces tailored interfaces to optimize performance, power, die size, and cost for specific XPU designs. This approach considers the compute silicon, HBM stacks, and packaging. By customizing the HBM memory subsystem, including the stack itself, Marvell is advancing customization in cloud data center infrastructure. Marvell is collaborating with major HBM makers to implement this new architecture and meet cloud data center operators' needs.

TrendForce's latest investigations found that the enterprise SSD market experienced significant growth in 3Q24, driven by robust demand from AI-related applications. Prices surged as suppliers struggled to keep pace with market needs, pushing overall industry revenue up by an impressive 28.6% QoQ. Demand for high-capacity models was especially strong, fueled by the arrival of NVIDIA's H-series products and sustained orders for AI training servers. As a result, the total procurement volume for enterprise SSDs rose 15% compared to the previous quarter.

Looking ahead to 4Q24, TrendForce forecasts a slowdown in enterprise SSD revenue as procurement demand begins to cool. Total procurement volume is expected to dip, with the peak buying period behind and server OEM orders being slightly revised downward. As shipment volume declines, overall industry revenue is also projected to decrease in the fourth quarter.

Marvell Technology, Inc., a leader in data infrastructure semiconductor solutions, today announced that it has pioneered a new custom HBM compute architecture that enables XPUs to achieve greater compute and memory density. The new technology is available to all of its custom silicon customers to improve the performance, efficiency and TCO of their custom XPUs. Marvell is collaborating with its cloud customers and leading HBM manufacturers, Micron, Samsung Electronics, and SK hynix to define and develop custom HBM solutions for next-generation XPUs.

HBM is a critical component integrated within the XPU using advanced 2.5D packaging technology and high-speed industry-standard interfaces. However, the scaling of XPUs is limited by the current standard interface-based architecture. The new Marvell custom HBM compute architecture introduces tailored interfaces to optimize performance, power, die size, and cost for specific XPU designs. This approach considers the compute silicon, HBM stacks, and packaging. By customizing the HBM memory subsystem, including the stack itself, Marvell is advancing customization in cloud data center infrastructure. Marvell is collaborating with major HBM makers to implement this new architecture and meet cloud data center operators' needs.

The Biden-Harris Administration has given Micron Technology up to $6.165 billion in direct funds through the CHIPS Incentives Program to back the company's manufacturing growth. The money will allow Micron to execute its plan announced in October 2022 by investing about $100 billion into Clay, New York fab, and $25 billion into Idaho over 20 years aiming to boost the United States' advanced memory manufacturing from under 2% to around 10% by 2035. This large investment aims to make the U.S. economy stronger by creating a home supply of cutting-edge DRAM chips, moreover it is expected to create approximately 20,000 job across the U.S. Micron plans to spend about $50 billion before 2030 focusing on making more advanced memory semiconductor technology.

Also, the Department of Commerce has put pen to paper on a first draft of terms with Micron. This could lead to funding of up to $275 million to upgrade its Manassas, Virginia plant. The $2 billion investment project aims to bring Micron's 1-alpha technology back to U.S. The 1-alpha process was launched in 2021 and is used for the latest LPDDR5 DRAM chips. This would boost monthly wafer production and create over 400 factory jobs. At its busiest, the project could generate up to 2,700 jobs in the local area.

TrendForce's latest investigations reveal that the global DRAM industry revenue reached US$26.02 billion in 3Q24, marking a 13.6% QoQ increase. The rise was driven by growing demand for DDR5 and HBM in data centers, despite a decline in LPDDR4 and DDR4 shipments due to inventory reduction by Chinese smartphone brands and capacity expansion by Chinese DRAM suppliers. ASPs continued their upward trend from the previous quarter, with contract prices rising by 8% to 13%, further supported by HBM's displacement of conventional DRAM production.

Looking ahead to 4Q24, TrendForce projects a QoQ increase in overall DRAM bit shipments. However, the capacity constraints caused by HBM production are expected to have a weaker-than-anticipated impact on pricing. Additionally, capacity expansions by Chinese suppliers may prompt PC OEMs and smartphone brands to aggressively deplete inventory to secure lower-priced DRAM products. As a result, contract prices for conventional DRAM and blended prices for conventional DRAM and HBM are expected to decline.

The EUV lithography machine from ASML ordered by Rapidus is expected to arrive in Japan in mid-December, according to information from Nikkei cited by TrendForce. This marks the first deployment of EUV technology in Japan, an important step for the country's semiconductor industry as it seeks to establish itself as a major player. Rapidus is currently building a factory in Chitose, Hokkaido, and plans to start mass production of 2 nm chips in 2027. The company also plans to purchase several EUV devices if the 2-nanometer chip production is successful, and intends to build a second production facility specifically for 1.4 nm chips. To support these operations, ASML will establish a service center in Chitose City.

NVIDIA CEO Jensen Huang hinted at the possibility of outsourcing AI chip production to Rapidus. As of October, construction progress on the Rapidus facility, which began in September 2023, is up to 63% and remains on track. In addition to Rapidus, Micron's Hiroshima plant is scheduled to install EUV equipment in 2025, allowing for mass production in 2026. JASM, a TSMC subsidiary in Japan, plans to integrate EUV lithography with a second wafer plant in 2027 that will have a 6 nm production line.

Micron Technology, Inc., today announced it has begun qualification of the 6550 ION NVMe SSD with customers. The Micron 6550 ION is the world's fastest 60 TB data center SSD and the industry's first E3.S and PCIe Gen 5 60 TB SSD. It follows the success of the award-winning 6500 ION and is engineered to provide best-in-class performance, energy efficiency, endurance, security, and rack density for exascale data center deployments. The 6550 ION excels in high-capacity NVMe workloads such as networked AI data lakes, ingest, data preparation and check pointing, file and object storage, public cloud storage, analytic databases, and content delivery.

"The Micron 6550 ION achieves a remarkable 12 GB/s while using just 20 watts of power, setting a new standard in data center performance and energy efficiency," said Alvaro Toledo, vice president and general manager of Micron's Data Center Storage Group. "Featuring a first-to-market 60 TB capacity in an E3.S form factor and up to 20% better energy efficiency than competitive drives, the Micron 6550 ION is a game-changer for high-capacity storage solutions to address the insatiable capacity and power demands of AI workloads."