Tachyum Demonstrates DRAM Failover for Large Scale AI on Prodigy FPGA Prototype
Tachyum today announced that it has successfully enabled DRAM Failover correct system on its Prodigy Universal Processor, demonstrating enhanced reliability for even larger-scale AI and HPC applications even in the case of DRAM chip failures.
Tachyum's DRAM Failover is an advanced memory error correction technology that improves the reliability of DRAM and provides a higher level of protection than traditional Error Correction Code (ECC). DRAM Failover can correct multi-bit errors within a single memory chip or across multiple memory chips, allowing continued memory operation in the event of device-level faults in memory. With DRAM Failover, even a whole DRAM chip failure can be tolerated without affecting the system and applications.
Tachyum's DRAM Failover is an advanced memory error correction technology that improves the reliability of DRAM and provides a higher level of protection than traditional Error Correction Code (ECC). DRAM Failover can correct multi-bit errors within a single memory chip or across multiple memory chips, allowing continued memory operation in the event of device-level faults in memory. With DRAM Failover, even a whole DRAM chip failure can be tolerated without affecting the system and applications.