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NVIDIA CEO Meets with India Prime Minister Narendra Modi

Underscoring NVIDIA's growing relationship with the global technology superpower, Indian Prime Minister Narendra Modi met with NVIDIA founder and CEO Jensen Huang Monday evening. The meeting at 7 Lok Kalyan Marg—as the Prime Minister's official residence in New Delhi is known—comes as Modi prepares to host a gathering of leaders from the G20 group of the world's largest economies, including U.S. President Joe Biden, later this week.

"Had an excellent meeting with Mr. Jensen Huang, the CEO of NVIDIA," Modi said in a social media post. "We talked at length about the rich potential India offers in the world of AI." The event marks the second meeting between Modi and Huang, highlighting NVIDIA's role in the country's fast-growing technology industry.

New AI Accelerator Chips Boost HBM3 and HBM3e to Dominate 2024 Market

TrendForce reports that the HBM (High Bandwidth Memory) market's dominant product for 2023 is HBM2e, employed by the NVIDIA A100/A800, AMD MI200, and most CSPs' (Cloud Service Providers) self-developed accelerator chips. As the demand for AI accelerator chips evolves, manufacturers plan to introduce new HBM3e products in 2024, with HBM3 and HBM3e expected to become mainstream in the market next year.

The distinctions between HBM generations primarily lie in their speed. The industry experienced a proliferation of confusing names when transitioning to the HBM3 generation. TrendForce clarifies that the so-called HBM3 in the current market should be subdivided into two categories based on speed. One category includes HBM3 running at speeds between 5.6 to 6.4 Gbps, while the other features the 8 Gbps HBM3e, which also goes by several names including HBM3P, HBM3A, HBM3+, and HBM3 Gen2.

TSMC Inaugurates Global R&D Center, Celebrating Its Newest Hub for Technology Innovation

TSMC today held an inauguration ceremony for its global Research and Development Center in Hsinchu, Taiwan, celebrating the Company's newest hub for bringing the next generations of semiconductor technology into reality with customers, R&D partners in industry and academia, design ecosystem partners, and senior government leaders.

The R&D Center will serve as the new home for TSMC's R&D Organization, including the researchers who will develop TSMC's leading-edge process technology at the 2-nanometer generation and beyond, as well as scientists and scholars blazing the trail with exploratory research into fields such as novel materials and transistor structures. With R&D employees already relocating to their workplaces in the new building, it will be ready for its full complement of more than 7,000 staff by September 2023.

Silicon Motion Announces Results for the Period Ended June 30, 2023 and an Acquisition Update

Silicon Motion Technology Corporation ("Silicon Motion", the "Company" or "we") today announced its financial results for the quarter ended June 30, 2023. For the second quarter of 2023, net sales (GAAP) increased sequentially to $140.4 million from $124.1 million in the first quarter of 2023. Net income (GAAP) increased to $11.0 million, or $0.33 per diluted American Depositary Share of the Company ("ADS") (GAAP), from net income (GAAP) of $10.2 million, or $0.30 per diluted ADS (GAAP), in the first quarter of 2023.

For the second quarter of 2023, net income (non-GAAP) increased to $12.6 million, or $0.38 per diluted ADS (non-GAAP), from net income (non-GAAP) of $11.2 million, or $0.33 per diluted ADS (non-GAAP), in the first quarter of 2023.

Intel Tech Helping Design Prototype Fusion Power Plant

What's New: As part of a collaboration with Intel and Dell Technologies, the United Kingdom Atomic Energy Authority (UKAEA) and the Cambridge Open Zettascale Lab plan to build a "digital twin" of the Spherical Tokamak for Energy Production (STEP) prototype fusion power plant. The UKAEA will utilize the lab's supercomputer based on Intel technologies, including 4th Gen Intel Xeon Scalable processors, distributed asynchronous object storage (DAOS) and oneAPI tools to streamline the development and delivery of fusion energy to the grid in the 2040s.

"Planning for the commercialization of fusion power requires organizations like UKAEA to utilize extreme amounts of computational resources and artificial intelligence for simulations. These HPC workloads may be performed using a variety of different architectures, which is why open software solutions that optimize performance needs can lend portability to code that isn't available in closed, proprietary systems. Overall, advanced hardware and software can make the journey to commercial fusion power lower risk and accelerated - a key benefit on the path to sustainable energy."—Adam Roe, Intel EMEA HPC technical director

IBM Study Finds That CEOs are Embracing Generative AI

A new global study by the IBM Institute for Business Value found that nearly half of CEOs surveyed identify productivity as their highest business priority—up from sixth place in 2022. They recognize technology modernization is key to achieving their productivity goals, ranking it as second highest priority. Yet, CEOs can face key barriers as they race to modernize and adopt new technologies like generative AI.

The annual CEO study, CEO decision-making in the age of AI, Act with intention, found three-quarters of CEO respondents believe that competitive advantage will depend on who has the most advanced generative AI. However, executives are also weighing potential risks or barriers of the technology such as bias, ethics and security. More than half (57%) of CEOs surveyed are concerned about data security and 48% worry about bias or data accuracy.

U.S. Administration Outlines Plan to Strengthen Semiconductor Supply Chains

Today, the U.S. Department of Commerce shared the Biden-Harris Administration's strategic vision to strengthen the semiconductor supply chain through CHIPS for America investments. To advance this vision, the Department announced a funding opportunity and application process for large semiconductor supply chain projects and will release later in the fall a separate process for smaller projects. Large semiconductor supply chain projects include materials and manufacturing equipment facility projects with capital investments equal to or exceeding $300 million, and smaller projects are below that threshold.

The announcement leads into the Biden-Harris Administration's Investing in America tour, where Secretary Raimondo and leaders in the Administration will fan across more than 20 states to highlight investments, jobs, and economic opportunity driven by President Biden's Investing in America agenda and the historic legislation he's passed in his first two years in office, including the bipartisan CHIPS and Science Act.

AVerMedia Introduces Live Streamer MIC 350: Elevate Your Audio Experience with DIRAC Custom Tuning

AVerMedia Technologies, a leading provider of audio and video solutions, is thrilled to unveil the AM350, the world's first USB condenser microphone custom-tuned by DIRAC. With its exclusive tuning technology and remarkable features, the AM350 sets a new standard in audio recording, empowering podcasters, vocal performers, singers, and other use cases to achieve exceptional sound quality and captivating performances.

The AM350 features high-sensitivity capsules and durable metal housing, allowing detailed audio capture and enhanced robustness. The AM350 also offers ultra-low noise performance and includes a built-in pop filter, ensuring clear and clean audio capture. Its plug-and-play USB interface makes it accessible for users of all levels, providing a professional recording experience without the need for additional equipment.

Intel's New Chip to Advance Silicon Spin Qubit Research for Quantum Computing

Today, Intel announced the release of its newest quantum research chip, Tunnel Falls, a 12-qubit silicon chip, and it is making the chip available to the quantum research community. In addition, Intel is collaborating with the Laboratory for Physical Sciences (LPS) at the University of Maryland, College Park's Qubit Collaboratory (LQC), a national-level Quantum Information Sciences (QIS) Research Center, to advance quantum computing research.

"Tunnel Falls is Intel's most advanced silicon spin qubit chip to date and draws upon the company's decades of transistor design and manufacturing expertise. The release of the new chip is the next step in Intel's long-term strategy to build a full-stack commercial quantum computing system. While there are still fundamental questions and challenges that must be solved along the path to a fault-tolerant quantum computer, the academic community can now explore this technology and accelerate research development."—Jim Clarke, director of Quantum Hardware, Intel

Samsung to Detail SF4X Process for High-Performance Chips

Samsung has invested heavily in semiconductor manufacturing technology to provide clients with a viable alternative to TSMC and its portfolio of nodes spanning anything from mobile to high-performance computing (HPC) applications. Today, we have information that Samsung will present its SF4X node to the public in this year's VLSI Symposium. Previously known as a 4HPC node, it is designed as a 4 nm-class node with a specialized use case for HPC processors, in contrast to the standard SF4 (4LPP) node that uses 4 nm transistors designed for low-power standards applicable to mobile/laptop space. According to the VLSI Symposium schedule, Samsung is set to present more info about the paper titled "Highly Reliable/Manufacturable 4nm FinFET Platform Technology (SF4X) for HPC Application with Dual-CPP/HP-HD Standard Cells."

As the brief introduction notes, "In this paper, the most upgraded 4nm (SF4X) ensuring HPC application was successfully demonstrated. Key features are (1) Significant performance +10% boosting with Power -23% reduction via advanced SD stress engineering, Transistor level DTCO (T-DTCO) and [middle-of-line] MOL scheme, (2) New HPC options: Ultra-Low-Vt device (ULVT), high speed SRAM and high Vdd operation guarantee with a newly developed MOL scheme. SF4X enhancement has been proved by a product to bring CPU Vmin reduction -60mV / IDDQ -10% variation reduction together with improved SRAM process margin. Moreover, to secure high Vdd operation, Contact-Gate breakdown voltage is improved by >1V without Performance degradation. This SF4X technology provides a tremendous performance benefits for various applications in a wide operation range." While we have no information on the reference for these claims, we suspect it is likely the regular SF4 node. More performance figures and an in-depth look will be available on Thursday, June 15, at Technology Session 16 at the symposium.

Intel to Demonstrate PowerVia on E-Core Processor Built with Intel 4 Node

At VLSI Symposium 2023, scheduled to take place between June 11-16, Intel is set to demonstrate its PowerVia technology working efficiently on an E-Core chip built using the Intel 4 node. Conventional chips have power and signal interconnects distributed across multiple metal layers. PowerVia, on the other hand, dedicates specific layers for power delivery, effectively separating them from the signal routing layers. This approach allows for vertical power delivery through a set of power-specific Through-Silicon Vias (TSVs) or PowerVias, which are essentially vertical connections between the top and bottom surfaces of the chip. By delivering power directly from the backside of the chip, PowerVia reduces power supply noise and resistive losses, optimizing power distribution and improving overall energy efficiency. PowerVia is set to make a debut in 2024 with Intel 20A node.

For VLSI Symposium 2023 talk, the company has prepared a paper that highlights a design made using Intel 4 technology and implements E-Cores only in a test chip. The document states: "PowerVia Technology is a novel innovation to extend Process Scaling by having Power Delivery on the backside. This paper presents the pre and post silicon findings from implementing an Intel E-Core in PowerVia Technology. PowerVia enabled standard cell utilization of greater than 90 percent in large areas of the core while showing greater than 5 percent frequency benefit in silicon due reduced IR drop. Successful Post silicon debug is demonstrated with slightly higher but acceptable throughput times. The thermal characteristics of the PowerVia testchip is inline with higher power densities expected from logic scaling."

GlobalFoundries Files Lawsuit Against IBM to Protect its Intellectual Property and Trade Secrets

GlobalFoundries (GF) today sued IBM for trade secret misappropriation. The complaint asserts the former semiconductor manufacturing company has unlawfully disclosed GF's confidential IP and trade secrets, after IBM sold its microelectronics business to GF in 2015. The technology at issue was collaboratively developed, over decades, by the companies in Albany, New York and the sole and exclusive right to license and disclose that technology was transferred to GF upon the sale.

In the legal action filed in federal court in the Southern District of New York, GF asserts that IBM unlawfully disclosed GF IP and trade secrets to IBM partners including Intel and Japan's Rapidus, a newly formed advanced logic foundry, and by doing so, IBM is unjustly receiving potentially hundreds of millions of dollars in licensing income and other benefits.

Report Suggests Samsung and LG Pushing Wider Adoption of LED Wall Displays at Cinemas

Samsung and LG are among an number of tech companies reportedly pushing for radical changes in the cinema viewing experience. In a piece published by the Hollywood Reporter last week, new behind-the-scenes information has come to light about an effort to replace the (some will say tried and true) traditional cinema theater projection system with LED walls. The vast majority of international theater chains rely on a front projection method (via a back of the booth), and very few locations have a more state-of-the-art LED display-based system in place. The Culver Theater (naturally located in Culver City, CA) is one of a hundred cinemas worldwide to possess a Samsung Onyx LED display - although the tech on show is said to be of an older standard. Industry insiders have been invited to attend demonstrations of a newer generation LED wall technology destined for cinemas in the future, and early impressions are purported to be mixed.

A cinema-based LED wall display functions in a similar way to how a modern LED-based flat screen TV works - although on a much greater massive scale - with particular benefits of the technology resulting in fantastic performance in terms of high dynamic range and peak brightness. The main downside of having a tightly packed array of large LED panels is the resultant heat output - critics of the technology state that it will be difficult to implement an adequate cooling system (through air conditioning) to tame the wall's temperature increasing properties. The power required to operate the LED panel array (plus required cooling solution) is said to be much higher than that of an old-fashioned projector's relatively modest draw from the electricity supply. An LED wall will also completely negate the traditional placement of loudspeakers behind a cinema's front-placed screen - and sound engineers will need to explore a different method of front audio channel output within the context of a next generation LED theater room.

Report: Worldwide IT Spending in 2023 Continues to Slowly Trend Downward

or the fifth consecutive month, International Data Corporation (IDC) has lowered its 2023 forecast for worldwide IT spending as technology investments continue to show the impact of a weakening economy. In its new monthly forecast for worldwide IT spending growth, IDC projects overall growth this year in constant currency of 4.4% to $3.25 trillion. This is slightly down from 4.5% in the previous month's forecast and represents a swing from a 6.0% growth forecast in October 2022.

"Since the fourth quarter of last year, we have seen clear and measurable signs of a moderate pullback in some areas of IT spending," said Stephen Minton, vice president in IDC's Data & Analytics research group. "Tech spending remains resilient compared to historical economic downturns and other types of business spending, but rising interest rates are now impacting capital spending."

NVIDIA Executive Says Cryptocurrencies Add Nothing Useful to Society

In an interview with The Guardian, NVIDIA's Chief Technical Officer (CTO) Michael Kagan added his remarks on the company and its cryptocurrency position. Being the maker of the world's most powerful graphics cards and compute accelerators, NVIDIA is the most prominent player in the industry regarding any computing application from cryptocurrencies to AI and HPC. In the interview, Mr. Kegan expressed his opinions and argued that newly found applications such as ChatGTP bring much higher value to society compared to cryptocurrencies. "All this crypto stuff, it needed parallel processing, and [Nvidia] is the best, so people just programmed it to use for this purpose. They bought a lot of stuff, and then eventually it collapsed, because it doesn't bring anything useful for society. AI does," said Kegan, adding that "I never believed that [crypto] is something that will do something good for humanity. You know, people do crazy things, but they buy your stuff, you sell them stuff. But you don't redirect the company to support whatever it is."

When it comes to AI and other applications, the company has a very different position. "With ChatGPT, everybody can now create his own machine, his own programme: you just tell it what to do, and it will. And if it doesn't work the way you want it to, you tell it 'I want something different," he added, arguing that the new AI applications have usability level beyond that of crypto. Interestingly, trading applications are also familiar to NVIDIA, as they had clients (banks) using their hardware for faster trading execution. Mr. Kegan noted: "We were heavily involved in also trading: people on Wall Street were buying our stuff to save a few nanoseconds on the wire, the banks were doing crazy things like pulling the fibers under the Hudson taut to make them a little bit shorter, to save a few nanoseconds between their datacentre and the stock exchange."

Biden-Harris Administration Launches First CHIPS for America Funding Opportunity

The Biden-Harris Administration through the U.S. Department of Commerce's National Institute of Standards and Technology today launched the first CHIPS for America funding opportunity for manufacturing incentives to restore U.S. leadership in semiconductor manufacturing, support good-paying jobs across the semiconductor supply chain, and advance U.S. economic and national security.

As part of the bipartisan CHIPS and Science Act, the Department of Commerce is overseeing $50 billion to revitalize the U.S. semiconductor industry, including $39 billion in semiconductor incentives. The first funding opportunity seeks applications for projects to construct, expand, or modernize commercial facilities for the production of leading-edge, current-generation, and mature-node semiconductors. This includes both front-end wafer fabrication and back-end packaging. The Department will also be releasing a funding opportunity for semiconductor materials and equipment facilities in the late spring, and one for research and development facilities in the fall.

Marvell and AWS Collaborate to Enable Cloud-First Silicon Design

Marvell Technology, Inc., a leader in data infrastructure semiconductor solutions, announced today that it has selected Amazon Web Services, Inc. (AWS) as its cloud provider for electronic design automation (EDA). A cloud-first approach helps Marvell to rapidly and securely scale its service on the world's leading cloud, rise to the challenges brought by increasingly complex chip design processes, and deliver continuous innovation for the expanding needs across the automotive, carrier, data center, and enterprise infrastructure markets it serves. The work extends the longstanding relationship between the two companies—Marvell is also a key semiconductor supplier for AWS, helping the company support the design and rapid delivery of cloud services that best meet customers' demanding requirements.

EDA refers to the specialized and compute-intensive processes used in chip making and is a critical piece of Marvell's R&D. Over the years, the number of transistors on an integrated chip has increased exponentially. Each advance in chip design calls for a calculated application of software modules overseeing logic design, debugging, component placement, wire routing, optimization of time and power consumption, and verification. Due to the computationally intensive nature of EDA workloads, it is no longer cost-effective or timely to run EDA on premises. By powering its EDA with AWS, Marvell leverages an unmatched portfolio of services including secure, elastic, high-performance compute capacity in the cloud to solve challenges around speed, latency, security of IP, and data transfer.

NVIDIA GTC 2023 to Feature Latest Advances in AI Computing Systems, Generative AI, Industrial Metaverse, Robotics; Keynote by Jensen Huang

NVIDIA today announced that company founder and CEO Jensen Huang will deliver the opening keynote at GTC 2023, covering the latest advancements in generative AI, the metaverse, large language models, robotics, cloud computing and more. More than 250,000 people are expected to register for the four-day event, which will include 650+ sessions from researchers, developers and industry leaders in virtually every computing domain. GTC will also feature a fireside chat with Huang and OpenAI co-founder Ilya Sutskever, plus talks by DeepMind's Demis Hassabis, Stability AI's Emad Mostaque and many others.

"This is the most extraordinary moment we have witnessed in the history of AI," Huang said. "New AI technologies and rapidly spreading adoption are transforming science and industry, and opening new frontiers for thousands of new companies. This will be our most important GTC yet."

Airvine Announces New "WaveTunnel" Product Line to Meet Rapidly Growing Indoor Broadband Requirements

Airvine, the first company to develop a multi-Gigabit-speed wireless backhaul system for indoor connectivity, today announced the general availability of its WaveTunnel product line. The shoebox-sized module mounts on ceilings and other interior high points to provide high speed connectivity for the ever-expanding menu of enterprise applications, whether IT (Information Tech) or OT (Operational Tech). WaveTunnel systems, which can be installed in hours, fill the broadband gap that exists within many large interior spaces by extending LAN reach or upgrading the performance of older 1 Gb/s Ethernet CAT 5 cables.

WaveTunnel operates in the interference-free 60 GHz band, where there is also plenty of spectrum to provide on first release a multi-Gb/s backbone connectivity capability. Typically, 60 GHz systems operate on a line-of-sight (LOS) basis. WaveTunnel, however, can penetrate most indoor walls as well as "beam steer" around corners, making it a true non-LOS 60 GHz system. This breakthrough capability greatly simplifies and expedites network set-up and operational readiness.

TSMC Holds 3nm Volume Production and Capacity Expansion Ceremony, Marking a Key Milestone for Advanced Manufacturing

TSMC today held a 3 nanometer (3 nm) Volume Production and Capacity Expansion Ceremony at its Fab 18 new construction site in the Southern Taiwan Science Park (STSP), bringing together suppliers, construction partners, central and local government, the Taiwan Semiconductor Industry Association, and members of academia to witness an important milestone in the Company's advanced manufacturing.

TSMC has laid a strong foundation for 3 nm technology and capacity expansion, with Fab 18 located in the STSP serving as the Company's GIGAFAB facility producing 5 nm and 3 nm process technology. Today, TSMC announced that 3 nm technology has successfully entered volume production with good yields, and held a topping ceremony for its Fab 18 Phase 8 facility. TSMC estimates that 3 nm technology will create end products with a market value of US$1.5 trillion within five years of volume production.

TechPowerUp x Team Group T-Force Giveaway: Entries Close in a Day, Hurry!

TechPowerUp in partnership with Team Group are giving away six pieces of Team Group T-Force gaming hardware. We've actually been at this since November 14, and entries close tomorrow, November 25. That leaves you with a day to fill up a tiny form and answer a couple of quizzy questions on Team Group; for a chance to win a T-Force Delta RGB DDR5-6400 CL40 32 GB (2x 16 GB) memory kit, or one of five Vulcan Z 1 TB SSDs! The Delta RGB DDR5 would be a great addition to your next-generation desktop build, as its DDR5-6400 frequency goes great with the latest "Raptor Lake" and "Zen 4" processors! The Vulcan Z 1 TB makes for a decent game storage drive to add some room to your game library. Both look great when powered up and viewed through a tempered glass panel! Hurry up!

For more details, and to participate, visit this page. Entries close November 25 (tomorrow).

Chinese Chip Makers are Trying to Circumvent US Sanctions by Slowing Down Chip Performance

In what can only be called an unusual move, several Chinese fabless chip makers—such as Alibaba and Biren Technology—who manufacturers at TSMC, are looking at running their chips slower. The reason for this is that they're trying to circumvent the US sanctions against Chinese chip makers. It should be noted that these are chips that have already taped out and gone into sample production, such as Biren's BR100 GPU.As reported earlier today, Alibaba even had one of its chips delisted from the official SPEC ranking, due to being unavailable and it's possible that it's one of the chips that's affected by the US sanctions.

Considering that the Chinese chip makers are dependent on the same cutting edge nodes at TSMC as the likes of Nvidia, AMD, Qualcomm etc. it would potentially lead to more capacity for these companies at TSMC. According to the report by the Financial Times, Biren has had to stop shipments of its GPUs, as the company is going to have to prove that its chips don't violate the US export control restrictions. Apparently the rules to work out if a chip falls under the US sanctions or not are anything but clear. One metric is apparently based on the bidirectional transfer rate, which is capped at below 600 GB/s between chips, but the tricky part is that this metric can be calculated in several different ways. As such, Biren has dropped the transfer rate from 640 to 576 GB/s according to the Financial Times. The sanctions are likely to cause longer term concerns for TSMC as well, as the company is likely to lose several big customers for its cutting edge nodes, at least for the time being.

Semiconductor Climate Consortium Representatives to Present During 2022 United Nations Climate Change Conference (COP27)

SEMI, the industry association serving the global electronics manufacturing and design supply chain, today announced that members of the new Semiconductor Climate Consortium (SCC) will discuss key aspects of the group's vision, goals and membership at two sessions during COP27 in Sharm El-Sheik, Egypt.

On Nov. 10 from 8:30am to 10:00am at Hotel Steigenberger Alcazar, the panel discussion SCC Collaboration for Solutions on Climate, with opening remarks by former U.S. Vice President Al Gore, will feature SCC founding members including ASM, ASMPT, Samsung Electronics and Schneider Electric discussing the importance of collaboration, transparency and reporting across the semiconductor value chain. Dr. Mousumi Bhat, Vice President of Sustainability Programs at SEMI, and Mark Patel, Senior Partner at McKinsey & Company, will also speak at the gathering.

Apple Terminates Plans to Use YMTC 3D NAND Chips Amid Political Pressure

In September, we reported that Apple, the world's most valuable company, would source some of its 3D NAND flash chips from the Chinese Yangtze Memory Technologies Corp (YMTC). However, according to the latest political pressure from the US government, Apple has reportedly canceled any contracts with the Chinese company and will not include their 3D NAND chips in the production of iPhones, iPads, and Mac computers. Even with YTMC's Xstacking 3.0 six-plane architecture that provides triple-level cell storage with I/O speeds of 2400 MT/s, Apple is not going to source any NAND Flash memory as US-China political relationship gets tighter regulations.

However, this could not be a deal breaker for both companies, as NAND Flash is in high demand, and new clients will emerge. As for Apple, the company has contracts with Kioxia, SK Hynix, Samsung, and possibly others that will ensure a steady supply of storage for the company's solutions.

Apple to Source 3D NAND Memory from Chinese YMTC

As reported by BusinessKorea, Apple, one of the largest companies in the world, will source its 3D NAND from Chinese memory maker Yangtze Memory Technologies Corp (YMTC). Known for supplying 3D NAND to Chinese SSD makers, YTMC's reported contract with Apple will fuel the upcoming iPhone 14 SKU manufacturing. Whether or not this partnership will expand to other products, it is essential to have as many storage sources as possible, as Apple sells millions of devices per year. YTMC is on track to deliver 3D NAND flash with the latest Xstacking 3.0 six-plane architecture that provides triple-level cell storage with I/O speeds of 2400 MT/s.

YTMC has joined the list of 3D NAND flash vendors that Apple works with, including SK Hynix, Samsung, Kioxia, and possibly others. This partnership also highlights that the Chinese memory output is sufficient and significant enough to break into more markets worldwide, not remaining exclusive to domestic use.
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