Last year, we introduced the AMD Versal AI Edge Series Gen 2 and Versal Prime Series Gen 2, two extensions to the Versal portfolio that enable single-chip intelligence for embedded systems. Versal Prime Series Gen 2 devices offer up to 10X scalar compute vs. current production AMD adaptive SoCs, coupling programmable logic for flexible, real-time sensor processing with high-performance embedded compute. The Versal AI Edge Series Gen 2 builds on this architecture, adding next-generation AI Engines to deliver end-to-end acceleration of preprocessing, inference, and postprocessing for edge AI applications.

Today, I'm excited to announce several significant product milestones: Versal AI Edge Series Gen 2 devices are now sampling to multiple early access customers, and Versal Prime Series Gen 2 devices are on track to begin sampling by mid-year. Additionally, with the release of the 2025.1 design tools, these product lines are moving from early access to general access. This means all customers can now directly review product documentation or evaluate these devices with AMD Vivado Design Suite and the Vitis Unified Software Platform.

This year marks the 40th anniversary of the first commercially available field-programmable gate array (FPGA), introducing the idea of reprogrammable hardware. By creating "hardware as flexible as software," FPGA reprogrammable logic changed the face of semiconductor design. For the first time, developers could design a chip, and if specs or requirements changed mid-stream, or even after manufacturing, they could redefine its functionality to perform a different task. This flexibility enabled more rapid development of new chip designs, accelerating time to market for new products and providing an alternative to ASICs.

The impact on the market has been phenomenal. FPGAs launched a $10+ billion industry and over the past four decades we have shipped more than 3 billion FPGAs and adaptive SoCs (devices combining FPGA fabric with a system-on-chip and other processing engines) to more than 7,000 customers across diverse market segments. In fact, we've been the programmable logic market share leader for the past 25 consecutive years, and we believe we are well positioned for continued market leadership based on the strength of our product portfolio and roadmap.

Synopsys, Inc. today announced the expansion of its industry-leading hardware-assisted verification (HAV) portfolio with new HAPS prototyping and ZeBu emulation systems using the latest AMD Versal Premium VP1902 adaptive SoC. The next generation HAPS-200 prototyping and ZeBu-200 emulation systems deliver improved runtime performance, better compile time and improved debug productivity. They are built on new Synopsys Emulation and Prototyping (EP-Ready) Hardware that optimizes customer return on investment by enabling emulation and prototyping use cases via reconfiguration and optimized software. ZeBu Server 5 is enhanced to deliver industry-leading scalability beyond 60 billion gates (BG) to address the escalating hardware and software complexity in SoC and multi-die designs. It continues to offer industry-best density to optimize data center space utilization.

"With the industry approaching 100s of billions of gates per chip and 100s of millions of lines of software code in SoC and multi-die solutions, verification of advanced designs poses never-before seen challenges," said Ravi Subramanian, chief product management officer, Synopsys. "Continuing our strong partnership with AMD, our new systems deliver the highest HAV performance while offering the ultimate flexibility between prototyping and emulation use. Industry leaders are adopting Synopsys EP-Ready Hardware platforms for silicon to system verification and validation."

AMD today announced the expansion of the AMD Versal adaptive system-on-chip (SoC) portfolio with the introduction of the Versal RF Series that includes the industry's highest compute performance in a single-chip device with integrated direct radio frequency (RF)-sampling data converters.

Versal RF Series offers precise, wideband-spectrum observability and up to 80 TOPS of digital signal processing (DSP) performance in a size, weight, and power (SWaP)-optimized design, targeting RF systems and test equipment applications in the aerospace and defense (A&D) and test and measurement (T&M) markets, respectively.

AMD on Tuesday released its flagship FPGA series, and possibly its most important product launch after the company's Xilinx acquisition, the Versal Premium Series Gen 2 SoC. It's hard to call this an FPGA, much in the same way as it's hard to call a modern processor "a CPU," there are many integrated devices, platform interfaces, and application-specific accelerators, and much in the same way, the Versal Premium Series Gen 2 is marketed as an "adaptive SoC," rather than a really powerful FPGA. Speaking of I/O, this is AMD's first product to implement PCI-Express Gen 6 and CXL 3.1.

There's no host platform that currently support these standards—neither EPYC "Turin" nor Xeon 6 "Granite Rapids," but it goes to show that the chip is future-ready and can put the new I/O standards to use. The chip is designed to be implemented as a standalone SoC, and so it supports both DDR5 RDIMMs and LPDDR5X, giving end-users the flexibility to go with the two vastly different memory standards depending on what their application is. These capabilities make the Versal Premium Series Gen 2 well-suited for demanding applications in sectors like data centers, communications, test and measurement, aerospace, and defense, where high-speed data processing is critical.

AMD today announced the expansion of the AMD Versal adaptive system on chip (SoC) portfolio with the new Versal AI Edge Series Gen 2 and Versal Prime Series Gen 2 adaptive SoCs, which bring preprocessing, AI inference, and postprocessing together in a single device for end-to-end acceleration of AI-driven embedded systems.

These initial devices in the Versal Series Gen 2 portfolio build on the first generation with powerful new AI Engines expected to deliver up to 3x higher TOPs-per-watt than first generation Versal AI Edge Series devicesi, while new high-performance integrated Arm CPUs are expected to offer up to 10x more scalar compute than first gen Versal AI Edge and Prime series devicesii.

AMD today announced the launch of AMD Embedded+, a new architectural solution that combines AMD Ryzen Embedded processors with Versal adaptive SoCs onto a single integrated board to deliver scalable and power-efficient solutions that accelerate time-to-market for original design manufacturer (ODM) partners. Validated by AMD, the Embedded+ integrated compute platform helps ODM customers reduce qualification and build times for faster time-to-market without needing to expend additional hardware and R&D resources. ODM integration using Embedded+ architecture enables the use of a common software platform to develop designs with low power, small form factors, and long lifecycles for medical, industrial, and automotive applications.

"In automated systems, sensor data has diminishing value with time and must operate on the freshest information possible to enable the lowest latency, deterministic response," said Chetan Khona, senior director of Industrial, Vision, Healthcare and Sciences Markets, AMD. "In industrial and medical applications, many decisions need to happen in milliseconds. Embedded+ maximizes the value of partner and customer data, with energy efficiency and performant computing that enables them to focus in turn on addressing their customer and market needs."