Recent reports peg AMD's upcoming line of microprocessors based on Zen micro-architecture as being labelled SR3, SR5 and SR7 for different hardware tiers (with the SR3 being the lowest-performing, and SR7 being, naturally, the highest-performing). A recent post on Chip Hell claims that a leaked slide from an AMD presentation give us these insights, with further information on pricing: it's shown in the roadmap that all Zen SR (Summit Ridge) processors will sell for higher than RMB 1500 ($220).

AMD is expected to offer either four-core or eight-core designs on their lineup (with eventual Simultaneous Multi Threading differentiation, like Intel does between their i5 and i7 lines) still being up in the air. And in what would mark a divergence from their recent movement in the GPU space, where AMD introduced their latest Polaris architecture at the highest-volume market of about $200, AMD's Zen efforts are expected to begin from the top, with the dubbed "SR7" enthusiast-grade products first, and trickling down the market scale eventually.

If AMD's plans come to fruition, the company's efforts with its Zen micro-architecture will bring it back towards competitiveness with Intel not only on consumer chips, but also on the enterprise segment. While the company's consumer efforts are, by and large, the most visible from a consumer standpoint, with great hopes being pinned on it as a means to inject some much-needed dynamism and innovation in the CPU landscape, the most important vector for AMD arguably stands with the enterprise segment - where margins are usually much greater than in the consumer market.

AMD's upcoming 8-core "ZEN" processors pack serious multithreaded performance muscle. The company's design focus on empowering the cores, and getting rid of the shared-resource approach to multi-core chips; appears to have paid of big dividends in multithreaded performance, as tested on the Blender benchmark. An 8-core "ZEN" engineering sample was found to be belting out performance rivaling 10-core Intel Xeon E5-2600 V2 series chips, indicating that AMD appears to have made huge gains in per-core performance over its previous generation chips.

The Blender benchmark scores of an alleged AMD ZEN "Summit Ridge" engineering sample were posted by Blender benchmark scores aggregator Blenchmark; and unearthed by this redditor. According to these scores, the "ZEN" sample cruches the Blender benchmark render in 69 seconds, the same time it takes for a 10-core Xeon E5-2650 V2 processor. The ZEN chip is also closely trailing Xeon E5-2600 V4 series chips. AMD is expected to launch its first ZEN "Summit Ridge" 8-core processors in early 2017.

Ahead of their launch later this year, to cater to the 7th generation AMD A-series "Bristol Ridge" APUs, with support for next-generation "ZEN" processors due in 2017, two GIGABYTE socket AM4 motherboards smiled for the camera. The two appear to be based on either AMD's entry-level A320 or mid-range B350 chipsets. Since the AM4 chips are true-blue SoCs with complete integration of chipsets, including what you'd normally call a southbridge or FCH; the "chipsets" in the AM4 platform are merely chips that add to the PCIe lane budget of the platform, and provide additional SATA and USB connectivity.

The first of the two GIGABYTE AM4 boards is built in the narrow micro-ATX form-factor; featuring a single PCI-Express 3.0 x16 slot, two DDR4 DIMM slots, four SATA 6 Gb/s ports, and basic connectivity that includes 6-channel HD audio, one gigabit Ethernet connection, and 4-6 USB 3.0 ports. The second board is better endowed, and is likely a variation of the socket AM4 board that was earlier pictured this September. It features two PCI-Express 3.0 x16 ports (the second one could be electrical x4); and comes with two additional SATA 6 Gb/s and USB 3.0 ports compared to the other board.

Thanks to AMD's incorporation of an ARM-based "AMD Secure Processor" in their upcoming ZEN micro-architecture, the company is poised to offer something competitor Intel's microprocessors yet don't: memory encryption. This processor, and its underlying technologies, could prove to be a stepping-stone for AMD towards regaining lost server market share. Essentially, because in a market ever more steered by cloud computing considerations, it allows for the client's data to be encrypted at every moment of the work chain. Assuming all works as intended, for the first time not even cloud providers, with either hypervisor-level privileges or even physical access to the servers, will be able to carry out any malicious actions against their clients.

One only has to consider the writing on the wall: Morgan Stanley predicts that by 2018, 30% of Microsoft's revenue will stem from its cloud services; Amazon Web Services (AWS) generated $7.88B in revenue on Q4 2015, up 69% over 2014; and worldwide spending on public cloud services by itself will grow from $70B in 2015 to an estimated $141B in 2019. Cloud computing is here to stay, and with security being as important as it is for some businesses, this is an important area of investment for AMD. This "AMD Secure Processor" will work on essentially two fronts: SME (Secure Memory Encryption) and SEV (Secure Encrypted Virtualization), backed by an hardware-based SHA (Secure Hash Algorithm).

AMD is reportedly "aggressively clearing" its inventories of current-generation processors, such products in the AM3+ and FM2+ packages; to make room for next-generation processors based on the "ZEN" architecture, and new 7th generation A-series "Bristol Ridge" APUs, both of which are built in the new socket AM4 package. You should be able to find AMD FX CPUs at attractive prices, so current 4-core and 6-core users could be lured to upgrade to faster 8-core chips, including those featuring the company's Wraith silent CPU cooler.

Taiwan industry observer DigiTimes reports that AMD will launch its next-generation "ZEN" processors, and motherboards based on the high-end X370 chipset, alongside the 2017 International CES expo, in early January. 2017 promises to be a big year for the company as it's not only attempting to regain competitiveness in the performance desktop CPU space, but also high-end graphics, with its Radeon "VEGA" family.

AMD will follow up its Q1-2017 launch of socket AM4 desktop processors and APUs based on the "ZEN" microarchitecture, with single-chip mobile processors and APUs in the following quarter, according to an Expreview report. These solutions could take advantage of the fact that "ZEN" CPUs and APUs completely integrate platform core-logic (chipsets), even though on the desktop platform, AMD is launching the A320, B350, and X370 chipsets to expand connectivity given out by the SoCs.

With requirements for fewer M.2, SATA, and USB 3.0 ports on mobile platforms such as notebooks, designs that completely do away with the chipset should theoretically be possible, and the company could use this to score design wins. Intel currently offers CPU and PCH on single packages, as multi-chip modules (MCMs).

AMD is readying three motherboard chipsets for its next-generation socket AM4 desktop platform. With its 7th generation A-series "Bristol Ridge" APUs, the company launched the A320 mainstream and B350 premium motherboard chipsets, while keeping a better-endowed high-end chipset under the wraps, which makes its debut with the ZEN "Summit Ridge" processors. It turns out that this chipset is the AMD X370. The X370 chipset will debut with the first ZEN "Summit Ridge" processors along the sidelines of the 2017 International CES, next January.

AMD "Summit Ridge" desktop processors, much like the 7th generation A-series APUs they share the platform with, are SoCs, in that the chips combine the entire platform core-logic along with the CPU and its relevant uncore components. AMD is still giving this platform a sort of chipset, which adds to the number of SATA, USB, and general-purpose PCI-Express connectivity that the processor gives out. The AMD X370 should feature more 10 Gb/s USB 3.1 ports, SATA 6 Gb/s ports, 32 Gb/s M.2 or U.2 ports, and general-purpose PCIe lanes than what the B350 offers. This chipset should drive motherboards that are ready for multi-GPU setups.

Microsoft recently sparked a stir when it was reported that the company will support upcoming CPU architectures by Intel and AMD only on Windows 10, with the keyword being "support" and not "compatibility." This means that Microsoft will offer customer-support and likely serve updates to Intel "Kaby Lake" and AMD "ZEN" machines only running Windows 10 (and its enterprise variant Windows Server 2016, based on the NT 10 kernel), and not older versions of Windows. The processors themselves are compatible with any x86 operating system, Windows or *nix, 32-bit or 64-bit. HotHardware dug out the likely causes of this decision.

Apparently, new power-management and SMT features are behind the decision. With its "Kaby Lake" microarchitecture, Intel is introducing a new power-management feature called Speed Shift Technology. This lets the processor adjust its clock-speed to match processing loads at response time of 15 ms. This likely requires OS-level hooks, so the on-die power-management components can poll for processing loads and accordingly raise or lower clock-speeds 66.66 times each second, at no CPU cost. In its ZEN microarchitecture reveal, AMD too spoke about fine-grained, multi-domain clock-gating (≠ power-gating) on its "ZEN" based processors, such as "Summit Ridge."

AMD today unveiled its 7th generation A-series desktop APUs. Unlike its predecessors, the new chips are full-fledged SoCs, built in the new socket AM4 package, on which the company plans to launch its "Zen" processors. The 7th gen A-series APUs are based on the "Bristol Ridge" silicon, and are the first fully-integrated SoCs (systems-on-chip) from the company in the performance-desktop segment, in that the APU completely integrates the functionality of a motherboard chipset, including its FCH or southbridge.

This level of integration includes PCI-Express root-complex, USB 3.0, and storage interfaces such as SATA 6 Gb/s emerging directly from the AM4 socket. Some AM4 motherboards could still include a sort of "chipset," which expands connectivity options, such as USB 3.1 ports, additional SATA ports, and a few more downstream PCI-Express lanes. The amount of downstream connectivity and features decide the grade of the chipset. AMD is initially launching two chipsets, the A320 for the entry-level segment, and the B350 for mainstream desktops. The company plans to launch an even more feature-rich chipset at a later date (probably alongside ZEN "Summit Ridge" CPUs).

If you're holding out on Windows 7 as your PC gaming platform, you may also want to hold out on your current hardware for a long while. Microsoft is making good on a warning it made earlier this year, that it would not provide support to users of upcoming processors on older Windows operating systems. At their launch, Intel's 7th generation Core "Kaby Lake" processors and AMD "Summit Ridge" and "Bristol Ridge" will receive support from Microsoft only on the Windows 10 operating system. Older Windows versions will not receive drivers from Microsoft that support the new platforms. This is similar to Microsoft cutting off support for Windows XP from Intel's 3rd generation Core "Ivy Bridge" processors.

Without platform support, your Windows installation won't utilize many of the CPU features introduced with "Kaby Lake" and "Zen" and will likely run on a bare-minimum compatibility mode. This effectively cuts off PC enthusiasts from using older Windows versions on new hardware, such as the still-popular Windows 7. Non-Microsoft operating systems such as the latest *nix distributions such as ChromeOS, SteamOS, and OS X are still fully compatible with the upcoming chips.

In a leaked presentation meant for its investors, AMD states that it expects to launch the "Vega" GPU architecture no sooner than 2017. The company plans to get it out within the first half of 2017. What makes this decision significant is that the company isn't planning on making bigger GPUs on its existing "Polaris" architecture, and its biggest product is the $249 Radeon RX 480. This leaves the company's discrete GPU lineup virtually untended at key price-points above, against NVIDIA's GeForce GTX 1070, GTX 1080, and TITAN X Pascal, at least for the next five months.

In the mean time, AMD could launch additional mobile SKUs based on the Polaris 10 and Polaris 11 chips. The reasons behind this slow-crawl could be many - AMD could be turning its chip-design resources to the various semi-custom SoCs it's working on, for Microsoft and Sony, with their next-generation game consoles; AMD Vega development could also be running in-sync with market availability of HBM2 memory. 2017 promises to be a hectic year for AMD, with launch of not just Vega, but also its "ZEN" CPU architecture, the "Summit Ridge" processor, and APUs based on the CPU micro-architecture.

AMD Tuesday hosted a ZEN microarchitecture deep-dive presentation in the backdrop of Hot Chips, outlining its road to a massive 40 percent gain in IPC (translated roughly as per-core performance gains), over the current "Excavator" microarchitecture. The company credits the gains to three major changes with ZEN: better core engine, better cache system, and lower power. With ZEN, AMD pulled back from its "Bulldozer" approach to cores, in which two cores share certain number-crunching components to form "modules," and back to a self-sufficient core design.

Beyond cores, the next-level subunit of the ZEN architecture is the CPU-Complex (CCX), in which four cores share an 8 MB L3 cache. This isn't different from current Intel architectures, the cores share nothing beyond L3 cache, making them truly independent. What makes ZEN a better core, besides its independence from other cores, and additional integer pipelines; subtle upscaling in key ancillaries such as micro-Op dispatch, instruction schedulers; retire, load, and store queues; and a larger quad-issue FPU.

We've been chasing AMD Zen for a long time now. Our older report from April 2015 uncovered an important detail about component organization on Zen processors - the clumping of four CPU cores into a highly-specialized, possibly indivisible subunit referred to then, as the "Zen Quad-core Unit." Some of the latest presentations about the architecture, following AMD's "performance reveal" event from earlier this month, shed more light on this quad-core unit.

AMD is referring to the Zen quad-core unit as the CPU-Complex (CCX). Each CCX is a combination of four independent CPU cores. Unlike on "Bulldozer," a "Zen" core does not share any of its number-crunching machinery with neighboring cores. Each "Zen" core has a dedicated L2 cache of 512 KB, and four Zen cores share an 8 MB L3 cache. AMD will control core-counts by controlling CCX units. A "Summit Ridge" socket AM4 processor features two CCX units (making up eight cores in all), sharing a dual-channel DDR4 memory controller, and the platform core-logic (chipset), complete with an integrated PCI-Express root complex. Socket AM4 APUs will feature one CCX unit, and an integrated GPU in place of the second CCX. With this, AMD is able to bring the two diverse desktop platforms under one socket.

At an event last night in San Francisco, AMD provided additional architectural details and a first look at the performance of its next-generation, high-performance "Zen" processor core. AMD demonstrated the "Zen" core achieving a 40% generational improvement in instructions per clock, delivering a landmark increase in processor performance.

During the event, AMD demonstrated an 8-core, 16-thread "Summit Ridge" desktop processor (featuring AMD's "Zen" core) outperforming a similarly configured 8-core, 16-thread Intel "Broadwell-E" processor when running the multi-threaded Blender rendering software with both CPUs set to the same clock speed. AMD also conducted the first public demonstration of its upcoming 32-core, 64-thread "Zen"-based server processor, codenamed "Naples," in a dual processor server running the Windows Server operating system.

According to performance numbers of an AMD "Summit Ridge" ZEN CPU engineering-sample put out by WCCFTech, AMD's claims of IPC gains are gaining credibility, and showing signs of the gaming PC processor market warming up again. An engineering sample featuring 8 cores and 16 threads (via SMT), beat Intel's Core i5-4670K processor. This sample featured clock speeds of 2.80 GHz, with 3.20 GHz boost.

The "Summit Ridge" sample provided 10 percent higher frame-rates than a Core i5-4670K, in the "Ashes of the Singularity" 1080p benchmark. The chip is still convincingly beaten by 12 percent, by a Core i7-4790 (non-K), running at 3.60 GHz, with 4.00 GHz boost. This shows that AMD could leverage the new 14 nm FinFET process to crank up clock-speeds, and produce SKUs competitive with current Intel "Skylake-D" Core i5 and Core i7 processors.

It looks like Microsoft will overpower Sony in the next round of the console wars, with a more powerful SoC on paper. The new XBOX "Scorpio" 4K Ultra HD game console will feature a custom-design SoC by AMD, which will combine not just a GPU based on the "Polaris" architecture, but also a CPU based on the "Zen" microarchitecture. This is significant because it sees a departure from using 8 smaller "Jaguar" CPU cores, and upshifts to stronger "Zen" ones. The chip could be built on the 14 nm process.

The SoC powering the XBOX Scorpio could feature a CPU component with eight "Zen" CPU cores, with SMT enabling 16 logical CPUs, and a "Polaris" GPU with 6 TFLOP/s of compute power. The combined compute power is expected to be close to 10 TFLOP/s. The Radeon RX 480, for instance features 5.84 TFLOP/s of power at its given clock speed. The CPU and GPU will likely share a common memory interface, belting out a memory bandwidth of 320 GB/s. The silicon muscle of this console should power 4K Ultra HD, 1080p @ 60 Hz HDR, and "good VR" solutions such as the Oculus Rift and HTC Vive. Games for the console could leverage DirectX 12.

Sources tell Bits'n'Chips that AMD could use a common 8-core CPU die based on its upcoming "Zen" architecture over multiple CPU SKUs, at least initially. AMD will have two distinct kinds of processors, those with integrated graphics (APUs) based on the "Bristol Ridge" silicon, and those without integrated graphics (CPUs), based on the "Summit Ridge" silicon. Since products based on both the dies will use a common socket on the desktop (socket AM4), consumers looking for 2-4 CPU cores will be presented with APU options, while those looking for more powerful CPU solutions will be made to choose 8-core CPUs based on the "Summit Ridge" silicon.

CERN engineer Liviu Valsan, in a recent presentation on datacenter hardware trends, presented a curious looking slide that highlights some of the key features of AMD's upcoming "Zen" CPU architecture. We know from a recent story that the architecture is scalable up to 32 cores per socket, and that AMD is building these chips on the 14 nanometer FinFET process.

Among the other key features detailed on the slide are symmetric multi-threading (SMT). Implemented for over a decade by Intel as HyperThreading Technology, SMT exposes a physical core as two logical CPUs to the software, letting it make better use of the hardware resources. Another feature is talk of up to eight DDR4 memory channels. This could mean that AMD is readying a product to compete with the Xeon E7 series. Lastly, the slide mentions that "Zen" could bring about IPC improvements that are 40 percent higher than the current architecture.

AMD's next-generation "Zen" x86-64 CPU micro-architecture will support up to 32 cores per socket, according to leaked Linux kernel patch on LKML. We know from older reports, that AMD clumps groups of four cores in subunits it calls "Zen quad-core units." Not to be confused with its current "module" design, a quad-core unit is a group of four completely independent cores, which share nothing other than an L3 cache. TechFrag used this bit to deduce that the "Zen" architecture is scalable up to eight quad-core units per socket, or 32 cores per socket.

AMD "Zen" CPU micro-architecture has a design focus on significantly increasing per-core performance, particularly per-core number-crunching performance, according to a 3DCenter.org report. It sees a near doubling of the number of decoder, ALU, and floating-point units per-core, compared to its predecessor. In essence, the a Zen core is AMD's idea of "what if a Steamroller module of two cores was just one big core, and supported SMT instead."

In the micro-architectures following "Bulldozer," which debuted with the company's first FX-series socket AM3+ processors, and running up to "Excavator," which will debut with the company's "Carrizo" APUs, AMD's approach to CPU cores involved modules, which packed two physical cores, with a combination of dedicated and shared resources between them. It was intended to take Intel's Core 2 idea of combining two cores into an indivisible unit further.

GlobalFoundries' move to leapfrog several silicon fab steps to get straight to 14 nanometer (nm) is on the verge of paying off, with the company taping out its 14 nm LPP (low-power plus) FinFET node, and claiming good yields on its test/QA chips. This takes the node one step closer to accepting orders for manufacturing of extremely complex chips, such as CPUs and GPUs.

AMD is expected to remain the company's biggest client, with plans to build its next-generation "Zen" processor on this node. The company's "Arctic Islands" graphics chips are also rumored to be built on the 14 nm node, although which foundry will handle its mass production remains unclear. A big chunk of AMD's R&D budget is allocated to getting the "Zen" architecture right, with key stages of its development being handled by Jim Keller, the brains behind some of AMD's most commercially successful CPU cores.

In what is a confirmation that AMD has killed socket AM3+ and its 3-chip platform, a leaked slide that's part of a larger press-deck addressing investors, tells us that the company is planning to launch a high-performance desktop processor targeting enthusiasts, based on its next-generation "Zen" architecture, in 2016. Our older articles detail the Zen CPU core design, and the way in which AMD will build multi-core CPUs with it. This processor will be codenamed "Summit Ridge," and will be a CPU, and not an APU as previously reported. In AMD-speak, what sets a CPU apart from an APU is its lack of integrated graphics.

AMD "Summit Ridge" will be an 8-core CPU built on the 14 nanometer silicon fab process. It will feature eight "Zen" cores, with 512 KB of L2 cache per core, 16 MB of L3 cache, with 8 MB shared between two sets of four cores, each; a dual-channel integrated memory controller that likely supports both DDR3 and DDR4 memory types; and an integrated PCI-Express gen 3.0 root complex, with a total of 22 lanes. We can deduce this from the fact that "Summit Ridge" will be built in the same upcoming socket FM3 package, which the company's "Bristol Ridge" Zen-based APU will be built on. "Summit Ridge" will hence be more competitive with Intel's 6th generation Core "Skylake" processors, such as the i7-6700K and i5-6600K, than the company's "Broadwell-E" HEDT platform.

Some of the first CPUs and APUs based on AMD's next-generation "Zen" micro-architecture could be quad-core. "Zen" will be AMD's first monolithic core design after a stint with multi-core modules, with its "Bulldozer" architecture. Our older article details what sets Zen apart from its predecessor. As expected, in a multi-core chip, Zen cores share no hardware resources with each other, than a last-level cache (L3 cache), much like Intel's current CPU architecture.

There's just one area where Zen will differ from Haswell. With Haswell, Intel has shown that it can clump any number of cores on a chip, and make them share a proportionately large L3 cache. Haswell-E features 8 cores sharing a 20 MB cache. The Haswell-EX features 18 cores sharing 45 MB of cache. With Zen, however, the scale up stops at 4 cores sharing 8 MB of L3 cache. A set of four cores makes up what AMD calls a "quad-core unit." To be absolutely clear, this is not a module, the cores share no hardware components with each other, besides the L3 cache.

As a quick follow up to our older report on AMD's upcoming "Zen" CPU core micro-architecture being a reversion to the monolithic core design, and a departure from its "Bulldozer" multicore module design which isn't exactly flying off the shelves, a leaked company slide provides us the first glimpse into the core design. Zen looks a lot like "Stars," the core design AMD launched with its Phenom series, except it has a lot more muscle, and one could see significant IPC improvements over the current architecture.

To begin with, Zen features monolithic fetch and decode units. On Bulldozer, two cores inside a module featured dedicated decode and integer units with shared floating-point units. On Zen, there's a monolithic decode unit, and single integer and floating points. The integer unit has 6 pipelines, compared to 4 per core on Bulldozer. The floating point unit has two large 256-bit FMAC (fused-multiply accumulate) units, compared to two 128-bit ones on Bulldozer. The core has a dedicated 512 KB L2 cache. This may be much smaller than the 2 MB per module on Bulldozer, but also indicate that the core is able to push through things fast enough to not need cushioning by a cache (much like Intel's Haswell architecture featuring just 256 KB per core). In a typical multi-core Zen chip, the cores will converge at a large last-level cache, which routes data between them to the processor's uncore, which will feature a DDR4 IMC and a PCI-Express 3.0 root complex.