Closer Examination

The card itself looks like an over-sized network card with a massive K-shaped nickel plated heatsink on top making the card look anything but ordinary.


Size-wise this card is substantially bigger than a normal card. The card you see above the KillerNIC M1 is my old NVIDIA Riva TNT2 graphics card.


On the back of the card you find the USB and Ethernet connector. The purpose of the Ethernet connector shouldn't need explanation, however, the USB port does.
The USB 2.0 port on the back of the card means that you can connect e.g. USB hard drives and USB microphones to the card itself. This allows the card to download torrents to the USB hard drive without using any resources outside the card. In the future when an FN Teamspeak or Ventrilo application has been developed you can run the Teamspeak client on the KillerNIC with the microphone connected directly to it. This is the equivalent of having a separate PC running the application.


The heart of the KillerNIC M1 is this MPC8343E processor from Freescale semiconductor. It basically is a PowerPC processor, which makes it easy to compile Linux for it.


This XC3S250E Spartan chip from Xilinx is the KillerNIC's "ASIC". Technically it is not an ASIC. An ASIC is a chip specifically developed and produced for a single application. An FPGA is a chip that can be configured to be used for a certain application. Imagine it as a large sea of logic gates (250,000 of them to be precise) that can be set in a way to perform more complex functions. The reason for using an FPGA is simply price. The initial production start cost of creating an ASIC is much much higher than that of an FPGA. On the other hand a single ASIC is a lot cheaper than a single FPGA. At this time the break-even point is about 250K units, then ASICs will be cheaper to produce.


Two DDR memory chips with 32 MB capacity are used to provide the RAM for the NPU.


The Broadcom BCM5461 is a Gigabit Ethernet Transceiver which handles the electrical side of the network connectivity. It basically takes a data stream from the NPU and converts it into the proper electrical signals over the right wires in the current mode (10/100/1000, single or full duplex).