The Graphics Tile and Disaggregated iGPU

With "Meteor Lake," Intel plans to generationally double the graphics performance of its processors. The iGPU is spread across three tiles, the Graphics tile contains the main graphics rendering hardware spread across the iGPU's front-end and Xe Render Slices that contain the Xe Cores; while the SoC tile contains the media accelerators and display engine. The latter two don't really benefit from the advanced TSMC node that the Graphics tile is based on, and can remain on the SoC tile built on Intel 7. The I/O tile contains the display PHYs (physical layer interfaces for DisplayPort and HDMI). It's optimal to have them located here, as Intel can aggregate DisplayPort with the USB4 and Thunderbolt interfaces located here.

The Xe-LPG Graphics Architecture

With "Meteor Lake," Intel is debuting the Xe-LPG graphics architecture. Xe-LPG is an advancement from the Xe-LP architecture powering the past few generations of Intel iGPUs, but is equally a skimmed down version of the Xe-HPG architecture powering Arc "Alchemist" discrete GPUs. With Xe-LPG, the "Meteor Lake" iGPU gets full DirectX 12 Ultimate logo capabilities, including real time ray tracing acceleration. The key aspect setting Xe-LPG apart from Xe-HPG is the lack of XMX matrix multiplication hardware within the Xe cores. They'd be redundant as the processor has a dedicated NPU for the job. That said, the iGPU supports Intel XeSS, which uses DP4a instead of XMX for localized acceleration on the iGPU.


In its maximum configuration, the "Meteor Lake" iGPU comes with 8 Xe-cores spanning two Render Slices. This works out to 128 EUs or vector units, translating into 1,024 unified shaders. The iGPU also has 2 geometry pipelines worth 8 ROPs, 8 samplers, 4 pixel backends, and 8 ray tracing units.

Compared to the Xe-LP iGPU of "Raptor Lake," the new Xe-LPG iGPU not just has more Xe cores, but is also able to run at higher engine clock speeds, and since the Graphics tile is built on a more advanced node than Intel 7, is able to provide higher architectural efficiency.


The Xe Display Engine located in the SoC tile comes with hardware support for HDMI 2.1, DisplayPort 2.1 (up to 20 Gbps), and eDP 1.4. These interfaces support display heads with up to 8K @ 60 Hz, up to four 4K @ 60 Hz heads with HDR, or 1080p/1440p at up to 360 Hz refresh rates. The controller end of the Display Engine is located on the SoC tile, while its physical layer (PHY) interfaces are located on the I/O tile. The number and type of display outputs varies with the type of I/O tile used specific to processor SKUs.


Perhaps the biggest feature-set with the new Display Engine is the degree of power management features on tap, including Burst Fill, Panel self-refresh, selective update, and selective update with hardware queuing.


The Xe Media Engine contains hardware fixed-function accelerators specific to popular video format types. This is located in the SoC tile. The "Meteor Lake" Xe Media Engine supports VP9, AV1, HEVC, and AVC encoding and decoding. The decoder supports up to 8K @ 60 FPS with 10 bpc color and HDR; while the encoder supports up to 8K 10 bpc + HDR (at any frame rate, limited by the device's encoding performance).

Graphics and Media Full Presentation