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Lexar NS100 256 GB (MAS1102B + YMTC CDT1B X2-9060)

256 GB
Capacity
MAS1102B-B1C
Controller
TLC
Flash
SATA 6 Gbps
Interface
2.5"
Form Factor

Multiple hardware versions found.

Performance could vary due to unannounced flash/controller changes.

SSD Controller
Controller
NAND Die
NAND Die
The Lexar NS100 is a solid-state drive in the 2.5" form factor, launched in 2023. It is available in capacities ranging from 256 GB to 2 TB. This page reports specifications for the 256 GB variant. With the rest of the system, the Lexar NS100 interfaces using a SATA 6 Gbps connection. The SSD controller is the MAS1102B-B1C from MaxioTech, a DRAM cache is not available. Lexar has installed 128-layer TLC NAND flash on the NS100, the flash chips are made by YMTC. Please note that this SSD is sold in multiple variants with different NAND flash or controller, which could affect performance, the "Notes" section at the end of this page has more info. To improve write speeds, a pseudo-SLC cache is used, so bursts of incoming writes are soaked up more quickly. The NS100 is rated for sequential read speeds of up to 520 MB/s and 520 MB/s write.
At its launch, the SSD was priced at 40 USD. The warranty length is set to three years, which is above average, but shorter than the five years offered by many other vendors. Lexar guarantees an endurance rating of 128 TBW, a typical value for consumer SSDs.

Solid-State-Drive

Capacity: 256 GB
Variants: 256 GB 512 GB 1 TB 2 TB
Hardware Versions:
Overprovisioning: 17.6 GB / 7.4 %
Production: Active
Released: 2023
Price at Launch: 40 USD
Part Number: LNS100-256RBNA
Market: Consumer

Physical

Form Factor: 2.5"
Interface: SATA 6 Gbps
Protocol: AHCI
Power Draw: Unknown

Controller

Manufacturer: MaxioTech
Name: MAS1102B-B1C
Architecture: ARM 32-bit
Flash Channels: 2 @ 667 MT/s
Chip Enables: 8

NAND Flash

Manufacturer: YMTC
Name: Xtacking 2.0 (CDT1B)
Rebranded: (Rebranded by Lexar)
Type: TLC
Technology: 128-layer
Speed: 1600 MT/s
Capacity: 1 chip @ 2 Tbit
ONFI: 4.1
Topology: Charge Trap
Die Size: 60 mm²
(8.5 Gbit/mm²)
Dies per Chip: 4 dies @ 512 Gbit
Planes per Die: 4
Decks per Die: 2
Word Lines: 141 per NAND String
90.8% Vertical Efficiency
Read Time (tR): 50 µs
Program Time (tProg): 620 µs
Block Erase Time (tBERS): 9.0 ms
Die Read Speed: 1280 MB/s
Die Write Speed: 70 MB/s
Endurance:
(up to)
3000 P/E Cycles
Page Size: 16 KB
Block Size: 2304 Pages
Plane Size: 1980 Blocks

DRAM Cache

Type: None

Performance

Sequential Read: 520 MB/s
Sequential Write: 520 MB/s
Random Read: Unknown
Random Write: Unknown
Endurance: 128 TBW
Warranty: 3 Years
MTBF: 1.5 Million Hours
Drive Writes Per Day (DWPD): 0.5
SLC Write Cache: Yes

Features

TRIM: Yes
SMART: Yes
Power Loss Protection: No
Encryption:
  • No
RGB Lighting: No
PS5 Compatible: No

Notes

NAND Die:

Read Time (tR): Maximum is 50 µs, typical is lower
Typical Program Time (tPROG): 620 µs
Maximum Program Time (tPROG): Maximum is 910 µs
Block Erase Time (tBERS): Maximum is 20 ms, typical is lower
Array Eficiency of over 92%
YMTC 128L Xtacking 2.0 cell architecture consists of two decks connected through deck-interface buffer layer which is the same process with KIOXIA 112L BiCS 3D NAND structure. Cell size, CSL pitch, and 9-hole VC layouts keep the same design and dimension (horizontal/vertical WL and BL pitches) with previous 64L Xtacking 1.0 cell. Total number of gates is 141 (141T) including selectors and dummy WLs for the TLC operation.
This layout has a 1x 4 Plane layout, each one lineup side by side

Feb 19th, 2025 20:20 EST change timezone

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