Thursday, November 10th 2016
Intel Readies Skylake-X As its Next High-end Desktop Platform
Intel's next high-end desktop (HEDT) platform to succeed the current "Broadwell-E" LGA2011v3 will be the X-series "Basin Falls" platform. This consists of the "Skylake-X" and "Kaby Lake-X" processors, and a chipset derived from Intel's upcoming 200-series. Just as Intel changed sockets for its previous three HEDT platforms (LGA1366 for "Nehalem" and "Westmere/Gulftown," LGA2011 for "Sandy Bridge-E" and "Ivy Bridge-E," and LGA2011v3 for "Haswell-E" and "Broadwell-E,") the company will launch a new socket, the LGA2066.
As with its HEDT predecessors, "Skylake-X" and "Kaby Lake-X" will be multi-core processors devoid of integrated graphics, with double the memory bus width and up to triple the PCIe lane budgets as the desktop ("Skylake-D," eg: Core i7-6700) processors. In an interesting move, Intel will launch both "Skylake-X" and "Kaby Lake-X" in quick succession, with a catch - "Skylake-X" will come in 6-core, 8-core, and 10-core variants; while the "Kaby Lake-X" will initially only be offered in quad-core. The "Kaby Lake-X" chip will further only feature a dual-channel memory bus, and the LGA2066 motherboard will have half its DDR4 DIMM slots disabled, besides a few PCIe lanes.The Core i7 "Skylake-X" processors, besides coming in 6-core, 8-core, and 10-core variants, could have sub-variants with fewer PCIe lanes. All chips will, however, feature quad-channel memory interfaces. Besides the DMI 3.0 (PCI-Express 3.0 x4 physical layer) chipset bus, "Skylake-X" chips will offer up to 44 PCI-Express gen 3.0 lanes. Interestingly, the chipset will have a much wider downstream PCIe lane budget than what we're used to seeing on Intel PCH chips for the past several generations - it offers a whopping 22 PCI-Express gen 3.0 downstream lanes. This could prove useful in driving bandwidth-hungry onboard devices such as Thunderbolt controllers, multiple PCI-Express SSDs, etc.
Intel plans to launch the Core i7 "Skylake-X" processors in as early as Q3-2017 (July-September 2017).
Source:
BenchLife.info
As with its HEDT predecessors, "Skylake-X" and "Kaby Lake-X" will be multi-core processors devoid of integrated graphics, with double the memory bus width and up to triple the PCIe lane budgets as the desktop ("Skylake-D," eg: Core i7-6700) processors. In an interesting move, Intel will launch both "Skylake-X" and "Kaby Lake-X" in quick succession, with a catch - "Skylake-X" will come in 6-core, 8-core, and 10-core variants; while the "Kaby Lake-X" will initially only be offered in quad-core. The "Kaby Lake-X" chip will further only feature a dual-channel memory bus, and the LGA2066 motherboard will have half its DDR4 DIMM slots disabled, besides a few PCIe lanes.The Core i7 "Skylake-X" processors, besides coming in 6-core, 8-core, and 10-core variants, could have sub-variants with fewer PCIe lanes. All chips will, however, feature quad-channel memory interfaces. Besides the DMI 3.0 (PCI-Express 3.0 x4 physical layer) chipset bus, "Skylake-X" chips will offer up to 44 PCI-Express gen 3.0 lanes. Interestingly, the chipset will have a much wider downstream PCIe lane budget than what we're used to seeing on Intel PCH chips for the past several generations - it offers a whopping 22 PCI-Express gen 3.0 downstream lanes. This could prove useful in driving bandwidth-hungry onboard devices such as Thunderbolt controllers, multiple PCI-Express SSDs, etc.
Intel plans to launch the Core i7 "Skylake-X" processors in as early as Q3-2017 (July-September 2017).
63 Comments on Intel Readies Skylake-X As its Next High-end Desktop Platform
so the speculation mill Grinds on
let me Quote you with an Edit in Red Ah the Speculation Grist mill Roll on ZEN and the Great Benchmark Posting Blitz WILL COME ( figures in Red merely my Speculation Feel free to blast them around the Web )
Give me a break, only 8 SATA ports? Already running 10 on X99 together with 20 SAS ports on RAID card+expander and they're ready to chop 2 ports with new platform. WTH? Expected improvement (ditching single SATA ports for SFF-8643 connectors) not moving backwards.
Performance gain negligible, flexibility minimal. Like I've expected, X99 is probably my last PC platform. Zen has to deliver big, massive, freaking time to even tempt me.
As for intel :S
If you want, I'll send you the published papers I've read the subject, but it's just a lot of boring, dreary reading on pretty deep material science analysis and statistics... I believe that's more a factor of incomplete validation rather than anything else. The bigger your core, with more features, the longer in takes to validate that everything works properly and all within spec etc. By the looks of it, KBL-X is validated up to basically mainstream desktop spec and they're willing to ship that out already with the rest of the die disabled. As to why they can't line up their validation to more or less end on the same date (because you're almost certainly wondering that), it has to do with the core computation/execution core/IP (pun not intended) being designed for all platforms (from Core M to 8+ socket Xeon E7s) at once, and starting validation essentially at the same time.
The other possibility is that they're re-packing the KBL-H (mainstream) parts into the new socket, and I suspect that that option won't take the soldered IHS route. That's just the HEDT/2P platform split hapenning. Socket R is no longer the mainstream dual-CPU socket - that goes to the brand new Socket P 2016 (LGA3647) socket that's already been shipping with the Knights Landing Xeon Phi platform; and will extend to the E5-2xxx/4xxx and E7 series Xeons when the Purley platform launches sometime next year.
You want server-grade IO (like Intel's high-end C606 and C608's 8 SAS via the "SCU" + 6 SATA)? Then pay up for server-grade IO, cause last I checked machines with lots of disks are incredibly rare in desktop systems.
PS: don't expect Zen to be much better, current talk is 8 SATA (no SAS) per big CPU (SoC architecture) with no info on whether the SATA controller on the second CPU in a 2P system can be enabled and used.
Anyway I was hoping to see 8core entry, with skylake, guess I'll have to wait until cannonlake..
But by then zen+ will be available and i might just use that instead.