Tuesday, January 18th 2022
PSA: GPU-Z shows PCI-Express x16 for Radeon RX 6500 XT / Navi 24. It really is x4
AMD announced the Radeon RX 6500 XT and RX 6400 at CES just a few days ago. These new entry-level cards debut the company's first 6 nm GPU, codenamed "Navi 24"—the smallest chip from the RDNA2 family. Navi 24 is barely the size of a motherboard chipset, roughly 100 mm² in die size. The chip only features a 64-bit wide GDDR6 memory interface, needing just two memory chips to achieve 4 GB of memory size. While AMD has been fairly quiet about it, people quickly found out that the Navi 24 GPU only uses a PCI-Express 4.0 x4 host interface. While the physical connector is x16, there is only enough signal traces for x4.Even the most updated 2.43.0 public version of GPU-Z misreports the bus interface as PCIe x16 4.0 though, which will certainly lead to confusion in the reviewer community who trust GPU-Z to report the correct specs and speeds for their articles. Maybe that's the reason why AMD has decided to not send us a sample this time—a first in 15 years.
Update Jan 20th: GPU-Z 2.44.0 has been released, which properly reports the PCIe bus configuration of RX 6500 XT.
The underlying technical reason for this misreporting is that since a few generations AMD has designed their GPUs with a PCI-Express bridge inside, which makes things much more flexible and helps to separate the IP blocks. The bridge distributes the transferred data to the various subdevices, like the graphics core and HD Audio interface, as displayed in the screenshot above. Internally the GPU core operates at x16, despite the external PCIe 4.0 interface, only the link between the GPU's integrated bridge and the motherboard runs at x4. Since current GPU-Z does not know that the running GPU is Navi 24 it asks the graphics core for its link speed and width, which happily reports "PCIe x16 4.0" (instead of "PCIe x4 4.0"), which is of course correct from the perspective of the graphics core. The problem is that upstream a bottleneck exists that operates at only x4. For supported GPUs, GPU-Z is of course aware of such a topology and will check the upstream devices for bottlenecks, but this capability has to be added on a case-by-case basis. This situation also affects the reported PCIe speed, too. For example on older Intel systems, which don't support PCIe 4.0. Internally the GPU always operates at PCIe 4.0, even on PCIe 3.0 or older motherboards.
We plan to correct this with an update to GPU-Z shortly.
Update Jan 20th: GPU-Z 2.44.0 has been released, which properly reports the PCIe bus configuration of RX 6500 XT.
The underlying technical reason for this misreporting is that since a few generations AMD has designed their GPUs with a PCI-Express bridge inside, which makes things much more flexible and helps to separate the IP blocks. The bridge distributes the transferred data to the various subdevices, like the graphics core and HD Audio interface, as displayed in the screenshot above. Internally the GPU core operates at x16, despite the external PCIe 4.0 interface, only the link between the GPU's integrated bridge and the motherboard runs at x4. Since current GPU-Z does not know that the running GPU is Navi 24 it asks the graphics core for its link speed and width, which happily reports "PCIe x16 4.0" (instead of "PCIe x4 4.0"), which is of course correct from the perspective of the graphics core. The problem is that upstream a bottleneck exists that operates at only x4. For supported GPUs, GPU-Z is of course aware of such a topology and will check the upstream devices for bottlenecks, but this capability has to be added on a case-by-case basis. This situation also affects the reported PCIe speed, too. For example on older Intel systems, which don't support PCIe 4.0. Internally the GPU always operates at PCIe 4.0, even on PCIe 3.0 or older motherboards.
We plan to correct this with an update to GPU-Z shortly.
57 Comments on PSA: GPU-Z shows PCI-Express x16 for Radeon RX 6500 XT / Navi 24. It really is x4
I get them ripping out the video encoders considering this was apparently a GPU to use in laptop configurations with APUs that already have those blocks.
I don't get them ripping out most of the PCIe lanes, especially when many of these GPUs are going into laptops with Cezanne APUs that only have PCIe 3.0. Either Rembrandt is miserably late and should be here by now, or the APU and dGPU divisions aren't speaking with each other.
AMD sometimes makes some immensely terrible decisions and this is one of them.
It's wired for x4.
As you said, this is probably not a problem on pcie4.0 systems, but since this card is aimed at low end computers, it is a problem indeed because this has no more physical lanes. If you plug this on a pcie3.0 motherboard, it will run at 3.0 x4. That could be a problem in some cases. Old (but still somehow competitive in the low end) sandy bridge cpus are 2.0, and before you tell me that is too old and underpowered, that is what i would have expect to pair with a gpu like this, and well, pcie 2.0 at 4x is indeed a big problem even for a relatively weak card.
edit: In before some rabid fanboy attack me, Jensen Huang is no different, so chill.
Sadly it does not bode well for my pcie 3 system.
4x for a 4GB card will be a problem in many situations
I wonder if these cars are going to be mainly for OEMs??