SquaredI've heard that Zen4c is pretty much Zen4 with less cache. I've always pictured that it's Zen4 but with the layout more computer-generated, so it's more area-efficient but can't clock as high. With these differences, I think a Zen4c core would perform very similar to a Zen4 core that's been clocked down because many cores are loaded and they can't all boost. So in an AMD CPU with a Zen4 chiplet and a Zen4c chiplet, if all cores are loaded, scheduling a new independent thread on a Zen4c core probably wouldn't result in much less performance than a Zen4 core. So as long as the scheduler prioritizes the Zen4 cores until most of them are busy, I imagine there won't be any situations that see a significant loss in performance.

wheresmycarSo what on earth are we looking at here? I've lost my marbles with this sort of mind-trucking disorientation and hope someone can shed some light and help me find them (the marbles that is)

Hyderzif amd were to release a 7950xtx that is on par with 4090, nvidia will release the 4090ti with eye watering prices...

Vayra86It is of questionable relevance imho. Far more important is that they release strong midrange right now. They can exceed a 4080, that's more than fine.

HyderzNvidia likes to keep the performance crown title though

Vayra86Yeah so why escalate beyond your own comfort zone. AMD has tried this before, it wasn't great. I'd rather see them go fast on gaining better efficiency out of their chiplet tech. Refinements.

HyderzNvidia likes to keep the performance crown title though

Tek-CheckDude, the article is about CPUs, not GPUs. Focus.

AusWolfNavi 3.5 is also mentioned, whatever it means. Focus. ;)

Tek-CheckIt's mentioned in the context of processor integrated graphics. This is what AMD told us last year already. Nothing new.

tpu7887AMD literally did nothing for Zen 4.

AnotherReaderZen 4 wasn't as big a change as Zen 3 or Zen 2, but it still increased IPC far more than any of Intel's lost generations did. Adding AVX-512, redesigning for higher clock speeds, and moving to a new process was a motivator for reducing risk, and they reduced risk by modifying the Zen 3 core. Chips and Cheese has a good summary of this in their Zen 4 deep dive series. This table is reproduced from there, and compares the major changes in Zen 4 to the changes in Zen 2.

Area	Zen 4 over Zen 3	Zen 2 over Zen 1(+)	Comment
Branch Predictor	Large but unspecified improvements L1 BTB size increased by 50%, L2 BTB gets moderate capacity increase	TAGE predictor implemented for L2 L0, L1 BTB size doubled. L2 BTB gets 75% capacity increase	Higher density probably allows for larger BTB structures
Op Cache	~68% op cache capacity increase	Capacity doubled from Zen 1, but L1i capacity halved	Higher density makes a op cache capacity increase feasible
Reordering Capacity	Vector registers extended to 512-bits to handle AVX-512	Vector registers extended to 256 bits	Higher density makes a large increase in register file capacity is acceptable
Scheduling and Execution	No scheduling capacity change No execution pipe layout changes	Integer scheduling queues get 16 entries, up from 14 AGU scheduler unified Extra AGU pipe added	Reduce risk by avoiding major scheduling layout changes
Vector Execution	No significant change to most commonly used execution units	128-bit FP and vector units get width doubled to 256 bits
L1D Bandwidth	No significant change. Still 2×256-bit load and 1×256-bit store	128-bit paths doubled to 256-bits wide, giving 2×256-bit load and 1×256-bit store
L2 TLB	50% capacity increase, from 2K entries to 3K	33% capacity increase, from 1.5K entries to 2K	TLBs are caches by another name, so again more density helps
L2	Capacity doubled to 1 MB at the cost of 2 clock cycles of latency	No change

DimitrimanSure but AMD is sitting on this "c" type core technology since 2 gens now and is not doing anything on the client segment with it. Intel is about to bring 8+32 cores to the market and AMD will remain with just 16 big cores which won't win either the single or the multi threaded benches. It will just be more energy efficient. I would like to see a 8 + 16 from AMD at some point.