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AMD Park

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Park
Park LP S3
Park LP S3
Block Diagram
Block Diagram
AMD's Park GPU uses the TeraScale 2 architecture and is made using a 40 nm production process at TSMC. With a die size of 59 mm² and a transistor count of 292 million it is a very small chip. Park supports DirectX 11.2 (Feature Level 11_0). For GPU compute applications, OpenCL version 1.2 can be used. It features 80 shading units, 8 texture mapping units and 4 ROPs.
Further reading: Evergreen Series Instruction Set Architecture

Graphics Processor

Released
Feb 7th, 2011
GPU Name
Park
Desktop Variant
Cedar
Generation
Evergreen
Architecture
TeraScale 2
Foundry
TSMC
Process Size
40 nm
Transistors
292 million
Density
4.9M / mm²
Die Size
59 mm²
Package
FCBGA-631/962

Graphics Features

DirectX
11.2 (11_0)
OpenGL
4.4
OpenCL
1.2
Vulkan
N/A
Shader Model
5.0
WDDM
1.3
Compute
GFX4
DCE
4.0
UVD
2.3

Render Config

Shading Units
80
TMUs
8
ROPs
4
Compute Units
2
Z-Stencil
4
L1 Cache
8 KB per CU
L2 Cache
128 KB
Max. TDP
19 W

All TeraScale 2 GPUs

AMD GPU Architecture History

Graphics cards using the AMD Park GPU

Name Chip Memory Shaders TMUs ROPs GPU Clock Memory Clock
AMD Radeon HD 6230
Park LP S3 512 MB 80 8 4 650 MHz 667 MHz
AMD Radeon HD 6350
Park LP S3 512 MB 80 8 4 650 MHz 400 MHz

Park GPU Notes

Generation: Evergreen
Desktop Variant: Cedar
Graphics/Compute: GFX4
Display Core Engine: 4.0
Unified Video Decoder: 2.3
Nov 5th, 2024 15:53 EST change timezone

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