PC (excluding tablets) shipments to the United States grew 5% year-on-year to 14.8 million units in Q1 2024. The consumer and SMB segments were the key growth drivers, both witnessing shipment increases above 9% year-on-year in the first quarter. With a strong start to the year, the market is now poised for a healthy recovery trajectory amid the ongoing Windows refresh cycle. Total PC shipments to the US are expected to hit 69 million units in 2024 before growing another 8% to 75 million units in 2025.

For the third consecutive quarter, the consumer segment showed the best performance in the US market. "Continued discounting after the holiday season boosted consumer demand for PCs into the start of 2024," said Greg Davis, Analyst at Canalys. "However, the first quarter also saw an uptick in commercial sector performance. Shipment growth in small and medium businesses indicates that the anticipated refresh brought by the Windows 10 end-of-life is underway. With enterprise customers set to follow suit, the near-term outlook for the market remains highly positive."

The PC (desktops, notebooks, and workstations) market in Mainland China is forecast to contract by 1% in 2024 according to the latest Canalys data. The first quarter of the year already saw a sharp decline, with shipments down 12%, in contrast to the global market which returned to growth. Desktop shipments are expected to perform well in 2024, growing 10% annually as they benefit from commercial sector refresh demand, especially from large state-held enterprises and local governments. Notebook shipments are set to drop 5%, as demand from consumers and the private sector is anticipated to remain cautious on short-term expenditure such as PCs.

China's PC market trajectory is diverging from global trends in its recovery journey. In Q1 2024, the commercial sector bore the brunt of the market downturn, undergoing a 19% decline due to weak IT spending by large enterprises. The decline in consumer shipments was milder, with shipments dropping 8%. However, despite the muted performance in 2024, significant local developments point to a stronger market in 2025, in which PC shipments are expected to grow 12%.

The race is on for memory manufacturers to bring the next generation GDDR7 graphics memory into mass production. While rivals Samsung and Micron are aiming to have GDDR7 chips available in Q4 of 2024, South Korean semiconductor giant SK Hynix revealed at Computex 2024 that it won't kick off mass production until the first quarter of 2025. GDDR7 is the upcoming JEDEC standard for high-performance graphics memory, succeeding the current GDDR6 and GDDR6X specifications. The new tech promises significantly increased bandwidth and capacities to feed the appetites of next-wave GPUs and AI accelerators. At its Computex booth, SK Hynix showed off engineering samples of its forthcoming GDDR7 chips, with plans for both 16 Gb and 24 Gb densities.

The company is targeting blazing-fast 40 Gbps data transfer rates with its GDDR7 offerings, outpacing the 32 Gbps rates its competitors are starting with on 16 Gb parts. If realized, higher speeds could give SK Hynix an edge, at least initially. While trailing a quarter or two behind Micron and Samsung isn't ideal, SK Hynix claims having working samples now validates its design and allows partners to begin testing and qualification. Mass production timing for standardized memories also doesn't necessarily indicate a company is "late" - it simply means another vendor secured an earlier production window with a specific customer. The GDDR7 transition is critical for SK Hynix and others, given the insatiable demand for high-bandwidth memory to power AI, graphics, and other data-intensive workloads. Hitting its stated Q1 2025 mass production target could ensure SK Hynix doesn't fall too far behind in the high-stakes GDDR7 race, with faster and higher-density chips to potentially follow shortly after volume ramp.

Last year, Micron unveiled plans to construct a cutting-edge DRAM factory in Hiroshima, Japan. However, the project has faced a significant two-year delay, pushing back the initial timeline for mass production of the company's most advanced memory products. Originally slated to begin mass production by the end of 2025, Micron now aims to have the new facility operational by 2027. The complexity of integrating extreme ultraviolet lithography (EUV) equipment, which enables the production of highly advanced chips, has contributed to the delay. The Hiroshima plant will produce next-generation 1-gamma DRAM and high-bandwidth memory (HBM) designed for generative AI applications. Micron expects the HBM market, currently dominated by rivals SK Hynix and Samsung, to experience rapid growth, with the company targeting a 25% market share by 2025.

The project is expected to cost between 600 and 800 billion Japanese yen ($3.8 to $5.1 billion), with Japan's government covering one-third of the cost. Micron has received a subsidy of up to 192 billion yen ($1.2 billion) for construction and equipment, as well as a subsidy to cover half of the necessary funding to produce HBM at the plant, amounting to 25 billion yen ($159 million). Despite the delay, the increased investment in the factory reflects Micron's commitment to advancing its memory technology and capitalizing on the growing demand for HBM. An indication of that is the fact that customers have pre-ordered 100% of the HBM capacity for 2024, not leaving a single HBM die unused.

According to the report from Volksstimme.de, Intel has delayed its Magdeburg fab construction until 2025 due to difficulties in acquiring suitable land. The company had initially planned to begin construction in 2024, but the process has been slowed significantly due to the availability of suitable land. The Magdeburg plant is a significant investment for Intel, with the company planning to invest around €30 billion in the facility. The plant is expected to create thousands of jobs and play a crucial role in the company's European expansion plans. However, the delay in construction is likely to impact these plans and may result in a longer timeline for the plant's completion.

The delay is attributed to the difficulty in finding suitable land for the plant. Intel's original plan of producing a factory on the land concluded that there was humus-rich black soil up to 40 cm in the ground, which would get removed for usage by agricultural fields in Germany. However, now the top layer of black soil, which needs to be excavated, is measured up to 90 cm in depth, which doesn't allow fab construction to start and requires the removal of the soil in order to satisfy the safety regulations. This useful soil has to be extracted first before being "contaminated" with concrete and other types of foundation soils like gravel. The state of Saxony-Anhalt postponed the construction until the required soil was removed and regulations were met. This will supposedly happen by the end of 2024, and construction will start in 2025.

Intel's upcoming Falcon Shores GPU is shaping up to be a powerhouse for AI and high-performance computing (HPC) workloads, but it will also be an extreme power hog. The processor, combining Gaudi and Ponte Vecchio successors into a single GPU, is expected to consume an astonishing 1500 W of power - more than even Nvidia's beefy B200 accelerator, which draws 1000 W. This immense power consumption will require advanced cooling solutions to ensure the Falcon Shores GPU operates efficiently and safely. Intel's partners may turn to liquid cooling or even full immersion liquid cooling, a technology Intel has been promoting for power-hungry data center hardware. The high power draw is the cost of the Falcon Shores GPU's formidable performance promises. Intel claims it will deliver 5x higher performance per watt and 5x more memory capacity and bandwidth compared to its Ponte Vecchio products.

Intel may need to develop proprietary hardware modules or a new Open Accelerator Module (OAM) spec to support such extreme power levels, as the current OAM 2.0 tops out around 1000 W. Slated for release in 2025, the Falcon Shores GPU will be Intel's GPU IP based on its next-gen Xe graphics architecture. It aims to be a major player in the AI accelerator market, backed by Intel's robust oneAPI software development ecosystem. While the 1500 W power consumption is sure to raise eyebrows, Intel is betting that the Falcon Shores GPU's supposedly impressive performance will make it an enticing option for AI and HPC customers willing to invest in robust cooling infrastructure. The ultra-high-end accelerator market is heating up, and the HPC accelerator market needs a Ponte Vecchio successor.

According to ServeTheHome, Intel has decided to discontinue its high-performance computing (HPC) product line, Ponte Vecchio, and shift its focus towards developing its next-generation data center GPU, codenamed Falcon Shores. This decision comes as Intel aims to streamline its operations and concentrate its resources on the most promising and competitive offerings. The Ponte Vecchio GPU, released in January of 2023, was intended to be Intel's flagship product for the HPC market, competing against the likes of NVIDIA's H100 and AMD's Instinct MI series. However, despite its impressive specifications and features, Ponte Vecchio faced significant delays and challenges in its development and production cycle. Intel's decision to abandon Ponte Vecchio is pragmatic, recognizing the intense competition and rapidly evolving landscape of the data center GPU market.

By pivoting its attention to Falcon Shores, Intel aims to deliver a more competitive and cutting-edge solution that can effectively challenge the dominance of its rivals. Falcon Shores, slated for release in 2025, is expected to leverage Intel's latest process node and architectural innovations. Currently, Intel has Gaudi 2 and Gaudi 3 accelerators for AI. However, the HPC segment is left without a clear leader in the company's product offerings. Intel's Ponte Vecchio is powering Aurora exascale supercomputer, which is the latest submission to the TOP500 supercomputer lists. This is also coming after the Rialto Bridge cancellation, which was supposed to be an HPC-focused card. In the future, the company will focus only on the Falcon Shores accelerator, which will unify HPC and AI needs for high-precision FP64 and lower-precision FP16/INT8.

The rollout of SiPearl's much-anticipated Rhea processor for European supercomputers has been pushed back by a year to 2025, but the delay comes with a silver lining - a significant upgrade in core count and potential performance. Originally slated to arrive in 2024 with 72 cores, the homegrown high-performance chip will now pack 80 cores when it eventually launches. This decisive move by SiPearl and its partners is a strategic choice to ensure the utmost quality and capabilities for the flagship European processor. The additional 12 months will allow the engineering teams to further refine the chip's architecture, carry out extensive testing, and optimize software stacks to take full advantage of Rhea's computing power. Now called the Rhea1, the chip is a crucial component of the European Processor Initiative's mission to develop domestic high-performance computing technologies and reduce reliance on foreign processors. Supercomputer-scale simulations spanning climate science, drug discovery, energy research and more all require astonishing amounts of raw compute grunt.

By scaling up to 80 cores based on the latest Arm Neoverse V1, Rhea1 aims to go toe-to-toe with the world's most powerful processors optimized for supercomputing workloads. The SiPearl wants to utilize TSCM's N6 manufacturing process. The CPU will have 256-bit DDR5 memory connections, 104 PCIe 5.0 lanes, and four stacks of HBM2E memory. The roadmap shift also provides more time for the expansive European supercomputing ecosystem to prepare robust software stacks tailored for the upgraded Rhea silicon. Ensuring a smooth deployment with existing models and enabling future breakthroughs are top priorities. While the delay is a setback for SiPearl's launch schedule, the substantial upgrade could pay significant dividends for Europe's ambitions to join the elite ranks of worldwide supercomputer power. All eyes will be on Rhea's delivery in 2025, mainly from Europe's governments, which are funding the project.

Intel's CEO, Pat Gelsinger, has confirmed that the upcoming 18A process of the Panther Lake CPU generation is on schedule for a mid-2025 release, which aligns with the initial projection. This development marks a significant milestone in the company's ongoing efforts to integrate AI capabilities into its processors. The mid-2025 release date is expected to follow the debut of Intel's Arrow Lake process in late 2024 or early 2025, a release that holds the promise of significant advancements in AI computing. During Intel's Q1 2024 Quarterly Results, Gelsinger expressed confidence in the company's AI capabilities, stating that the Core Ultra platform currently delivers leadership AI performance and that the next-generation platforms, Lunar Lake and Arrow Lake, will launch later this year, tripling AI performance. He also mentioned that the Panther Lake generation, set to release in 2025, will grow AI performance up to an additional 2x.

The Panther Lake generation represents the culmination of three generations of work in a short time and is expected to continue Intel's iterative approach. This transition is marked by a shift from a hybrid architecture, a combination of different types of processors, to a disaggregated die, where different components of the processor are separated, as AI computing becomes increasingly prominent. This strategic move is aimed at optimizing AI performance and flexibility. This marks the third generation of the Intel Core Ultra series, following Ultra 100 (Meteor Lake), Ultra 200 (Arrow Lake), and Lunar Lake (200V). Intel's release strategy mirrors the pattern set by the Hybrid Architecture, with Alder Lake debuting in 2021, followed by Raptor Lake in 2022, and a refreshed Raptor Lake released last year to bridge the gap until LGA 1851 was ready. However, Intel's roadmap has seen adjustments in the past, such as the initial promise of an Arrow Lake release before the end of 2024, which was later retracted. The mid-2025 release of Panther Lake aligns with rumors of Arrow Lake's late 2024 or early 2025 debut, suggesting that the 18A process CPU generation could debut several months after Arrow Lake.

While everyone has been focused on shipping an AI-enhanced product recently, one tech giant didn't appear to be bothered- Apple. However, according to Mark Gurman from Bloomberg, Apple is readying an overhaul of its Apple Silicon M-series chips to embed AI processing capabilities at the processor level. As the report indicates, Apple is preparing an update for late 2024 and early 2025 with the M4 series of chips, which will reportedly feature AI processing units similar to those found in other commercial chips. There should be three levels of the M4 series, with the entry-level M4 codenamed Donan, the mid-level M4 chip codenamed Brava, and the high-end M4 chip codenamed Hydra.

Sales of Apple Macs peaked in 2022; the following year was a sharp decline, and sales have continued to be flat since. The new AI PCs for Windows-based systems have been generating hype from all major vendors, hoping to introduce AI features to end users. However, Apple wants to be part of the revolution, and the company has already scheduled the World Wide Developer Conference for June 10th. At WWDC this year, Apple is supposed to show a suite of AI-powered solutions to enable better user experience and increase productivity. With M4 chips getting AI enhancement, the WWDC announcements will get extra hardware accelerations. However, we must wait for the exact announcements before making further assumptions.

According to the latest report from Bloomberg, the US government under Joe Biden's administration has announced plans to provide Taiwan Semiconductor Manufacturing Company (TSMC) with a substantial financial support package worth $11.6 billion. The package is composed of $6.6 billion in grants and up to $5 billion in loans. This represents the most significant financial assistance approved under the CHIPS and Science Act, a key initiative to resurrect the US chip industry. The funding will aid TSMC in establishing three cutting-edge semiconductor production facilities in Arizona, with the company's total investment in the state expected to exceed an impressive $65 billion. TSMC's multi-phase Arizona project will commence with the construction of a fab module near its existing Fab 21 facility. Production using 4 nm and 5 nm process nodes is slated to begin by early 2025. The second phase, scheduled for 2028, will focus on even more advanced 2 nm and 3 nm technologies.

TSMC has kept details about the third facility's production timeline and process node under wraps. The company's massive investment in Arizona is expected to profoundly impact the local economy, creating 6,000 high-tech manufacturing jobs and over 20,000 construction positions. Moreover, $50 million has been earmarked for training local workers, which aligns with President Joe Biden's goal of bolstering domestic manufacturing and technological independence. However, TSMC's Arizona projects have encountered obstacles, including labor disputes and uncertainties regarding government support, resulting in delays for the second facility's production timeline. Additionally, reports suggest that at least one TSMC supplier has abandoned plans to set up operations in Arizona due to workforce-related challenges.

Canalys' latest forecast predicts that an estimated 48 million AI-capable PCs will ship worldwide in 2024, representing 18% of total PC shipments. But this is just the start of a major market transition, with AI-capable PC shipments projected to surpass 100 million in 2025, 40% of all PC shipments. In 2028, Canalys expects vendors to ship 205 million AI-capable PCs, representing a staggering compound annual growth rate of 44% between 2024 and 2028.

These PCs, integrating dedicated AI accelerators, such as Neural Processing Units (NPUs), will unlock new capabilities for productivity, personalization and power efficiency, disrupting the PC market and delivering significant value gains to vendors and their partners.

Lee Kang-Wook, Vice President of Research and Development at SK Hynix, has discussed the increased importance of advanced chip packaging with Bloomberg News. In an interview with the media company's business section, Lee referred to a tradition of prioritizing the design and fabrication of chips: "the first 50 years of the semiconductor industry has been about the front-end." He believes that the latter half of production processes will take precedence in the future: "...but the next 50 years is going to be all about the back-end." He outlined a "more than $1 billion" investment into South Korean facilities—his department is hoping to "improve the final steps" of chip manufacturing.

SK Hynix's Head of Packaging Development pioneered a novel method of packaging the third generation of high bandwidth technology (HBM2E)—that innovation secured NVIDIA as a high-profile and long term customer. Demand for Team Green's AI GPUs has boosted the significance of HBM technologies—Micron and Samsung are attempting to play catch up with new designs. South Korea's leading memory supplier is hoping to stay ahead in the next-gen HBM contest—supposedly 12-layer fifth generation samples have been submitted to NVIDIA for approval. SK Hynix's Vice President recently revealed that HBM production volumes for 2024 have sold out—currently company leadership is considering the next steps for market dominance in 2025. The majority of the firm's newly announced $1 billion budget will be spent on the advancement of MR-MUF and TSV technologies, according to their R&D chief.

According to renowned Apple analyst Ming-Chi Kuo, Apple is actively working on a foldable 20.3-inch MacBook, with mass production expected to begin in 2027. In a recent post on X/Twitter, Kuo stated that this foldable MacBook is currently Apple's only foldable product with a clear development schedule. Kuo's revelation comes amidst frequent inquiries about whether Apple plans to mass-produce a foldable iPhone or iPad in 2025 or 2026. His latest survey indicates that while Apple may explore these options, the foldable MacBook is the only device with a definitive timeline. This is not the first time rumors have circulated about a potential foldable MacBook from Apple. In 2022, display industry analyst Ross Young and Bloomberg's Mark Gurman both reported that Apple was interested in launching a foldable device with a screen size of around 20 inches.

Details about the foldable MacBook's design remain scarce, but it is expected to feature a single foldable OLED display that can be used in various configurations, such as a laptop mode with a virtual keyboard on the lower half of the screen or as a large tablet when fully unfolded. While competitors like Samsung, Motorola, and Huawei have already released foldable smartphones, Apple appears to be more cautious, focusing on perfecting the technology before bringing a product to market. As the foldable device market evolves, it will be interesting to see how Apple's unique take on the form factor fares. As Apple's first foldable product, it will be interesting to see what design choices are made and what hardware configuration will be present. But we are still relatively far away from the actual release of 2027.

Intel has been hyping up their artificial intelligence-augmented processor products since late last year—their "AI Everywhere" marketing push started with the official launch of Intel Core Ultra mobile CPUs, AKA the much-delayed Meteor Lake processor family. CEO, Pat Gelsinger stated (mid-December 2023): "AI innovation is poised to raise the digital economy's impact up to as much as one-third of global gross domestic product...Intel is developing the technologies and solutions that empower customers to seamlessly integrate and effectively run AI in all their applications—in the cloud and, increasingly, locally at the PC and edge, where data is generated and used." Team Blue's presence at this week's MWC Barcelona 2024 event introduced "AI Everywhere Across Network, Edge, Enterprise."

Nikkei Asia sat down with Intel's David Feng—Vice President of Client Computing Group and General Manager of Client Segments. The impressively job-titled executive discussed the "future of AI PCs," and set some lofty sales goals for his firm. According to the Nikkei report, Intel leadership expects to "deliver 40 million AI PCs" this year and a further 60 million units next year—representing "more than 20% of the projected total global PC market in 2025." Feng and his colleagues predict that mainstream customers will prefer to use local "on-device" AI solutions (equipped with NPUs), rather than rely on remote cloud services. Significant Edge AI improvements are expected to arrive with next generation Lunar Lake and Arrow Lake processor families, the latter will be bringing Team Blue NPU technologies to desktop platforms—AMD's Ryzen 8000G series of AM5 APUs launched with XDNA engines last month.

Samsung Electronics foundry has reportedly bagged a mass production order for its cutting edge 2 nm EUV foundry node from Japanese AI chip startup PFN (Preferred Networks). This is reportedly the first major third party order for the 2 nm node. Founded in 2014, PFN specializes in AI and IoT chips, and spun off from Preferred Infrastructure. Samsung's 2 nm node, called the SF2, is on track for delivery of mass produced chips in 2025, which means much of 2024 will be spent on testing, validation, and risk production, with the node expected to go live toward the end of the year. Samsung SF2 is being designed to offer 25% higher power efficiency (at iso-clocks), and 12% increase in performance, over SF3 (3 nm EUV FinFET). In the semiconductor fabrication market, Samsung SF2 competes against TSMC N2 and Intel 20A.

Murmurings of a delayed Nintendo "Switch 2" release schedule appeared online earlier this week—Brazilian games journalist, Pedro Henrique Lutti Lippe, made claims during an "OX do Controle" videocast—based on insider information. Additionally, he broke the bad news on social media: "Nobody wants to hear this, but this one is pretty intense. After consulting five sources from three different continents, all echoing basically the same thing, we can reveal (that) the launch of the Switch's successor should only happen in 2025." Several global news outlets have performed their own investigations, following up on OX do Controle's declaration.

Eurogamer reached out to its network of "trusty" insiders—their Friday evening update stated that: "(we) can now corroborate the earlier reports/whispers that the Switch 2, once destined for release later in 2024, is now set for Q1 2025...The console's launch moving into early next year—but still within the coming financial year—is designed to ensure Switch 2's launch line-up features as many titles as possible, Eurogamer understands." Video Games Chronicle's Andy Robinson has similarly checked in with his pool of industry spies: "VGC has heard from multiple sources who said Nintendo has told publishers its next console will now launch in Q1 2025. According to the sources, third-party game companies were recently briefed on an internal delay in Nintendo's next-gen launch timing, from late 2024 to early the following year. One publishing source suggested the delay was so that Nintendo could prepare stronger first-party software for the console. It's possible the next-gen Nintendo console will now follow a similar timeline to the Switch, which was released in March but announced the previous year."

ASML has revealed that its cutting-edge High-NA extreme ultraviolet (EUV) chipmaking tools, called High-NA Twinscan EXE, will cost around $380 million each—over twice as much as its existing Low-NA EUV lithography systems that cost about $183 million. The company has taken 10-20 initial orders from the likes of Intel and SK Hynix and plans to manufacture 20 High-NA systems annually by 2028 to meet demand. The High-NA EUV technology represents a major breakthrough, enabling an improved 8 nm imprint resolution compared to 13 nm with current Low-NA EUV tools. This allows chipmakers to produce transistors that are nearly 1.7 times smaller, translating to a threefold increase in transistor density on chips. Attaining this level of precision is critical for manufacturing sub-3 nm chips, an industry goal for 2025-2026. It also eliminates the need for complex double patterning techniques required presently.

However, superior performance comes at a cost - literally and figuratively. The hefty $380 million price tag for each High-NA system introduces financial challenges for chipmakers. Additionally, the larger High-NA tools require completely reconfiguring chip fabrication facilities. Their halved imaging field also necessitates rethinking chip designs. As a result, adoption timelines differ across companies - Intel intends to deploy High-NA EUV at an advanced 1.8 nm (18A) node, while TSMC is taking a more conservative approach, potentially implementing it only in 2030 and not rushing the use of these lithography machines, as the company's nodes are already developing well and on time. Interestingly, the installation process of ASML's High-NA Twinscan EXE 150,000-kilogram system required 250 crates, 250 engineers, and six months to complete. So, production is as equally complex as the installation and operation of this delicate machinery.

Sony Interactive Entertainment's State of Play confirming the title of the game, DEATH STRANDING 2: ON THE BEACH, arriving exclusively on PlayStation 5 in 2025. In Death Stranding 2: On The Beach, embark on an inspiring mission of human connection beyond the UCA. Sam—with companions by his side—sets out on a new journey to save humanity from extinction. Join them as they traverse a world beset by otherworldly enemies, obstacles and a haunting question: should we have connected? Step by step, legendary game creator Hideo Kojima changes the world once again.

Death Stranding 2: On The Beach sees Norman Reedus, Léa Seydoux, and Troy Baker return to Hideo Kojima's genre defying universe. They will be joined by Elle Fanning, Shioli Kutsuna, and Academy Award-winning film director George Miller. Hideo Kojima is joined by longtime collaborator Yoji Shinkawa who will direct character and mechanical design, with Ludvig Forssell and Kyle Cooper reprising their roles as musical director and title designer, respectively. In conjunction with the release of the new Death Stranding 2: On The Beach trailer, be sure to visit the PS5 Game Hub to add the game to your wishlist and stay tuned for more information!

SK Hynix has unveiled ambitious High Bandwidth Memory (HBM) roadmaps at SEMICON Korea 2024. Vice President Kim Chun-hwan announced plans to mass produce the cutting-edge HBM3E within the first half of 2024, touting 8-layer stack samples already supplied to clients. This iteration makes major strides towards fulfilling surging data bandwidth demands, offering 1.2 TB/s per stack and 7.2 TB/s in a 6-stack configuration. VP Kim Chun-hwan cites the rapid emergence of generative AI, forecasted for 35% CAGR, as a key driver. He warns that "fierce survival competition" lies ahead across the semiconductor industry amidst rising customer expectations. With limits approaching on conventional process node shrinks, attention is shifting to next-generation memory architectures and materials to unleash performance.

SK Hynix has already initiated HBM4 development for sampling in 2025 and mass production the following year. According to Micron, HBM4 will leverage a wider 2048-bit interface compared to previous HBM generations to increase per-stack theoretical peak memory bandwidth to over 1.5 TB/s. To achieve these high bandwidths while maintaining reasonable power consumption, HBM4 is targeting a data transfer rate of around 6 GT/s. The wider interface and 6 GT/s speeds allow HBM4 to push bandwidth boundaries significantly compared to prior HBM versions, fueling the need for high-performance computing and AI workloads. But power efficiency is carefully balanced by avoiding impractically high transfer rates. Additionally, Samsung is aligned on a similar 2025/2026 timeline. Beyond pushing bandwidth boundaries, custom HBM solutions will become increasingly crucial. Samsung executive Jaejune Kim reveals that over half its HBM volume already comprises specialized products. Further tailoring HBM4 to individual client needs through logic integration presents an opportunity to cement leadership. As AI workloads evolve at breakneck speeds, memory innovation must keep pace. With HBM3E prepping for launch and HBM4 in the plan, SK Hynix and Samsung are gearing up for the challenges ahead.

Pat Gelsinger, CEO of Intel Corporation, has outlined future performance expectations for the company's Core range of processors. In a recent fourth quarter 2023 earnings call he declared: "The Core Ultra platform delivers leadership AI performance today with our next-generation platforms launching later this year, Lunar Lake and Arrow Lake tripling our AI performance. In 2025 with Panther Lake, we will grow AI performance up to an additional 2x." Team Blue's Intel Core Ultra "Meteor Lake" mobile processors arrived right at the tail end of last year, as a somewhat delayed answer to AMD's Ryzen 7040 "Phoenix" APU series—both leveraging their own AI-crunching NPU technologies. Gelsinger believes that the launch of Lunar Lake and Arrow Lake Core product lines will bring significant (3x) AI processing improvements over Meteor Lake. He seemed to confident in a delay-free release schedule for the new year and beyond: "We are first in the industry to have incorporated both gate-all-around and backside power delivery in a single process node, the latter unexpected two years ahead of our competition. Arrow Lake, our lead Intel 20A vehicle will launch this year."

He proceeded to gush about their next node advancement: "Intel 18A is expected to achieve manufacturing readiness in second half 2024, completing our five nodes in four year journey and bringing us back to process leadership. I am pleased to say that Clearwater Forest, our first Intel 18A part for servers has already gone into fab and Panther Lake for clients will be heading into Fab shortly." Industry experts posit that Core "Panther Lake" parts could borrow elements from the next generation Xeon "Clearwater Forest" efficiency-focused family—possibly the latter's "Darkmont" E-cores, to accompany "Cougar Cove" P-cores. The Intel CEO is quite excited about the manufacturing outlay for 2025: "I'll just say, hey, we look at this every single day and we're scrutinizing carefully our progress on 18A. And obviously the great news that we just described those Clearwater Forest taping out, that gives us a lot of confidence that 18A is healthy. That's a major product for us. Panther Lake following that shortly."

Everest (@Olrak29_) has kept track of many AMD processor families over the past couple of years—his latest insight provides an early look at the alleged internal makeup of Team Red's "Kraken Point" APU series. The rumor mill has designated these next-gen mobile processors as 2025 follow-ups to the recently launched Ryzen 8040 "Hawk Point" family of mainstream laptop APUs. The tipster's initial social media post only mentioned the presence of both Zen 5 and Zen 5c cores within Kraken Point processors, but he later clarified that a total of eight cores would include four large units and four smaller types. TPU's past coverage of Kraken Point pointed to rumors of an 8-core, 16-thread configuration, but leaked slides (from late 2023) did not mention the integration of efficiency-tuned Zen 5c "Prometheus" cores, along with presumed Zen 5 "Nirvana" cores.

Everest's continuous flow of insider information reveals that "Kraken Point" shares many "Hawk Point" traits—four workgroup processors (WGP) could be present on final retail products, granting eight compute units (8 CUs in total). He responded to a query regarding AMD's choice of integrated graphics technology—the succinct answer being RDNA 3.5. Past leaks allege that XDNA 2 will drive the NPU side of things—offering a performance range of around 45 to 50 TOPS. The Kraken Point APU is believed to be sticking with a safe monolithic die design, manufactured on a non-specific 4 nm process. Team Red is rumored to be in TSMC's order books for all sorts of next generation silicon.

A DigiTimes Asia report posits that TSMC is preparing another VVIP foundry lane for Apple Inc.—insiders claim that the Taiwanese foundry giant is in the process of expanding production capacity into next generation 2 nm nanometer fields. This expensive and time consuming endeavor is only made possible with the reassurance of big customers being added to the foundry's order books. TSMC's 2 nm-class N2, N2P, and N2X process technologies are due in 2025 and beyond (according to recent presentation slides)—these advanced packages are set to drop with all sorts of innovations: nanosheet gate-all-around (GAA) transistors, backside power delivery, and super-high-performance metal-insulator-metal (SHPMIM). According to a DigiTimes source "Apple is widely believed to be the initial client to utilize the (next-gen) process."

Apple and NVIDIA were reported to be ahead of many important clients in the queue for TSMC's 3 nm process nodes, so it is not surprising to see old patterns repeat (according to industry rumors) again. Apple is expected to update its next generation iPhones, iPad, and Mac laptop product lines with more advanced Bionic and M-series chipsets in 2025. Last year's roster included a rollout of 3 nm TSMC silicon across Apple A17 Pro and M3 ARM-based processors.

Samsung, SK hynix, and Micron are considered to be the top manufacturing sources of High Bandwidth Memory (HBM)—the HBM3 and HBM3E standards are becoming increasingly in demand, due to a widespread deployment of GPUs and accelerators by generative AI companies. Taiwan's Commercial Times proposes that there is an ongoing shortage of HBM components—but this presents a growth opportunity for smaller manufacturers in the region. Naturally, the big name producers are expected to dive in head first with the development of next generation models. The aforementioned financial news article cites research conducted by the Gartner group—they predict that the HBM market will hit an all-time high of $4.976 billion (USD) by 2025.

This estimate is almost double that of projected revenues (just over $2 billion) generated by the HBM market in 2023—the explosive growth of generative AI applications has "boosted" demand for the most performant memory standards. The Commercial Times report states that SK Hynix is the current HBM3E leader, with Micron and Samsung trailing behind—industry experts believe that stragglers will need to "expand HBM production capacity" in order to stay competitive. SK Hynix has shacked up with NVIDIA—the GH200 Grace Hopper platform was unveiled last summer; outfitted with the South Korean firm's HBM3e parts. In a similar timeframe, Samsung was named as AMD's preferred supplier of HBM3 packages—as featured within the recently launched Instinct MI300X accelerator. NVIDIA's HBM3E deal with SK Hynix is believed to extend to the internal makeup of Blackwell GB100 data-center GPUs. The HBM4 memory standard is expected to be the next major battleground for the industry's hardest hitters.

References to GFX1150 & GFX1151 targets have been spotted again—this time in a ROCm Github repository—by renowned hardware sleuth; Kepler_L2. These references were first spotted last summer, in an AMDGPU LLVM backend/compiler (reported by Phoronix)—industry experts immediately linked these target codes to next generation "Strix" APU families. The latest leak provides confirmation that the GFX1150 ID is tied to "Strix Point 1," while GFX1151 is an internal IP for "Strix Point Halo," or simply "Strix Halo." The freshly published ROCm Github's commit is titled: "Strix Halo Support and Strix support in staging," which corroborates previous rumors regarding Team Red's engineers being deep into development of Zen 5 (and RDNA 3.5)-based accelerated processing units.

AMD has published several processor product roadmaps with references to "Strix Point" next-gen APUs, with a targeted 2024 launch window. Their December 2023 "Advancing AI Event" confirmed that the "Strix Point" mobile family will sport "XDNA 2" NPUs—previous generation "Phoenix" and recently released "Hawk Point" processors are on the first iteration of XDNA (a spatial dataflow NPU architecture). It is speculated that a typical "Strix Point" laptop processor will pack 12 Zen 5 CPU cores and 16 RDNA 3.5 GPU cores. Team Red has kept quiet about "Strix Halo" (also known as "Sarlak") when conducting public-facing presentations—a loose 2025 launch window is being touted by the rumor mill. The most advanced examples could feature up to 16 Zen 5 CPU cores and 40 RDNA 3.5 GPU cores.