While Intel's primary product focus is on the processors, or brains, that make computers work, system memory (that's DRAM) is a critical component for performance. This is especially true in servers, where the multiplication of processing cores has outpaced the rise in memory bandwidth (in other words, the memory bandwidth available per core has fallen). In heavy-duty computing jobs like weather modeling, computational fluid dynamics and certain types of AI, this mismatch could create a bottleneck—until now.

After several years of development with industry partners, Intel engineers have found a path to open that bottleneck, crafting a novel solution that has created the fastest system memory ever and is set to become a new open industry standard. The recently introduced Intel Xeon 6 data center processors are the first to benefit from this new memory, called MRDIMMs, for higher performance—in the most plug-and-play manner imaginable.

Intel is expected to debut its next-generation Arc "Battlemage" discrete GPU in December 2024, or ahead of the 2025 CES, HotHardware reports, citing Golden Pig Upgrade, a reliable source with GPU leaks. The source says that they expect "wonderful performance" for the GPU. Intel has a lot invested in its PC graphics division, across not just its two-year-old Arc "Alchemist" discrete GPUs, but also the integrated graphics solutions it's been launching with its Core Ultra processor generations. It debuted the DirectX 12 Ultimate-capable Xe-LPG graphics architecture with Core Ultra "Meteor Lake" and Arc Graphics branding, which it carried forward to the Core Ultra Series 200 "Arrow Lake" on the desktop platform. Meanwhile, "Battlemage" got debuted as the iGPU of the Core Ultra 200V series "Lunar Lake" mobile processor, which posted gaming performance beating that of the Ryzen 8000 "Hawk Point" processor, but falling short of the Ryzen AI 300 series "Strix Point."

Intel is expected to tap into a fairly new foundry node for the Arc "Battlemage" discrete GPU series. Its chips could strike a performance/Watt and performance/price inflection point in the performance segment, that drives the most volumes for NVIDIA and AMD. It is this exact segment that AMD has withdrawn from the enthusiast segment to focus on, with its next-generation Radeon RDNA 4 generation. With "Alchemist," Intel already laid a strong foundation for hardware-accelerated ray tracing and AI, and the company is only expected to advance on these fronts further. Could "Battlemage" and "Granite Rapids" go down as the most exciting products from Intel in 2024? We should find out next month.

At Lenovo Tech World 2024, we announced new Supercomputing servers for HPC and AI workloads. These new water-cooled servers use the latest processor and accelerator technology from Intel and NVIDIA.

ThinkSystem SC750 V4
Engineered for large-scale cloud infrastructures and High Performance Computing (HPC), the Lenovo ThinkSystem SC750 V4 Neptune excels in intensive simulations and complex modeling. It's designed to handle technical computing, grid deployments, and analytics workloads in various fields such as research, life sciences, energy, engineering, and financial simulation.

AMD has unveiled its latest EPYC processors, codenamed "Turin," featuring Zen 5 and Zen 5C dense cores. Phoronix's thorough testing reveals remarkable advancements in performance, efficiency, and value. The new lineup includes the EPYC 9575F (64-core), EPYC 9755 (128-core), and EPYC 9965 (192-core) models, all showing impressive capabilities across various server and HPC workloads. In benchmarks, a dual-socket configuration of the 128-core EPYC 9755 Turin outperformed Intel's dual Xeon "Granite Rapids" 6980P setup with MRDIMM-8800 by 40% in the geometric mean of all tests. Surprisingly, even a single EPYC 9755 or EPYC 9965 matched the dual Xeon 6980P in expanded tests with regular DDR5-6400. Within AMD's lineup, the EPYC 9755 showed a 1.55x performance increase over its predecessor, the 96-core EPYC 9654 "Genoa". The EPYC 9965 surpassed the dual EPYC 9754 "Bergamo" by 45%.

These gains come with improved efficiency. While power consumption increased moderately, performance improvements resulted in better overall efficiency. For example, the EPYC 9965 used 32% more power than the EPYC 9654 but delivered 1.55x the performance. Power consumption remains competitive: the EPYC 9965 averaged 275 Watts (peak 461 Watts), the EPYC 9755 averaged 324 Watts (peak 500 Watts), while Intel's Xeon 6980P averaged 322 Watts (peak 547 Watts). AMD's pricing strategy adds to the appeal. The 192-core model is priced at $14,813, compared to Intel's 128-core CPU at $17,800. This competitive pricing, combined with superior performance per dollar and watt, has resonated with hyperscalers. Estimates suggest 50-60% of hyperscale deployments now use AMD processors.

The title has no typo, and what you are reading is correct. Intel's flagship 128-core 256-threaded CPU Xeon 6980P compute monster processor carries a substantial $17,800 price point. Intel's Xeon 6 "Granite Rapids" family of processors appears to be its most expensive yet, with the flagship SKU now carrying more than a 50% price increase compared to the previous "Emerald Rapids" generation. However, the economics of computing are more nuanced than simple comparisons. While the last generation Emerald Rapids Xeon 8592+ (64 cores, 128 threads) cost about $181 per core, the new Granite Rapids Xeon 6980P comes in at approximately $139 per core, offering faster cores at a lower per-core cost.

The economics of data centers aren't always tied to the cost of a single product. When building total cost of ownership models, factors such as power consumption, compute density, and performance impact the final assessment. Even with the higher price of this flagship Granite Rapids Xeon processor, the economics of data center deployment may work in its favor. Customers get more cores in a single package, increasing density and driving down cost-per-core per system. This also improves operational efficiency, which is crucial considering that operating expenses account for about 10% of data center costs.

ASRock Rack Inc., a leading innovative server company, today announced the launch of its new server platforms, powered by Intel Xeon 6900 series processors with Performance-Cores (P-Cores). These advanced platforms are designed to deliver exceptional performance across a wide range of demanding workloads, including High-Performance Computing (HPC), Artificial Intelligence (AI), storage, and networking.

The Intel Xeon 6900 Series Processors are optimized for high performance per core and are delivered in a new class of Intel server platform design. They offer up to 12 memory channels, providing greater memory bandwidth to support demanding environments such as cloud, AI, and HPC. Leveraging these processors, ASRock Rack's newly released platforms—the 1U all-flash storage server 1U8E1S-GNRAPDNO and the GNRAPD12DNO server motherboard—fully maximize throughput with unprecedented compute capability.

Supermicro, Inc. a Total IT Solution Provider for AI/ML, HPC, Cloud, Storage, and 5G/Edge, today adds new maximum performance GPU, multi-node, and rackmount systems to the X14 portfolio, which are based on the Intel Xeon 6900 Series Processors with P-Cores (formerly codenamed Granite Rapids-AP). The new industry-leading selection of workload-optimized servers addresses the needs of modern data centers, enterprises, and service providers. Joining the efficiency-optimized X14 servers leveraging the Xeon 6700 Series Processors with E-cores launched in June 2024, today's additions bring maximum compute density and power to the Supermicro X14 lineup to create the industry's broadest range of optimized servers supporting a wide variety of workloads from demanding AI, HPC, media, and virtualization to energy-efficient edge, scale-out cloud-native, and microservices applications.

"Supermicro X14 systems have been completely re-engineered to support the latest technologies including next-generation CPUs, GPUs, highest bandwidth and lowest latency with MRDIMMs, PCIe 5.0, and EDSFF E1.S and E3.S storage," said Charles Liang, president and CEO of Supermicro. "Not only can we now offer more than 15 families, but we can also use these designs to create customized solutions with complete rack integration services and our in-house developed liquid cooling solutions."

Demonstrating the depth and breadth of its technologies at Hot Chips 2024, Intel showcased advancements across AI use cases - from the data center, cloud and network to the edge and PC - while covering the industry's most advanced and first-ever fully integrated optical compute interconnect (OCI) chiplet for high-speed AI data processing. The company also unveiled new details about the Intel Xeon 6 SoC (code-named Granite Rapids-D), scheduled to launch during the first half of 2025.

"Across consumer and enterprise AI usages, Intel continuously delivers the platforms, systems and technologies necessary to redefine what's possible. As AI workloads intensify, Intel's broad industry experience enables us to understand what our customers need to drive innovation, creativity and ideal business outcomes. While more performant silicon and increased platform bandwidth are essential, Intel also knows that every workload has unique challenges: A system designed for the data center can no longer simply be repurposed for the edge. With proven expertise in systems architecture across the compute continuum, Intel is well-positioned to power the next generation of AI innovation." -Pere Monclus, chief technology officer, Network and Edge Group at Intel.

The newest leak from X (formerly Twitter) has detailed five Intel Granite Rapids SKUs, including the 6980P, 6979P, 6972P, 6952P, and the 6960P. Featuring up to 128 CPU cores and up to 504 MB of cache, these show that Intel Granite Rapids will double the amount of cores compared to the Emerald Rapids SKUs.

The newest leak coming from Jaykihn over at X, following the previous leak that detailed the most powerful SKU. The 6980P will pack 128 cores, pack 504 MB of cache, have a 2.0 GHz base frequency and a massive 500 W TDP rating. The rest of the SKUs have lower core count, ending with the 6960P, which comes with 72 cores, 432 MB of cache, but also a higher 2.7 GHz base frequency.

Intel Corporation today reported second-quarter 2024 financial results. "Our Q2 financial performance was disappointing, even as we hit key product and process technology milestones. Second-half trends are more challenging than we previously expected, and we are leveraging our new operating model to take decisive actions that will improve operating and capital efficiencies while accelerating our IDM 2.0 transformation," said Pat Gelsinger, Intel CEO. "These actions, combined with the launch of Intel 18A next year to regain process technology leadership, will strengthen our position in the market, improve our profitability and create shareholder value."

"Second-quarter results were impacted by gross margin headwinds from the accelerated ramp of our AI PC product, higher than typical charges related to non-core businesses and the impact from unused capacity," said David Zinsner, Intel CFO. "By implementing our spending reductions, we are taking proactive steps to improve our profits and strengthen our balance sheet. We expect these actions to meaningfully improve liquidity and reduce our debt balance while enabling us to make the right investments to drive long-term value for shareholders."

ASRock Rack sells the entire stack of servers a data-center could possibly want, and at Computex 2024, the company showed us their servers meant for AI GPUs. The 6U8M-GENOA2, as its name suggests, is a 6U server based on 2P AMD EPYC 9004 series "Genoa" processors in the SP5 package. You can configure it with even the variants of "Genoa" that come with 3D V-cache, for superior compute performance from the large cache. Each of the two SP5 sockets is wired to 12 DDR5 RDIMM slots, for a total of 24 memory channels. The server supports eight AMD Instinct MI300X or MI325X AI GPUs, which it wires out using Infinity Fabric links and PCIe Gen 5 x16 individually. A 3 kW 80 Plus Titanium PSU keeps the server fed. There are vacant Gen 5 x16 slots left even after connecting the GPUs, so you could give it a DPU-based 40 GbE NIC.

The 6U8X-EGS2 B100 is a 6U AI GPU server modeled along the 6U8M-GENOA2, with a couple of big changes. To begin with, the EPYC "Genoa" chips make way for a 2P Intel Xeon Socket E (LGA4677) CPU setup, for 2P Xeon 5 "Emerald Rapids" processors. Each socket is wired to 16 DDR5 DIMM slots (the processor itself has 8-channel DDR5, but this is a 2 DIMM-per-channel setup). The server integrates an NVIDIA NVSwitch that wires out NVLinks to eight NVIDIA B100 "Blackwell" AI GPUs. The server features eight HHHL PCIe Gen 5 x16, and five FHHL PCIe Gen 5 x16 connectors. There are vacant x16 slots for your DPU/NIC, you can even use an AIC NVIDIA BlueField card. The same 3 kW PSU as the "Genoa" system is also featured here.

Intel is preparing to unveil its cutting-edge Xeon 6 series server CPUs, known as Granite Rapids and Sierra Forest. These forthcoming processors are set to deliver a significant boost in performance, foreshadowing a new era of computing power, albeit with a trade-off in increased power consumption. Two days ago, Yuuki_Ans posted information about the Beechnut City validation platform. Today, he updated the X thread with more information that Intel is significantly boosting core counts across its new Xeon 6 lineup. The flagship Xeon 6 6980P is a behemoth, packing 128 cores with a blistering 500 Watt Thermal Design Power (TDP) rating. In fact, Intel is equipping five of its Xeon 6 CPUs with a sky-high 500 W TDP, including the top four Granite Rapids parts and even the flagship Sierra Forest SKU, which is composed entirely of efficiency cores. This marks a substantial increase from Intel's previous Xeon Scalable processors, which maxed out at 350-385 Watts.

The trade-off for this performance boost is a dramatic rise in power consumption. By nearly doubling the TDP ceiling, Intel can double the core count from 64 to 128 cores on its Granite Rapids CPUs, vastly improving its multi-core capabilities. However, this focus on raw performance over power efficiency means server manufacturers must redesign their cooling solutions to accommodate Intel's flagship 500 W parts adequately. Failure to do so could lead to potential thermal throttling issues. Intel's next-gen Xeon CPU architectures are shaping up to be one of the most considerable generational leaps in recent memory. Still, they come with a trade-off in power consumption that vendors and data centers will need to address. Densely packing thousands of these 500-Watt SKUs will lead to new power and thermal challenges, and we wait to see future data center projects utilizing them.

Intel's next-generation Xeon 6 processors, codenamed Granite Rapids and Sierra Forest, are poised to shake up the CPU market with its cutting-edge architecture and features. Hardware leaker YuuKi_AnS has provided the first glimpse of Intel's upcoming platform, revealing images of the vibrant red-colored validation platform dubbed Beechnut City. Beechnut City serves as a crucial testing ground for the forthcoming Xeon 6 series, which will comprise both the Granite Rapids (P-Core architecture) and Sierra Forest (E-Core architecture) processors. Although not intended for commercial release, this validation platform is designed to rigorously test and validate the new CPUs. The dual-socket LGA-4710 platform boasts the capability to support up to two Sierra Forest or Granite Rapids CPUs simultaneously, promising a significant performance boost for data centers and other high-performance computing applications.

According to YuuKi_AnS's leaks, the Xeon 6 series may feature SKU names such as Xeon 6 6900E/P (Platinum), Xeon 6 6700E/P (Gold), Xeon 6 6500P (Silver), and Xeon 6 6300P (Bronze). One of the platform's standout features is its support for 32 DIMMs in 16-channel memory system, similar to the previously discussed Avenue City platform, which can accommodate up to 24 DDR5-6400 DIMMs in 12-channel memory. The Sierra Forest variant with 144 cores is expected to launch in the first half of this year, while the 288-core variant is slated for release in the second half. Notably, the Xeon 6 series will mark a significant shift in Intel's CPU lineup, as it will be the first CPU series to feature only Efficient cores, akin to AMD's Zen Dense cores (such as Bergamo). This move aligns with Intel's strategy to cater to the growing demand for high-performance computing and data center applications, where energy efficiency and performance are essential.There is also a picture of server configuration of Avenue City was pictured a while ago, thanks to the previous leak of Yuuki_Ans, which can be seen below in addition to Beechnut City platform.

During the Vision 2024 event, Intel announced that its upcoming Xeon processors will be branded under the new "Xeon 6" moniker. This rebranding effort aims to simplify the company's product stack and align with the recent changes made to its consumer CPU naming scheme. In contrast to the previous "x Generation Xeon Scalable", the new branding aims to simplify the product family. The highly anticipated Sierra Forest and Granite Ridge chips will be the first processors to bear the Xeon 6 branding, and they are set to launch in the coming months. Intel has confirmed that Sierra Forest, designed entirely with efficiency cores (E-cores), remains on track for release this quarter. Supermicro has already announced early availability and remote testing programs for these chips. Intel's Sierra Forest is set to deliver a substantial leap in performance. According to the company, it will offer a 2.4X improvement in performance per watt and a staggering 2.7X better performance per rack compared to the previous generation. This means that 72 Sierra Forest server racks will provide the same performance as 200 racks equipped with older second-gen Xeon CPUs, leading to significant power savings and a boost in overall efficiency for data centers upgrading their system.

Intel has also teased an exciting feature in its forthcoming Granite Ridge processors-support for the MXFP4 data format. This new precision format, backed by the Open Compute Project (OCP) and major industry players like NVIDIA, AMD, and Arm, promises to revolutionize performance. It could reduce next-token latency by up to 6.5X compared to fourth-gen Xeons using FP16. Additionally, Intel stated that Granite Ridge will be capable of running 70 billion parameter Llama-2 models, a capability that could open up new possibilities in data processing. Intel claims that 70 billion 4-bit models run entirely on Xeon in just 86 milliseconds. While Sierra Forest is slated for this quarter, Intel has not provided a specific launch timeline for Granite Ridge, stating only that it will arrive "soon after" its E-core counterpart. The Xeon 6 branding aims to simplify the product stack and clarify customer performance tiers as the company gears up for these major releases.

A CPU-Z screenshot has been shared by YuuKi_AnS—the image contains details about an alleged next-gen Intel Xeon Scalable processor engineering sample (ES). The hardware tipster noted in (yesterday's post) that an error had occurred in the application's identification of this chunk of prototype silicon. CPU-Z v2.09 has recognized the basics—an Intel Granite Rapids-SP processor that is specced with 80 cores, 2.5 GHz max frequency, a whopping 672 MB of L3 cache, and a max. TDP rating of 350 W. The counting of 320 threads seems to be CPU-Z's big mistake here—previous Granite Rapids-related leaks have not revealed Team Blue's Hyper-Threading technology producing such impressive numbers.

The alleged prototype status of this Xeon chip is very apparent in CPU-Z's tracking of single and multi-core performance—the benchmark results are really off the mark, when compared to finalized current-gen scores (produced by rival silicon). Team Blue's next-gen Xeon series is likely positioned to catch up with AMD EPYC's deployment of large core counts—"Granite Rapids" has been linked to the Intel 3 foundry node, reports from last month suggest that XCC-type processors could be configured with "counts going up to 56-core/112-threads." Micron is prepping next-gen "Tall Form Factor" memory modules, designed with future enterprise processor platforms in mind—including Intel's Xeon Scalable "Granite Rapids" family. Industry watchdogs posit that Team Blue will be launching this series in the coming months.

Micron representatives showcased new products at last week's NVIDIA GTC event—one eye-catching DIMM is all set for deployment within next-generation servers. Tom's Hardware spent some time at Micron's booth—they found out that the "Tall Form Factor" 256 GB DDR5-8800 Multiplexer Combined Ranks (MCR) DIMM is being prepared for future enterprise processor platforms, including Intel's Xeon Scalable "Granite Rapids" family. A lone "tall" prototype module was exhibited, but company representatives indicated that standard height MCRDIMMs are in development. Tom's Hardware found out that these will compact enough to fit in 1U-sized server systems. According to their in-person experience: "(Micron's) 256 GB MCRDIMMs are based on monolithic 32 Gb DDR5 ICs, but the tall one places 80 DRAM chips on both sides of the module, whereas the standard one uses 2Hi stacked packages, which means that they run slightly hotter due to less space for thermal dissipation. In any case, the tall module consumes around 20 W, which isn't bad as Micron's 128 GB DDR5-8000 RDIMM consumes 10 W at DDR5-4800."

In a recent earnings call, Micron CEO Sanjay Mehrotra, commented on his company's latest technology: "we (have) started sampling our 256 GB MCRDIMM module, which further enhances performance and increases DRAM content per server." Next-gen Intel Xeon platforms are expected to support 12 or 24 memory slots per processor socket. Enabled datacenter machines could be specced with total 3 TB or 6 TB (DDR5-8000) memory capacities. AnandTech has summarized the benefits of Micron's new part: "Multiplexer Combined Ranks (MCR) DIMMs are dual-rank memory modules featuring a specialized buffer that allows both ranks to operate simultaneously. This buffer enables the two physical ranks to operate as though they were separate modules working in parallel, which allows for concurrent retrieval of 128 bytes of data from both ranks per clock cycle—compared to 64 bytes per cycle when it comes to regular memory modules—effectively doubling performance of a single module." The added complexity is offset by significant performance boons—ideal for advanced server-side AI-crunching in the future.

At MWC 2024, Intel announced new platforms, solutions and services spanning network and edge AI, Intel Core Ultra processors and the AI PC, and more. In an era where technological advancements are integral to staying competitive, Intel is delivering products and solutions for its customers, partners and expansive ecosystem to capitalize on the emerging opportunities of artificial intelligence and built-in automation, to improve total cost of ownership (TCO) and operational efficiency, and to deliver new innovations and services.

Across today's announcements, Intel is focused on empowering the industry to further modernize and monetize 5G, edge and enterprise infrastructures and investments, and to take advantage of bringing AI Everywhere. For more than a decade, and alongside Intel's customers and partners, the company has been transforming today's network infrastructure from fixed-function to a software-defined platform and driving success at the edge with more than 90,000 real-world deployments.

Feast your eyes on the first pictures of an Intel "Granite Rapids" Xeon processor wafer, courtesy of Andreas Schilling with HardwareLuxx.de. This is Intel's first commercial silicon built on the new Intel 3 foundry node, which is expected to be the company's final silicon fabrication node to implement FinFET technology; before the company switches to Nanosheets with the next-generation Intel 20A. Intel 3 offers transistor densities and performance competitive to TSMC N3 series, and Samsung 3GA series nodes.

The wafer contains square 30-core tiles, two of which make up a "Granite Rapids-XCC" processor, with CPU core counts going up to 56-core/112-threads (two cores left unused per tile for harvesting). Each of the 30 cores on the tile is a "Redwood Cove" P-core. In comparison, the current "Emerald Rapids" Xeon processor uses "Raptor Cove" cores, and is built on the Intel 7 foundry node. Intel is planning to overcome the CPU core-count deficit to AMD EPYC, including the upcoming EPYC "Turin" Zen 5 processors with their rumored 128-core/256-thread counts, by implementing several on-silicon fixed-function accelerators that speed up popular kinds of server workloads. The "Redwood Cove" core is expected to be Intel's first IA core to implement AVX10 and APX.

Intel has begun rolling out software binaries compiled with support for upcoming Advanced Performance Extensions (APX) and Advanced Vector Extensions 10 (AVX10) instruction set extensions in their Clear Linux distribution, ahead of any processors officially supporting these capabilities launching. Clear Linux is focusing first on optimized APX and AVX10 versions of foundational software libraries like glibc and Python. This builds on Clear Linux's existing support for optimized x86-64-v2, v3, and v4 code paths, leveraging the latest microarchitectural features of each Intel CPU generation. The rationale is to prepare Clear Linux to fully leverage the performance potential of next-generation Intel Xeon server processors, code-named Granite Rapids, expected to launch later this year.

Granite Rapids will introduce AVX10.1/512 instructions as well as the new APX capabilities, which are currently not well documented implementation wise. By rolling out APX/AVX10 support in software now, Clear Linux aims to have an optimized ecosystem ready when the new processors officially ship. Initially, APX and AVX10 support is being added using the existing GCC compiler. Still, Clear Linux notes they will transition to using the upcoming GCC 14 release with more mature support for these instruction sets. The goal is to eventually have many Clear Linux packages compiled with APX/AVX10 code paths to maximize performance on future Intel CPUs. This continues Clear Linux's strategy of leveraging Intel's latest hardware capabilities in software.

Intel has recently updated its Software Development Emulator (now version 9.33.0)—InstLatX64 noted some intriguing cache designations for Fifth Generation Xeon Scalable Processors. The "Emerald Rapids" family was introduced at last December's "AI Everywhere" event—with sample units released soon after for review. Tom's Hardware was impressed by the Platinum 8592+ CPU's tripled L3 Cache (over the previous generation): "(it) contributed significantly to gains in Artificial Intelligence inference, data center, video encoding, and general compute workloads. While AMD EPYC generally remains the player to beat in the enterprise CPU space, Emerald Rapids marks a significant improvement from Intel's side of that battlefield, especially as it pertains to Artificial Intelligence workloads and multi-core performance in general."

Intel's SDE 9.33.0 update confirms 320 MB of L3 cache for "Emerald Rapids," but the next line down provides a major "Granite Rapids" insight—480 MB of L3 cache, representing a 2.8x leap over the previous generation. Team Blue's 6th Gen (all P-core) Xeon processor series is expected to launch within the latter half of 2024. The American multinational technology company is evidently keen to take on AMD in the enterprise CPU market segment, although Team Red is already well ahead with its current crop of L3 cache designations. EPYC CPUs in Genoa and Genoa-X guises offer maximum totals of 384 MB and 1152 MB (respectively). Intel's recently launched "Emerald Rapids" server chips are observed as being a good match against Team Red EPYC "Bergamo" options.

Intel's advanced packaging prowess demonstration took place this week—attendees were able to get an early-ish look at Team Blue's sixth Generation Xeon Scalable "Sapphire Rapids" processors. This multi-tile datacenter-oriented CPU family is projected to hit the market within the first half of 2024, but reports suggest that key enterprise clients have recently received evaluation samples. Coincidentally, renowned hardware leaker—Yuuki_AnS—has managed to source more information from industry insiders. This follows their complete blowout of more mainstream Raptor Lake Refresh desktop SKUs.

The leaked slide presents a bunch of evaluation sample "Granite Rapids-SP" XCC and "Sierra Forest" HCC SKUs. Intel has not officially published core counts for these upcoming "Avenue City" platform product lines. According to their official marketing blurb: "Intel Xeon processors with P-cores (Granite Rapids) are optimized to deliver the lowest total cost of ownership (TCO) for high-core performance-sensitive workloads and general-purpose compute workloads. Today, Xeon enables better AI performance than any other CPU, and Granite Rapids will further enhance AI performance. Built-in accelerators give an additional boost to targeted workloads for even greater performance and efficiency."

At this year's Hot Chips event, Intel provided the first in-depth look at its next-generation Intel Xeon product lineup, built on a new, innovative platform architecture. The platform marks an important evolution for Intel Xeon by introducing processors with a new Efficient-core (E-core) architecture alongside its well-established Performance-core (P-core) architecture. Code-named Sierra Forest and Granite Rapids, respectively, these new products will bring simplicity and flexibility to customers, offering a compatible hardware architecture and shared software stack to tackle critical workloads such as artificial intelligence.

"It is an exciting time for Intel and its Xeon roadmap. We recently shipped our millionth 4th Gen Xeon, our 5th Gen Xeon (code-named Emerald Rapids) will launch in Q4 2023 and our 2024 portfolio of data center products will prove to be a force in the industry," said Lisa Spelman, Intel corporate vice president and general manager of Xeon Products and Solutions.

Intel has published a preview article covering its new AVX10 ISA (Instruction Set Architecture)—the announcement reveals that both P-Cores & E-Cores (on next-gen processors) will be getting support for AVX-512. Team Blue stated: "Intel AVX10 represents a major shift to supporting a high-performance vector ISA across future Intel processors. It allows the developer to maintain a single code-path that achieves high performance across all Intel platforms with the minimum of overhead checking for feature support. Future development of the Intel AVX10 ISA will continue to provide a rich, flexible, and consistent environment that optimally supports both Server and Client products."

Due to technical issues (E-core related), Intel decided to disable AVX-512 for Alder Lake and Raptor Lake client-oriented CPU lineups. AMD has recently adopted the fairly new instruction set for its Ryzen 7040 mobile series, so it is no wonder that Team Blue is attempting to reintroduce it in the near future—AVX-512 was last seen working properly on Rocket and Tiger Lake chips. AVX10 implementation is expected to debut with Granite Rapids (according to Longhorn), and VideoCardz reckons that Intel will get advanced instructions for Efficiency cores working with its Clearwater Forest CPU architecture.

The "Granite Rapids-D" line of upcoming processors are designed for data-center servers on the edge. These non-socketed processors come in BGA4368 packages. The company is reportedly readying at least two key variants of these chips based on core-counts and memory channels. The "Granite Rapids-D" HCC (high core-count) is an MCM of a "Granite Rapids" LCC (low-core count) compute tile, and a single I/O tile with a 4-channel DDR5 memory interface.

The "Granite Rapids-D" XCC (extreme core-count) has one "Granite Rapids" HCC (high core-count) compute tile, and two I/O tiles that make up the chip's 8-channel DDR5 memory interface. A probable reason for the confusion between LCC, HCC, and XCC terminologies for "Granite Rapids-D" is because the compute tiles are carried over from the main "Granite Rapids-SP" server processors, where they mean different things for the core-counts of mainline servers.

Another next-gen Intel Xeon processor has been leaked by momomo_us via Twitter—the subject of the photograph appears to be a Granite Rapids-SP, alongside a new socket type; LGA 4710. These should not be confused with the recent appearance of a Granite Rapids-AP CPU plus LGA 7529 socket. The latest photo showcases two Intel CPUs with new integrated heat spreader (IHS) designs, both housed in carrier frames labeled "LGA 4710-2." The unit on the left seems to be similar in appearance to current-gen Sapphire Rapids-SP units, but the Xeon sitting on the right is getting most of the attention.

YuuKi_AnS (the leaker of last week's larger GNR-AP) pointed out that the smaller socket type is for a platform codenamed "Beechnut City," that is alleged to support Xeon GNR-SP CPUs. They provided a presentation slide of Intel's Beechnut City Main Validation Vehicle (MVV)—this mainboard appears to sport a dual-socket (2S) setup that can house Granite Rapids-SP Xeon CPUs (compatible with the LGA 4710-2 standard) with a maximum 350 W TDP. The spec sheet indicates that the board can support 8-channel DDR5 memory across 32 DIMM slots (DDR5-6400 1DPC / DDR5-5200 2DPC), as well as 88 PCIe Gen 5.0 lanes. The sixth generation Granite Rapids-SP & AP CPUs (based on "Intel 3" process node) are expected to launch in 2H 2024—following the Sierra Forest lineup.