As a quick follow-up to last week's "Arrow Lake-S" de-lidding by Madness727, we now have a line-up of a de-lidded Core Ultra 9 285K "Arrow Lake-S" processor placed next to a Core i9-14900K "Raptor Lake-S," and the Core i9-12900K "Alder Lake-S." The tile-based "Arrow Lake-S" is visibly larger than the two, despite being made on more advanced foundry nodes. Both the 8P+16E "Raptor Lake-S" and 8P+8E "Alder Lake-S" chips are built on the Intel 7 node (10 nm Enhanced SuperFin). The "Raptor Lake-S" monolithic chip comes with a die-area of 257 mm². The "Alder Lake-S" is physically smaller, at 215 mm². What sets the two apart isn't just the two additional E-core clusters on "Raptor Lake-S," but also larger caches—2 MB of L2 per P-core, increased form 1.25 MB/core, and 4 MB per E-core cluster, increased from 2 MB/cluster.

Thanks to high quality die-shots of the "Arrow Lake-S" by Madness727, we have our first die-area estimations by A Hollow Knight on Twitter. The LGA1851 fiberglass substrate has the same dimensions as the LGA1700 substrate. This is to ensure the socket retains cooler compatibility. Using geometrical measurements, the base tile of the "Arrow Lake-S" is estimated to be 300.9 mm² in area. The base-tile is a more suitable guideline for "die-area," since Intel uses filler tiles to ensure gaps in the arrangement of logic tiles are filled, and the chip aligns with the base-tile below. The base tile, built on an Intel 22 nm foundry node, serves like a silicon interposer, facilitating high-density microscopic wiring between the various logic tiles stacked on top, and an interface to the fiberglass substrate below.

Supply chain insiders have claimed that Intel is working on extending the lifespan of its LGA 1700 platform—a BenchLife report proposes that the "Bartlett Lake-S" processor family is due soon, courtesy of Team Blue's Network and Edge (NEX) business group. Only a few days ago, the rumor mill had placed "Bartlett Lake-S" CPUs in a mainstream desktop category, due to alleged connections with the Raptor Lake-S Refresh series—the former is also (supposedly) based on the Intel 7 processor process. BenchLife believes that DDR4 and DDR5 memory will be supported, but with no mention of possible ECC functionality. Confusingly, chip industry tipsters believe that the unannounced processors could be launched as 15th Gen Core parts.

BenchLife has a history of discovering and reporting on Intel product roadmaps—apparently Bartlett Lake-S can leverage the same core configurations as seen on Raptor Lake-S; namely 8 Raptor Cove P-Cores and 16 Gracemont E-Cores. An insider source claims that a new pure P-Core-only design could exist, sporting up to twelve Raptor Cove units. According to a leaked Bartlett Lake-S series specification sheet: "the iGPU part will use (existing) Intel Xe architecture, up to Intel UHD Graphics 770." The publication alludes to some type of AI performance enhancement as a distinguishing feature for Bartlett Lake-S, when lined up against 14th Gen Core desktop SKUs. Folks salivating at the prospect of a mainstream DIY launch will have to wait and see (according to BenchLife's supply chain insider): "judging from various specifications, this product belonging to the Intel NEX business group may also be decentralized to the consumer market, but the source did not make this part too clear and reserved some room for maneuver."

Intel's upcoming high-end desktop (HEDT) processor lineup for enthusiasts and prosumers is around the corner, and today, we managed to see the flagship SKU - the Xeon W9-3595X. Spotted recently on Geekbench benchmarks, this new chip packs a whopping 60 cores and 120 threads, making it Intel's highest core count HEDT offering yet. The Xeon W9-3595X is based on Intel's advanced Sapphire Rapids architecture, built using the Intel 7 process node. It succeeds the previous flagship 56-core W9-3495X, with four additional cores crammed into the new 350 Watt TDP envelope. Clock speeds have taken a slight hit to accommodate the extra cores, with the maximum turbo frequency lowered from 4.8 GHz on the 3495X to 4.6 GHz on the new 3595X.

However, with more cores, the 3595X should still offer a significant multi-threaded performance uplift for heavily parallel workloads. The Xeon W9-3595X will drop into existing LGA-4677 motherboards, like the ASUS PRO WS 790-ACE, after a BIOS update. It features 112 MB of L3 cache, 120 MB of L2 cache (2 MB per core), and continues Intel's push towards higher core counts for enthusiasts, content creators, and workstation users who need maximum multi-threaded horsepower. Pricing and availability details remain unannounced as of now. But with an appearance on public databases, an official launch of the 60-core HEDT juggernaut seems imminent. These new Sapphire Rapids SKUs will likely have extra AI features, like dedicated AI acceleration engines, in the same manner that server-class SKUs do.

Intel today concluded its client-segment processor launch series with the introduction of the new 14th Gen Core "Raptor Lake Refresh" desktop processor family with 65 W (non-K) models. These would fill the gaps between the various unlocked "K" 125 W SKUs Intel launched in October 2023. All processor models in the series come with base power values of 65 W, with maximum turbo power ranging between 110 W for the Core i3 4P+0E processors, to roughly 154 W for the Core i5 6P+8E processors, to 220 W for the Core i7 8P+12E processors, and as high as 225 W for the top Core i9 8P+16E models.

The Core i9-14900 and i9-14900F offer a maximum P-core boost frequency in line with their K and KF counterparts, of 6.00 GHz, although their base frequency is lowered in line with their reduced base power. The Core i7-14700 and i7-14700F tick at speeds of up to 5.60 GHz. The Core i9 and Core i7 series processor models make use of the "Raptor Lake Refresh" silicon that has 2 MB of L2 cache per P-core, 4 MB of L2 cache per E-core cluster, and up to 36 MB of L3 cache; while the 65 W Core i5 series is based on the smaller silicon that has 1.25 MB of L2 cache per P-core, 2 MB of L2 cache per E-core cluster, and up to 30 MB of L3 cache.

Intel's current generation mobile processor product stack is vast, to say the least. In Q4-2023, the company launched its Core Ultra "Meteor Lake" mobile processors spanning the U-segment (7 W to 28 W), and H-segment (35 W to 45 W). Today, the company capped the upper end of the stack with the 14th Gen Core HX-series mobile processors based on "Raptor Lake Refresh," which dial up core counts to 8P+16E. And now, the company is adding more choice to the U-segment with the Core Processor Series 1, based on a lower core-count variant of the "Raptor Lake Refresh" architecture.

The Core Processor Series 1 follows the same nomenclature as the Core Ultra, where the "Ultra" denotes the latest "Meteor Lake" architecture. Processor model numbering and case badges are similar between Core Processor Series 1 and Core Ultra, except the lack of the "Ultra" brand extension. These chips are built on the monolithic "Raptor Lake Refresh" dies on the Intel 7 foundry node, and lack innovations such as the Low-power Island cores, 3D Performance Hybrid architecture, the all important AI Boost and on-silicon NPU; as well as that 2x faster Arc Xe-LPG integrated graphics, but use existing combinations of "Raptor Cove" and "Gracemont" CPU cores, along with older Xe-LP graphics with up to 96 EU; and a mostly similar I/O.

Intel today announced the release of its 14th Gen Core HX series "Raptor Lake Refresh" mobile processors. Processor models from this series are supposed to cap off the upper end of Intel's mobile processor portfolio. Although Intel released the Core Ultra "Meteor Lake" mobile processors late last year, those chips cover the U-segment, and H-segment (ultraportable, thin-and-light, and mainstream); with the fastest model being the Core Ultra 165H, which caps out at 6P+8E+2LP. The HX segment, which started out as enthusiast-class, broadened in scope over the years to cover the bulky gaming notebooks and portable workstations. These chips typically have a power rating of 55 W. All chips have maximum turbo power rating of 157 W. Intel is tapping into its "Raptor Lake Refresh" silicon to carve out these processors. This is a monolithic chip built on the Intel 7 process, and its package is a multi-chip module with an on-package PCH.

The lineup begins with the Core i9-14900HX, which maxes out the "Raptor Lake Refresh" silicon, with an 8P+16E core-count, with 2 MB of L2 cache per P-core, 4 MB of L2 cache per E-core cluster, and a shared 36 MB L3 cache. The processor's full I/O is wired out, including support for dual-channel DDR5 (SO-DIMMs only), a PCI-Express 5.0 x16 connection for discrete GPUs, a PCI-Express 4.0 x4 connection for a CPU-attached M.2 NVMe SSD, and DMI 4.0 x8 link between the processor die and the PCH die. This PCH puts out up to 16 PCIe Gen 4 lanes, besides up to 12 Gen 3 lanes, which notebook designers can combine with discrete Thunderbolt 4 controllers, and the likes. You can expect Wi-Fi 7 to be prevalent in this crop of premium gaming notebooks. The i9-14900HX features a P-core maximum boost frequency of 5.80 GHz, and an E-core boost frequency of 4.10 GHz.

Intel at the 2023 InnovatiON event surprised audiences with a live demo of a reference notebook powered by a Core "Lunar Lake" processor. What's surprising about this is that "Lunar Lake" won't come out until 2025 (at least), and succeeds not just the upcoming "Meteor Lake" architecture, but also its succeeding "Arrow Lake," which debuts in 2024. Intel is expected to debut "Meteor Lake" some time later this year. What's also surprising is that Intel has proven that the Intel 18A foundry node works. The Compute tile of "Lunar Lake" is expected to be based on Intel 18A, which is four generations ahead of the current Intel 7, which will be succeeded by Intel 4, Intel 3, and Intel 20A along the way.

The demo focused on the generative AI capabilities of Intel's third generation NPU, the hardware backend of AI Boost. Using a local session of a tool similar to Stable Diffusion, the processor was made to generate the image of a giraffe wearing a hat; and a GPT program was made to pen the lyrics of a song in the genre of Taylor Swift from scratch. Both tasks were completed on stage using the chip's NPU, and in timeframes you'd normally expect from discrete AI accelerators or cloud-based services.

To address customers' growing needs, Intel expanded its Intel Agilex FPGA portfolio and broadened its Programmable Solutions Group (PSG) offerings to handle the increased demand for customized workloads, including enhanced AI capabilities, and to provide lower total cost of ownership (TCO) and more complete solutions. These new products and technologies will be the focus of Intel's FPGA Technology Day (IFTD) on Sept. 18, where hardware engineers, software developers and system architects can interact with Intel and partner experts.

FPGAs play an important role in Intel's portfolio by offering flexible and customizable platform capabilities for demanding applications and workloads. Intel FPGAs solve customer challenges from cloud to edge with AI capabilities across silicon, IP and software. Intel's latest announcements illustrate how the company's increased investment in its FPGA portfolio is unfolding. So far in 2023, Intel has released 11 of 15 expected new products - more new product introductions than ever in Intel's FPGA business. As disclosed in its second quarter 2023 earnings call, Intel reported that its PSG business unit delivered 35% revenue growth year-over-year, marking the third consecutive quarter of record revenue.

Intel is giving its "Raptor Lake" client processor architecture an update in the second half of 2023, called simply "Raptor Lake Refresh." When we first heard about this development back in December 2022, there were two theories on how Intel could name these processors. The first one suggested that it would take the same path as "Coffee Lake Refresh" (9th Gen Core), and give "Raptor Lake Refresh" a whole new generational number scheme (14th Gen Core); while the other held that it would try to carve out new processor model numbers within the 13th Gen, like it did with "Haswell Refresh" (4th Gen Core).

Channel vendors in Taiwan are being communicated that the desktop "Raptor Lake Refresh-S" and mainstream notebook "Raptor Lake Refresh-H" will be the final generation of Core i processors (to retain the current nomenclature), and will be slotted as 14th Gen Core. The top desktop SKU could be named "Core i9-14900K," for example. The ultraportable "Raptor Lake Refresh-U" will be the first generation with the new nomenclature Core branding, while "Meteor Lake" will receive the Core Ultra branding, as it has next-generation CPU cores, iGPU, and an on-package AI accelerator.

Finding itself embattled with AMD's EPYC "Genoa" processors, Intel is giving its 4th Gen Xeon Scalable "Sapphire Rapids" processor a rather quick succession in the form of the Xeon Scalable "Emerald Rapids," bound for Q4-2023 (about 8-10 months in). The new processor shares the same LGA4677 platform and infrastructure, and much of the same I/O, but brings about two key design changes that should help Intel shore up per-core performance, making it competitive to EPYC "Zen 4" processors with higher core-counts. SemiAnalysis compiled a nice overview of the changes, the two broadest points of it being—1. Intel is peddling back on the chiplet approach to high core-count CPUs, and 2., that it wants to give the memory sub-system and inter-core performance a massive performance boost using larger on-die caches.

The "Emerald Rapids" processor has just two large dies in its extreme core-count (XCC) avatar, compared to "Sapphire Rapids," which can have up to four of these. There are just three EMIB dies interconnecting these two, compared to "Sapphire Rapids," which needs as many as 10 of these to ensure direct paths among the four dies. The CPU core count itself doesn't see a notable increase. Each of the two dies on "Emerald Rapids" physically features 33 CPU cores, so a total of 66 are physically present, although one core per die is left unused for harvesting, the SemiAnalysis article notes. So the maximum core-count possible commercially is 32 cores per die, or 64 cores per socket. "Emerald Rapids" continues to be based on the Intel 7 process (10 nm Enhanced SuperFin), probably with a few architectural improvements for higher clock-speeds.

Intel Corporation today reported first-quarter 2023 financial results. "We delivered solid first-quarter results, representing steady progress with our transformation," said Pat Gelsinger, Intel CEO. "We hit key execution milestones in our data center roadmap and demonstrated the health of the process technology underpinning it. While we remain cautious on the macroeconomic outlook, we are focused on what we can control as we deliver on IDM 2.0: driving consistent execution across process and product roadmaps and advancing our foundry business to best position us to capitalize on the $1 trillion market opportunity ahead."

David Zinsner, Intel CFO, said, "We exceeded our first-quarter expectations on the top and bottom line, and continued to be disciplined on expense management as part of our commitment to drive efficiencies and cost savings. At the same time, we are prioritizing the investments needed to advance our strategy and establish an internal foundry model, one of the most consequential steps we are taking to deliver on IDM 2.0."

Intel Foundry Services, the in-house semiconductor foundry of Intel, announced that its 2 nm-class Intel 20A and 1.8 nm-class Intel 18A foundry nodes have completed development, and are on course for mass-producing chips on their roadmap dates. Chips are expected to begin mass-production on the Intel 20A node in the first half of 2024, while those on the Intel 18A node are expected to begin in the second half of 2024. The completion of the development phase means that Intel has finalized the specifications and performance/power targets of the nodes, the tools and software required to make the chips, and can now begin ordering them to build the nodes. Intel has been testing these nodes through 2022, and with the specs being finalized, chip-designers can accordingly wrap up development of their products to align with what these nodes have to offer.

Intel 20A (or 20-angstrom, or 2 nm) node introduces gates-all-around (GAA) RibbonFET transistors with PowerVIAs (an interconnect innovation that contributes to transistor densities). The Intel 20A node is claimed to offer a 15% performance/Watt gain over its predecessor, the Intel 3 node (FinFET EUV, 3 nm-class), which by itself offers an 18% performance/Watt gain over Intel 4 (20% perf/Watt gain over the current Intel 7 node), the node that is entering mass-production very soon. The Intel 18A node is a further refinement of Intel 20A, and introduces a design improvement to the RibbonFET that increases transistor density at scale, and a claimed 10% performance/Watt improvement over Intel 20A.

Intel's server processor lineup led by the 4th Gen Xeon Scalable "Sapphire Rapids" processors face stiff competition from AMD 4th Gen EPYC "Genoa" processors that offer significantly higher multi-threaded performance per Watt on account of a higher CPU core-count. The gap is only set to widen, as AMD prepares to launch the "Bergamo" processor for cloud data-centers, with core-counts of up to 128-core/256-thread per socket. A technologically-embattled Intel is preparing quick counters as many as three new server microarchitecture launches over the next 23 months, according to Intel, in its Q4-2022 Financial Results presentation.

The 4th Gen Xeon Scalable "Sapphire Rapids," with a core-count of up to 60-core/120-thread, and various application-specific accelerators, witnessed a quiet launch earlier this month, and is shipping to Intel customers. The company says that it will be joined by the Xeon Scalable "Emerald Rapids" architecture in the second half of 2023; followed by "Granite Rapids" and "Sierra Forest" in 2024. Built on the same LGA4677 package as "Sapphire Rapids," the new "Emerald Rapids" MCM packs up to 64 "Raptor Cove" CPU cores, which support higher clock-speeds, higher memory speeds, and introduce the new Intel Trust Domain Extensions (TDX) instruction-set. The processor retains the 8-channel DDR5 memory interface, but with higher native memory speeds. The chip's main serial interface is a PCI-Express Gen 5 root-complex with 80 lanes. The processor will be built on the last foundry-level refinement of the Intel 7 node (10 nm Enhanced SuperFin); many of these refinements were introduced with the company's 13th Gen Core "Raptor Lake" client processors.

Intel Corporation today reported fourth-quarter and full-year 2022 financial results. The company also announced that its board of directors has declared a quarterly dividend of $0.365 per share on the company's common stock, which will be payable on March 1, 2023, to shareholders of record as of February 7, 2023.

"Despite the economic and market headwinds, we continued to make good progress on our strategic transformation in Q4, including advancing our product roadmap and improving our operational structure and processes to drive efficiencies while delivering at the low-end of our guided range," said Pat Gelsinger, Intel CEO. "In 2023, we will continue to navigate the short-term challenges while striving to meet our long-term commitments, including delivering leadership products anchored on open and secure platforms, powered by at-scale manufacturing and supercharged by our incredible team."

Intel today debuted its 2023 N-series entry-level mobile processors targeting a range of low-cost notebook applications, such as educational notebooks for bulk purchase and distribution by public schools. These processors are built on the same Intel 7 (10 nm Enhanced SuperFin) node as the 13th Gen Core processors, but come with just "Gracemont" E-cores, and no P-cores.

The silicon physically features two "Gracemont" E-core clusters amounting to 8 E-cores, 6 MB of shared L3 cache, and an iGPU based on the Xe-LP graphics architecture, with 32 EUs (execution units). The silicon also features a GNI 3.0 for basic AI acceleration using a truncated version of the DLBoost instruction set, and an IPU (as in image processing unit), which can improve web-camera experience (on the fly background noise suppression). The iGPU also offers hardware-accelerated AV1 decoding. On the platform-side, the processor features a single-channel DDR5 memory interface that's backwards-compatible with DDR4, and also supports LPDDR5. Storage interfaces include eMMC, UFS 2.1, and NVMe SSD. Wireless networking options available with the platform include fast WiFi 6E and Bluetooth 5.2.

Intel's upcoming Sapphire Rapids processors have faced multiple delays over the past few years. Built on Intel 7 manufacturing process, the CPU is supposed to bring new advances for Intel's clients and significant performance uplifts. However, TrendForce reports that the mass production of Sapphire Rapids processors will be delayed from Q4 of 2022 to the first half of 2023. The reason for this (yet another) delay is that the Sapphire Rapids MCC die is facing a meager yield on Intel 7 manufacturing technology, estimated to be at only 50-60% at the time of writing. Economically, this die-yielding percentage is not profitable for Intel since many dies are turning out to be defective.

This move will stop many OEMs and cloud service providers (CSPs) from rolling out products based on the Sapphire Rapids design and will have to delay it until next year's mass production. On the contrary, AMD is likely to reap the benefits of Intel's delay, and AMD's x86 server market share will jump from 15% in 2022 to 23% in 2023. Given that AMD ships processors with the highest core counts, many companies will opt for AMD's solutions in their data centers. With more companies being concerned by their TCO measures with rising energy costs, favors fall in the hand of single-socket servers.

Intel today launched its 13th Gen Core "Raptor Lake" desktop processors, and companion 700-series motherboard chipset. These processors are built in the same LGA1700 package as the previous generation "Alder Lake," and are backwards-compatible with 600-series chipset motherboards through a BIOS update. Likewise, 700-series chipset motherboards support older "Alder Lake" processors. With the new 13th Gen Core, Intel is broadly promising an up to 15% uplift in single-threaded performance, which has a bigger bearing on gaming performance; and an up to 41% multi-threaded performance uplift; over the previous-generation, when comparing the top Core i9-13900K with its predecessor, the i9-12900K. Intel also claims to have outclassed the AMD Ryzen 9 5950X in multi-threaded performance, and the Ryzen 7 5800X3D in gaming performance.

Intel's performance claims are backed by some impressive hardware changes despite the company sticking with the same Intel 7 (10 nm Enhanced SuperFin) foundry node as "Alder Lake." To begin with, the single-thread performance uplift comes from the new "Raptor Cove" performance-core, which promises an IPC uplift over the previous-generation "Golden Cove," comes with more dedicated L2 cache of 2 MB per core (compared to 1.25 MB per core in the previous-generation); and significantly higher clock-speeds, going all the way up to 5.80 GHz. "Raptor Lake" has up to 8 P-cores, but the company has put in a lot of work in improving the contribution of E-cores to the processor's overall multi-threaded performance uplift. This is achieved by doubling the E-core count to 16. These are the same "Gracemont" E-cores as previous-generation, but Intel has doubled the L2 cache that's shared in a 4-core Gracemont cluster, from 2 MB per cluster to 4 MB. There are upgrades to even the hardware prefetchers of these cores.

Andreas Schilling with Hardwareluxx.de, as part of the Intel Tech Tour Israel, got to hold a 12-inch wafer full of "Raptor Lake-S" dies. These are dies in their full 8P+16E configuration. The die is estimated to measure 257 mm² in area. We count 231 full dies on this wafer. Intel is building "Raptor Lake" on the same 10 nm Enhanced SuperFin (aka Intel 7) node as "Alder Lake." The die is about 23% larger than "Alder Lake" on account of two additional E-core clusters, possibly larger P-cores, and larger L2 caches for both the P-core and E-core clusters. "Raptor Lake" gains significance as it will be the last client processor from Intel to be built on a monolithic die of a uniform silicon fabrication node. Future generations are expected to take the chiplets route, realizing the company's IDM 2.0 product development strategy.

A leaked Intel company document detailing the "go to market" (GTM) plan for its 13th Gen Core "Raptor Lake" desktop processors, reveals key dates associated with it. Intel will likely hold a launch event for the 13th Gen Core "Raptor Lake" processors on September 27, 2022 (when it's September 28 in Taiwan). This happens to be the same day AMD's Ryzen 7000 "Zen 4" processors go on sale. Pre-orders for these processors will open on October 13, 2022 (or October 14 in Taiwan). This is when you'll be able to order one online. October 20 is when the processors will be available to purchase off the shelf (October 21 in Taiwan). This document does not deal with review NDAs, so we'll have to guess that reviews go live somewhere between September 27 and October 13.

Built on the same Intel 7 process as "Alder Lake," "Raptor Lake" introduces an IPC increase with its "Raptor Cove" P-cores, and a doubling in the count of its "Gracemont" E-cores, along with increases in L2 cache sizes for both the P-cores and E-core clusters. The processor is said to be built on the same LGA1700 package as the 12th Gen, and compatible with Intel 600 series chipset motherboards with a UEFI firmware update. The processors launch alongside new Intel 700-series chipset motherboards that have out-of-the-box support for them.

According to an investigative report by "Chips and Cheese," the larger L2 caches in Intel's 13th Gen Core "Raptor Lake-S" doesn't come with a proportionate increase in cache latency, and Intel seems to have contained the latency increase well. "Raptor Lake-S" significantly increases L2 cache sizes over the previous generation. Each of its 8 "Raptor Cove" P-cores has 2 MB of dedicated L2 cache, compared to the 1.25 MB with the "Golden Cove" P-cores powering the current-gen "Alder Lake-S," which amounts to a 60 percent increase in size. The "Gracemont" E-core clusters (group of four E-cores), sees a doubling in the size of the L2 cache that's shared among the four cores in the cluster, from 2 MB in "Alder Lake," to 4 MB. The last-level L3 cache shared among all P-cores and E-core clusters, sees a less remarkable increase in size, from 30 MB to 36 MB.

Larger caches have a direct impact on performance, as more data is available close to the CPU cores, sparing them a lengthy fetch/store operation to the main memory (RAM). However, making caches larger doesn't just cost die-area, transistor-count, and power/heat, but also latency, even though L2 cache is an order of magnitude faster than the L3 cache, which in turn is significantly faster than DRAM. Chips and Cheese tracked and tabulated the L2 cache latencies of past Intel client microarchitectures, and found a generational increase in latencies with increasing L2 cache sizes, leading up to "Alder Lake." This increase has somehow tapered with "Raptor Lake."

Intel's semiconductors nodes have been quite controversial with the arrival of the 10 nm design. Years in the making, the node got delayed multiple times, and only recently did the general public get the first 10 nm chips. Today, at IEEE's annual VLSI Symposium, we get more details about Intel's upcoming nodes, called Intel 4. Previously referred to as a 7 nm process, Intel 4 is the company's first node to use EUV lithography accompanied by various technologies. The first thing when a new process node is discussed is density. Compared to Intel 7, Intel 4 will double the transistor count for the same area and enable 20% higher performing transistors.

Looking at individual transistor size, the new Intel 4 node represents a very tiny piece of silicon that is even smaller than its predecessor. With a Fin Pitch of 30 nm, Contact Gate Poly Pitch of 50 nm between gates, and Minimum Metal Pitch (M0) of 50 nm, the Intel 4 transistor is significantly smaller compared to the Intel 7 cell, listed in the table below. For scaling, Intel 4 provides double the number of transistors in the same area compared to Intel 7. However, this reasoning is applied only to logic. For SRAM, the new PDK provides 0.77 area reduction, meaning that the same SoC built on Intel 7 will not be half the size of Intel 4, as SRAM plays a significant role in chip design. The Intel 7 HP library can put 80 million transistors on a square millimeter, while Intel 4 HP is capable of 160 million transistors per square millimeter.

With the exponential growth of data in the world today, coupled with the shift from centralized clusters of compute and data storage to a more distributed architecture that processes data everywhere—in the cloud, at the edge, and at all points in between—Field-Programmable Gate Arrays (FPGAs) are taking on an increasingly important role in modern applications from the data center to the network to the edge. The flexibility, power efficiency, massively parallel architecture, and huge input/output (I/O) bandwidth make FPGAs attractive for accelerating a wide range of tasks from high-performance computing (HPC) to storage and networking. Many of these applications put enormous demands on memory, including capacity, bandwidth, latency and power efficiency.

To handle these high-demand applications, Intel today introduced product details for the Intel Agilex M-Series FPGAs, built on Intel 7 process technology, the industry's highest memory bandwidth FPGAs with in-package HBM DRAM. The Intel Agilex M-Series incorporates several new functional innovations and features that provide the industry with the high-speed networking, computing and memory acceleration required to meet ever-more ambitious performance and capability goals for networks, cloud and embedded edge applications.

Today, Intel expands the 12th Gen Intel Core mobile processor lineup with the official launch of 12th Gen Intel Core P-series and U-series processors. Engineered for blazing performance and superior productivity, these 20 new mobile processors will power the next generation of thin-and-light laptops. The first devices will be available in March 2022, with more than 250 coming this year from Acer, Asus, Dell, Fujitsu, HP, Lenovo, LG, MSI, NEC, Samsung and others.

"Following our launch of the fastest mobile processor for gaming, we're now expanding our 12th Gen Intel Core processor family to deliver a massive leap forward in performance for thin-and-light laptops. From the ultra-thin form factors to enthusiast-grade performance in a sleek design, we're providing consumers and businesses with leadership performance and cutting-edge technologies."

During the International Solid-State Circuits Conference (ISSCC) 2022, Intel gave us a more significant look at its upcoming Ponte Vecchio HPC accelerator and how it operates. So far, Intel convinced us that the company created Ponte Vecchio out of 47 tiles glued together in one package. However, the ISSCC presentation shows that the accelerator is structured rather interestingly. There are 63 tiles in total, where 16 are reserved for compute, eight are used for RAMBO cache, two are Foveros base tiles, two represent Xe-Link tiles, eight are HBM2E tiles, and EMIB connection takes up 11 tiles. This totals for about 47 tiles. However, an additional 16 thermal tiles used in Ponte Vecchio regulate the massive TDP output of this accelerator.

What is interesting is that Intel gave away details of the RAMBO cache. This novel SRAM technology uses four banks of 3.75 MB groups total of 15 MB per tile. They are connected to the fabric at 1.3 TB/s connection per chip. In contrast, compute tiles are connected at 2.6 TB/s speeds to the chip fabric. With eight RAMBO cache tiles, we get an additional 120 MB SRAM present. The base tile is a 646 mm² die manufactured in Intel 7 semiconductor process and contains 17 layers. It includes a memory controller, the Fully Integrated Voltage Regulators (FIVR), power management, 16-lane PCIe 5.0 connection, and CXL interface. The entire area of Ponte Vecchio is rather impressive, as 47 active tiles take up 2,330 mm², whereas when we include thermal dies, the total area jumps to 3,100 mm². And, of course, the entire package is much larger at 4,844 mm², connected to the system with 4,468 pins.

Intel is allegedly advancing the launch of its 13th Gen Core "Raptor Lake-S" desktop processors to some time in Q3-2022, according to a report by Moore's Law is Dead. It was earlier believed to be a Q4 launch, much like "Alder Lake" was, in 2021. The report predicts the debut of "Raptor Lake" in the desktop segment in Q3-2022 (between July and September), with certain mobile SKUs expected toward the end of the year, in Q4. The Core "Raptor Lake-S" processor is built in the existing Socket LGA1700 package, and is being designed for compatibility with existing Intel 600-series chipset motherboards with a firmware update.

The "Raptor Lake-S" silicon is built on the existing Intel 7 (10 nm Enhanced SuperFin) node, and physically features eight "Raptor Cove" P-cores, along with sixteen "Gracemont" E-cores that are spread across four clusters. The chip has additional cache memory, too. Moore's Law is Dead predicts that the "Raptor Cove" P-core could introduce an IPC uplift in the region of 8 to 15 percent over the "Golden Cove" core, while the chip's overall multi-threaded performance could be anywhere between 30 to 40 percent over "Alder Lake-S," on account of not just increased IPC of the P-cores, but also eight additional E-cores.