GIGABYTE TECHNOLOGY Co. Ltd, a leading manufacturer of motherboards, graphics cards, and hardware solutions, today announced to present the latest gaming products at COMPUTEX 2022. The innovations include its flagship gaming solutions powered by Intel 12th gen processors. The perfect combination of the IF Design Awarded Z690 AORUS XTREME motherboard, high-end key components, and big size monitors provide remarkable gaming experience. The Project Stealth kit enables an easy and simple assembly experience with special interface and cables hidden design while further enhances the system airflow for optimized cooling effect. Meanwhile, the new gaming PC, Model S delivers powerful, cool, and silent operation even on 3A games with its slick and neat aesthetics.

Moreover, the latest AMD Socket AM5 motherboards including gaming series of X670 AORUS XTREME, MASTER, PRO AX and X670 AERO D for designers will be first exposed in this exhibition as well. Users can take a sneak peek at the advanced design and extensive features of PCIe 5.0 graphics slot, M.2 Gen5 interface, exclusive PCIe/M.2 EZ-latch on GIGABYTE motherboards.

Phison Electronics Corp., a leading provider of NAND controller and flash storage solutions, announced today a strategic collaboration with AMD and Micron to build a cooperative PCIe Gen5 ecosystem of compatible products that elevate the gaming and creator experience. Phison's role includes delivering a class-leading PCie Gen5 SSD controller - PS5026-E26 - that features nearly a 2x performance increase over the previous generation flagship while adhering to the same power limitations of the M.2 form factor.

"We are pleased to announce our cooperative effort with Micron and AMD to advance the technological development of PCIe Gen5 storage offerings, as this validates Phison's commitment to upholding customer-centric values," said Leo Huang, Sr. Director, Product Marketing, Phison. "The E26 controller enables gamers to compete at the highest level and helps content creators to maximize the overall system performance to increase productivity." The need for high-speed storage has increased with the popularity of 5G Wireless availability worldwide. Global markets including desktop PC, notebooks, gaming consoles, cloud servers and even mobile devices will benefit from increased data transfer rates and the bandwidth available for multitask purposes. The ecosystem consisting of AMD's AM5 platform, Phison's PS5026-E26 controller, Micron's DDR5 DRAM and Replacement Gate 3D NAND allow for platform acceleration across the entire system to meet the requirements for today's always-connected lifestyle.

We're expecting to see a wide range of AM5 motherboards next week during Computex, but we're already being treated to some early leaks ahead of the show. The most recent leak was picked up by @9550pro on Twitter, but was originally posted on Baidu. What we're looking at here though, isn't actually a picture of a motherboard, but rather the placement map for the SMD components used during motherboard assembly. These pictures are often used to make sure things like the solder mask and components were applied properly during production. However, it does give us a good look at the overall layout of the ASUS X670 Prime-P WiFi and the fact that the X670 chipset does indeed consist of two parts. What is also clear is that we're looking at a PCIe 5.0 x16 slot here, as these slots are SMD components rather than through hole.

Other things that are clearly visible, includes support for three M.2 slots, of which the one closest to the CPU might be PCIe 5.0, but there's really no way of telling by just looking at the connector placement. There's also a space for a WiFi module at the bottom of the rear I/O, but beyond that, it's hard to make out the proper port layout. However, there appears to be at least one USB-C port at the rear, as well as a header for another one at the front of the motherboard, next to a USB 3.0 header. The board also appears to feature 14 power phases and obviously four DDR5 DIMM slots. The chip between the two chipsets are either a Super I/O chip or possibly a PCIe redriver. In addition to the x16 PCIe 5.0 slot, the X670 Prime-P appears to be getting a single PCIe x1 slot and two PCIe x4 slots, both which appear to get physical x16 slots. Finally the board should have two SATA ports mounted at a 90-degree angle, as well as four ports at the bottom edge of the PCB. ASUS seems to have gone for a solar system pattern on the PCB itself, so it'll be interesting to see what the actual boards will look like.

It appears that ASRock got a little bit too excited and posted a Computex video earlier today that contained a brief glimpse of its upcoming X670E Taichi motherboard. The screenshot that was captured by Wccftech doesn't give away too much details, but the board appears to have at least three M.2 slots and a pair of PCIe x16 slots, of which at least one is meant to be of the PCIe 5.0 variety. The rest of the board is covered in heatsinks and various shrouds. The board will feature Realtek's ALC4082 USB attached audio codec, as well as a ESS ES9218 DAC. It is also said to sport a 26-phase VRM setup. The board is also expected to have Thunderbolt 4 support. The video has unfortunately been taken down, so we'll have to wait until next week to find out more details.

In related news, @momomo_us has leaked details of several upcoming AM5 motherboards, of which four models are from ASRock and two from ASUS. The ASRock models are the X670E Taichi mentioned above, the X670 PG Riptide, X670 Phantom Gaming 4 and the X670 Steel Legend. The two ASUS models are the ProArt X670E-Creator WiFi and the ProArt B650-Creator. Finally Gigabyte has revealed that the company will be displaying its X670 Aorus Xtreme, X670 Master, X670 Pro AX and X670 AERO D at Computex next week. The company mentions PCIe 5.0 for both graphics and the M.2 interface, which pretty much cements the earlier rumors about AMD offering PCIe 5.0 support for the M.2 interface on the AM5 platform.

Taiwanese ASMedia appears to become the first peripheral chipset company to launch a USB4 host-controller chipset, based on reports from an event the company held this week. ASMedia is at least the first company to get certified by the USB-IF, as its ASM4242 host-controller is the first of its kind to get certified. The ASM4242 was certified alongside the ASM2464PD device controller, although it's unclear exactly what type of device controller this is, but the PD in the model name indicates that it has native support for USB PD power delivery, without the need of any additional chips. This should allow for simpler implementation, as well as it would be saving some PCB space that the extra components no longer take up.

The ASM4242 is said to have a PCIe 4.0 x4 interface and does as such support up to 64 Gbps of bandwidth. As this is a two port controller, it's still not quite enough to enable both ports to operate at the full 40 Gbps that USB4 Gen 3x2 supports, but it should be enough for most consumer implementations. ASMedia has also added support for DP Alt Mode and USB4 is of course also backwards compatible with Thunderbolt 3. ASMedia is already sampling its partners. We should hopefully get a better look at what ASMedia is working on next week, but DigiTimes mentions that ASMedia has also developed PCIe 5.0 controllers of some kind and have finished the tape-out of said products.

Phison Electronics Corp., a leading provider of NAND controller and NAND storage solutions integration services, announced today that it is successfully deploying the world's first PCIe 5.0 Redriver IC PS7101 certified by the PCI-SIG Association to help solve the compatibility problems of high-speed signal transmission between CPU (Central Processing Unit) and peripheral devices (such as SSD and graphics card, etc.). In the generation of PCIe 5.0 high-speed transmission, Redriver ICs will be required in devices such as desktop computers, servers, industrial computers, cables, and notebook computers. Depending on the degree of signal attenuation and the number of compensation channels, each system device will require 2 to 16 Redriver ICs. According to market research agencies, high-speed transmission signal enhancement ICs (including Redriver and Retimer ICs) will reach a market size of 50 million per year in 2025.

With the vigorous development of massive data, artificial intelligence, and cloud computing, demand for high-speed data transmission continues to rise. The CPU is the core of high-speed signal transmission. Under the leadership of CPU chip suppliers such as Intel and AMD, the transmission interface of the system has ushered the PCIe 5.0 generation, and the single-lane transmission speed reaching 32 Gbps per second, which is twice that of the previous generation PCIe 4.0. However, in the high-speed transmission environment of PCIe 5.0, compatibility issues such as signal attenuation and noise effects on the motherboard have become common problems and challenges faced by all system integrators.

Tachyum today launched the world's first universal processor, Prodigy, which unifies the functionality of a CPU, GPU and TPU in a single processor, creating a homogeneous architecture, while delivering massive performance improvements at a cost many times less than competing products.

After the company undertook its mission to conquer the processor performance plateau in nanometer-class chips and the systems they power, Tachyum has succeeded by launching its first commercial product. The Prodigy Cloud/AI/HPC supercomputer processor chip offers 4x the performance of the fastest Xeon, has 3x more raw performance than NVIDIA's H100 on HPC and has 6x more raw performance on AI training and inference workloads, and up to 10x performance at the same power. Prodigy is poised to overcome the challenges of increasing data center power consumption, low server utilization and stalled performance scaling.

Samsung Electronics, the world leader in advanced memory technology, today announced its development of the industry's first 512-gigabyte (GB) Compute Express Link (CXL) DRAM, taking an important step toward the commercialization of CXL which will enable extremely high memory capacity with low latency in IT systems. Since introducing the industry's first CXL DRAM prototype with a field-programmable gate array (FPGA) controller in May 2021, Samsung has been working closely with data center, enterprise server and chipset companies to develop an improved, customizable CXL device.

The new CXL DRAM is built with an application-specific integrated circuit (ASIC) CXL controller and is the first to pack 512 GB of DDR5 DRAM, featuring four times the memory capacity and one-fifth the system latency over the previous Samsung CXL offering. "CXL DRAM will become a critical turning point for future computing structures by substantially advancing artificial intelligence (AI) and big data services, as we aggressively expand its usage in next-generation memory architectures including software-defined memory (SDM)," said Cheolmin Park, Vice President of Memory Global Sales & Marketing at Samsung Electronics, and Director of the CXL Consortium. "Samsung will continue to collaborate across the industry to develop and standardize CXL memory solutions, while fostering an increasingly solid ecosystem."

On Tuesday and Wednesday next week, Intel will host its Intel Vision event which will take a look at what the company will bring in the near future. Although not specified in the program, VideoCardz have managed to secure a slide listing no less than seven new Alder Lake-HX mobile CPUs that Intel are expected to reveal during the event. The new chips will be fully loaded out with eight performance and eight efficient cores and with a total of 24 threads at the top-end, i.e. the same as Intel's current desktop parts. In fact, according to VideoCardz, these CPUs are the same physical size as the desktop CPUs, just in a different packaging that reduces the Z-height.

Alder Lake-HX comes with a base power TDP of 55 W and is said to be a new enthusiast CPU range from Intel in the mobile space. As such, overclocking is said to be allowed, which can push the turbo TDP to at least 157 W and this applies to all the CPUs in the Alder Lake-HX family. The platform is also said to feature a full set of PCIe lanes, which means 16 PCIe 5.0 lanes, 20 PCIe 4.0 lanes and 12 PCIe 3.0 lanes. DDR5 memory with XMP 3.0 profiles is also supported, alongside something called Dynamic Memory Boost. Oddly enough, Intel has even made several vPro SKU's that support overclocking, albeit with some kind of limit compared to the non vPro SKUs. It'll be interesting to see what kind of notebooks these CPUs will be going into and what kind of cooling systems will be required, but it's pretty obvious we're talking desktop replacement machines.

Montage Technology, a leading data processing and interconnect IC design company, today announced that it has delivered the world's first Compute Express Link (CXL ) Memory eXpander Controller (MXC). The device is designed to be used in Add-in Cards (AIC), Backplanes or EDSFF memory modules to enable significant scaling of memory capacity and bandwidth for data-intensive applications such as high-performance computing (HPC) and artificial intelligence (AI). The MXC is a Type 3 CXL DRAM memory controller. The MXC supports and is compliant with both DDR4 & DDR5 JEDEC standards. It is also designed to the CXL 2.0 specification and supports PCIe 5.0 specification speeds. The MXC provides high-bandwidth and low-latency interconnect between the CPU and the CXL-based devices, allowing them to share memory for higher performance, reduced software stack complexity, and lower data center TCO.

Montage Technology's President, Stephen Tai said, "CXL is a key technology that enables innovative ways to do memory expansion and pooling which will play an important role in next-generation server platforms. I'm very excited that Montage is the first company in the industry to successfully deliver the MXC chip, which signals we are making a critical step towards advancing the CXL interconnect technology to the memory market." CXL Consortium's President, Siamak Tavallaei said, "The CXL Consortium is excited to see continued CXL specification adoption to enable technologies and solutions such as the CXL DRAM Memory eXpander Controller." Montage Technology is working closely with industry-leading memory manufacturers to deliver advanced memory products based on the CXL MXC and help develop a robust memory ecosystem around CXL.

Next week at Dell Technologies World, KIOXIA America, Inc. will be on hand to demonstrate how its innovative solid state drives (SSDs) are accelerating customer application performance and enabling product breakthroughs. From SSDs designed with PCIe 5.0 technology that boost power and performance to the industry's first lineup of Enterprise and Datacenter Standard Form Factor (EDSFF) E3.S SSDs, best in class drives from KIOXIA are used in a number of Dell product lines.

KIOXIA, the inventor of NAND flash, sits at the forefront of flash storage and SSD innovation. Achievements such as the introduction of 3D flash memory, XL-FLASH storage class memory, and new form factors and interfaces underscore the contributions the company has made toward enabling next-gen applications - and transforming the digital world.

AMD is preparing to launch its highly-anticipated AM5 socket for the next generation of motherboards. And today, thanks to the sources over at Tom's Hardware, we have information regarding memory support for B650 and X670 motherboards. According to the report, both B650 and X670 chipsets will limit the user's memory option to the latest DDR5 memory standard, making it impossible for users with already existing DDR4 memory to perform a seamless upgrade to a new platform. So far, we don't have a lot of details about Zen4's integrated memory controller, and we can't be certain if it supports DDR5 only or carries legacy DDR4 support. However, it seems like B650 and X670 motherboards will have no plans to enable the DDR4 standard memory usage.

Additionally, the report confirms that the B650 chipset is connected to the AM5 socket via PCIe 4.0 x4 connection and has eight lanes of PCIe 4.0 (four of which are for M.2 SSD), four SATA, and lots of USB ports. Documents suggest that the chipset-socket connection is available using PCIe 5.0 for some AM5 processors, so we have to wait and see how it works. As far as high-end X670 is concerned, this chipset is a combination of two chipset dies, presumably a combination of two B650 modules. This doesn't work as the older north/southbridge type of a solution but rather doubled connectivity of a single B650 chipset. We have to wait for the official launch to confirm this information.

BIOSTAR, a leading manufacturer of motherboards, graphics cards, and storage devices today, unveils the brand-new Z690A-SILVER motherboard. Designed to unleash the maximum potential of Intel Alder Lake Z690 chipset, the Z690A-SILVER motherboard brings shiny new features to your desktop, packed with raw unhindered potential.

PCIe 5.0 takes center stage on the Z690A-SILVER motherboard, with data transfer rates reaching 128 Gb/s. Extract maximum performance from the latest graphics cards with PCIe 5.0 backed by Intel's all-powerful 12th gen processors. Take your gaming to the next level with BIOSTAR's all new Z690A-SILVER motherboard. The Z690A-SILVER motherboard supports up to 4 DIMMs of high-speed DDR4 RAMs capable of overclocking numbers exceeding 5000+MHz (O.C). Furthermore, features like PCIe M.2 4.0, USB 3.2 GEN2 TYPE-A, and C bring excellent utility for users.

One of the largest cloud providers in China, Alibaba, has today announced a preview for a new instance powered by Yitian 710 processor. The new processor is a collection of Alibaba's efforts to develop a home-grown design capable of powering cloud instances and the infrastructure needed for it and its clients. Without much further ado, the Yitian 710 is based on Armv9 ISA and features 128 cores. Ramping up to 3.2 GHz, these cores are paired with eight-channel DDR5 memory to enable sufficient data transfer. In addition, the CPU supports 96 PCIe 5.0 lanes for IO with storage and accelerators. These are most likely custom designs, and we don't know if they are using a blueprint based on Arm's Neoverse. The CPU is manufactured at TSMC's facilities on 5 nm node and features 60 billion transistors.

Alibaba offers these processors as a part of their Elastic Compute Service (ECS) instance called g8m, where users can select 1/2/4/8/16/32/64/128 vCPUs, where each vCPU is equal to one CPU core physically. Alibaba is running this as a trial option and notes that users should not run production code on these instances, as they will disappear after two months. Only 100 instances are available for now, and they are based in Alibaba's Hangzhou zone in China. The company notes that instances based on Yitian 710 processors offer 100 percent higher efficiency than existing AMD/Intel solutions; however, they don't have any useful data to back it up. The Chinese cloud giant is likely trying to test and see if the home-grown hardware can satisfy the needs of its clients so that they can continue the path to self-sustainability.

AMD is slowly gearing up to launch the latest 7000 series Ryzen processors codenamed "Raphael." Thanks to the famous hardware leaker @9550pro on Twitter, we have evidence of B650 motherboards for the next-generation hardware. According to the image posted by the leaker, it appears like AMD's Ryzen 7000 series Raphael processor is running on MSI's MAG B650 motherboard at a very high voltage of 1.5 Volts VCore. While we don't know the exact SKU running here, we see a note referring to it as an Engineering Sample, meaning that this is not a final product. It is expected to see the new AM5 platform make a debut alongside DDR5 and PCIe 5.0 technology, so we have to wonder what the B650 chipset can support.

Keysight Technologies, Inc., a leading technology company that delivers advanced design and validation solutions to help accelerate innovation to connect and secure the world, announced an end-to-end PCIe test solution for digital development and senior engineers that enable the simulation, pathfinding, characterization, validation and compliance testing of PCIe designs. The rapid increase of AI (artificial intelligence) related workloads in data centers and edge computing demand new compute designs. Data center system designers are challenged to provide new higher speed devices within reduced design cycles. New PCIe devices will need to keep up with Ethernet network interfaces in data centers and the emergence of CXL (compute express link).

To maintain performance goals and prepare for the PCIe 6.0 move to pulse amplitude modulation 4-level (PAM4), customers need a smooth transition from PCIe 5.0 to 6.0, where the integrity of PCIe measurements are backed by leading-edge tools and comply with PCIe specifications. With shrinking design cycles, end-to-end solutions from simulation to validation through the layers of the stack are required. Keysight provides a comprehensive physical layer test solution, approved by the Peripheral Component Interconnect Special Interest Group (PCI-SIG) to test transmitters and receivers for all generations of the PCIe specification, which is currently supported by the PCI-SIG integrators list. To reflect the increasing time to market pressure for design engineers, Keysight extends the portfolio to cover PCIe protocol, making it the first end-to-end solution from simulation to full stack validation.

As unreliable as Geekbench can be as a comparative benchmark, it's also an excellent source for upcoming hardware leaks and in this case more details about AMD's upcoming Zen 4 based Genoa server and workstation processors has leaked. Someone with access to a 32-core engineering sample thought it was a good idea to run geekbench on it and upload the results. As the engineering sample CPU is locked at 1.2 GHz, the actual benchmark numbers aren't particularly interesting, but the one interesting titbit we get is that AMD has increased the L2 cache to 1 MB per core, or twice as much as its predecessor.

What seems to be missing from this engineering sample is any kind of 3D V-Cache, as it only has a total of 128 MB L3 cache. Despite the gimped clock speed, the Genoa CPU is close to an EPYC 7513 in the single core tests and that CPU has a 2.6 GHz base clock and a 3.65 GHz boost clock, both system running Ubuntu 20.04 LTS. It manages to beat it in a couple of the sub-tests, such as Navigation, SQLite, HTML5, gaussian blur and face detection and it's within a few points in things like speech recognition and rigid body physics. This is quite impressive considering the Genoa engineering sample is operating at less than half the clock speed, or possibly even at a third of the clock speed of the EPYC 7513. AMD is said to be launching its Zen 4 based Genoa CPUs later this year and models with up to 96 core and 192 threads, with 12-channel DDR5 memory and PCIe 5.0 support are expected.

NVIDIA has today announced its Grace CPU Superchip, a monstrous design focused on heavy HPC and AI processing workloads. Previously, team green has teased an in-house developed CPU that is supposed to go into servers and create an entirely new segment for the company. Today, we got a more detailed look at the plan with the Grace CPU Superchip. The Superchip package represents a package of two Grace processors, each containing 72 cores. These cores are based on Arm v9 in structure set architecture iteration and two CPUs total for 144 cores in the Superchip module. These cores are surrounded by a now unknown amount of LPDDR5x with ECC memory, running at 1 TB/s total bandwidth.

NVIDIA Grace CPU Superchip uses the NVLink-C2C cache coherent interconnect, which delivers 900 GB/s bandwidth, seven times more than the PCIe 5.0 protocol. The company targets two-fold performance per Watt improvement over today's CPUs and wants to bring efficiency and performance together. We have some preliminary benchmark information provided by NVIDIA. In the SPECrate2017_int_base integer benchmark, the Grace CPU Superchip scores over 740 points, which is just the simulation for now. This means that the performance target is not finalized yet, teasing a higher number in the future. The company expects to ship the Grace CPU Superchip in the first half of 2023, with an already supported ecosystem of software, including NVIDIA RTX, HPC, NVIDIA AI, and NVIDIA Omniverse software stacks and platforms.

KIOXIA America, Inc., today announced that it is sampling its 2nd generation PCIe 5.0 SSD for enterprise and data center customers. After being the first vendor to offer a drive using the PCIe 5.0 interface, KIOXIA has now introduced the new CD8 Series data center NVMe SSD family. CD8 SSDs double the bandwidth per lane over PCIe 4.0 SSDs from 16 gigatransfers per second (GT/s) to 32GT/s and are optimized for hyperscale data center and enterprise server-attached workloads.

"Today, PCIe 4.0 SSDs are considered at the forefront in terms of delivering the highest levels of drive performance," commented Greg Wong, founder and principal analyst, Forward Insights. "Next generation PCIe 5.0 SSDs provide twice the level of performance, and will continue to propel the PCIe/NVMe SSD market - which is expected to grow at a CAGR of over 20% out to 2026."

FSP Group, the leading manufacturer of high-performance power supplies today, announces product compliance with INTEL PSDG ATX 3.0 and PCIe 5.0 for the ultimate performance enhancement.

The retail models of FSP's consumer-based power supply range are getting a major overhaul with the addition of INTEL Power design guide ATX 3.0 and PCIe 5.0 specification compliance, packing more power and stability that is tailor-made for high demand systems. Traditional power supplies need three 8-pin to 16-pin adapters to support the latest PCIe Gen 5.0 graphics cards. FSP looks to address this drawback with their latest iteration of PSUs, unlocking seamless integration with all the latest hardware in the market.

Teledyne LeCroy, the worldwide leader in serial data test solutions is pleased to announce that the Peripheral Component Interconnect Special Interest Group (PCI-SIG), responsible for the definition of serial expansion buses and related components required to drive fast, efficient transfers between processors and peripheral devices, has approved Teledyne LeCroy as a solution vendor for official PCI Express (PCIe ) 5.0 link and transaction layer compliance testing at the PCI-SIG compliance workshops.

Compliance testing allows design and test engineers to ensure product interoperability as well as adherence to the PCIe standard, enabling technology adoption among integrators. The Summit Z58 Protocol Exerciser/Analyzer which was previously approved for PCIe 3.0 and 4.0 compliance testing has now also been approved for official PCIe 5.0 compliance and certification testing, making it the only piece of test equipment currently certified for link and transaction layer testing of all three PCIe generations. Passing the PCI-SIG's compliance tests are also a necessary step for equipment to be included in the PCI-SIG's Integrators List.

As data processing requirements continue to evolve, cloud-scale infrastructure requires solutions that maximize bandwidth, minimize latency and are optimized for efficient resource utilization. Microchip Technology Inc. today announced the newest member of the Flashtec controller family, the NVMe 4016 SSD controller. As the industry's highest-performing PCIe Gen 5 NVMe SSD controller, the Flashtec NVMe 4016 controller addresses the market demand for high-reliability, high-performance Solid-State Drives (SSDs) delivering greater than 14 GB per second throughput and over 3 million IOPS. With advanced Credit Management technology, this next-generation controller offers the stringent Quality of Service (QoS) required by today's cloud-focused data center applications.

"Microchip is proud to announce the next generation of our Flashtec NVMe controller product line. Its market-leading performance, coupled with our proven and flexible architecture, means the NVMe 4016 can provide our cloud and OEM customers with a cutting-edge platform for their PCIe Gen 5 NVMe SSD solutions," said Pete Hazen, vice president of Microchip's data center solutions business unit.

During the International Solid-State Circuits Conference (ISSCC) 2022, Intel gave us a more significant look at its upcoming Ponte Vecchio HPC accelerator and how it operates. So far, Intel convinced us that the company created Ponte Vecchio out of 47 tiles glued together in one package. However, the ISSCC presentation shows that the accelerator is structured rather interestingly. There are 63 tiles in total, where 16 are reserved for compute, eight are used for RAMBO cache, two are Foveros base tiles, two represent Xe-Link tiles, eight are HBM2E tiles, and EMIB connection takes up 11 tiles. This totals for about 47 tiles. However, an additional 16 thermal tiles used in Ponte Vecchio regulate the massive TDP output of this accelerator.

What is interesting is that Intel gave away details of the RAMBO cache. This novel SRAM technology uses four banks of 3.75 MB groups total of 15 MB per tile. They are connected to the fabric at 1.3 TB/s connection per chip. In contrast, compute tiles are connected at 2.6 TB/s speeds to the chip fabric. With eight RAMBO cache tiles, we get an additional 120 MB SRAM present. The base tile is a 646 mm² die manufactured in Intel 7 semiconductor process and contains 17 layers. It includes a memory controller, the Fully Integrated Voltage Regulators (FIVR), power management, 16-lane PCIe 5.0 connection, and CXL interface. The entire area of Ponte Vecchio is rather impressive, as 47 active tiles take up 2,330 mm², whereas when we include thermal dies, the total area jumps to 3,100 mm². And, of course, the entire package is much larger at 4,844 mm², connected to the system with 4,468 pins.

The NUC Extreme might not share much in terms of design with either the original NUC or its earlier Extreme siblings these days, as it's grown into a rather hefty SFF system. Now the 12th gen NUC Extreme has leaked and it comes with a few unexpected surprises, in both a good and a bad sense. Initially it looks like there will be two main barebones SKU's, the NUC12EDBi9 and the NUC12EDBi7, with a 65 W Core i9-12900 and a Core i7-12700 CPU respectively. In other words, it appears we're not looking at any dedicated CPU SKU's this time around.

The first thing that sticks out in the spec is the fact that Intel has gone for a pair of DDR4 SO-DIMM slots, rather than DDR5. In all fairness, this could be due to a lack of DDR5 SO-DIMMs in the market, but feels odd in a product with Extreme in the product name. Memory speeds of up to 3200 MHz are supported and up to 64 GB can be fitted. On the storage side, there's support for no less than three PCIe 4.0 M.2 NVMe drives using the 2280 form factor. Two of the slots can also accept 2242 drives and SATA drives. A full PCIe 5.0 x16 slot is also present for an optional graphics card, but more on that a little bit later.

Although we've already seen some companies both tease and announce PCIe 5.0 consumer SSDs, it seems like we shouldn't expect mainstream PCIe 5.0 SSDs until 2024, at least if Silicon Motion's earnings call is anything to go by. Wallace Kou, Silicon Motion's CEO was quoted as saying ""It is likely that PCIe Gen4 will last a few years since Intel, AMD both continue to bring new upgrade variant of CPU with PCIe Gen4 to the market," continuing "Similarly, we are preparing for the launch of our third-generation PCIe Gen4 controller next year before transitioning to PCIe Gen5 in the following year."

This obviously has something to do not only with development time, but also with recuperating the costs of developing the previous generation of PCIe 4.0 SSD controllers before introducing new products that would have limited market share due to at least initially high prices. Silicon Motion is said to be working on multiple PCIe 5.0 SSD controllers with the enthusiast grade SM2508 expected towards the end of this year and it's set to compete with Phison's PS5026-E26 and InnoGrit's IG5666 controllers, plus unannounced inhouse controllers from the likes of Samsung and WD. Silicon Motion's mainstream PCIe 5.0 controller is said to be the SM2507, which is also said to be more suitable for mobile applications, most likely due to lower power consumption. However, the first PCIe 5.0 controller from Silicon Motion should be the SM8366 enterprise grade controller that was announced last year and which should be shipping in the second half of this year. For most users, PCIe 5.0 SSDs are unlikely to make a huge difference, unless we see some major improvements when it comes to random read and write performance, as this is currently the real bottleneck with SSDs.