SK hynix Inc. announced today that it has decided to invest about 9.4 trillion won in building the first fab and business facilities of the Yongin Semiconductor Cluster after the board resolution on the 26th. SK hynix designs to start construction of the 1st fab to be built in the Yongin cluster in March next year and complete it in May 2027, and have received an investment approval from the board of directors prior to it. The company will make every effort to build the fab to lay the foundation for the company's future growth and respond to the rapidly increasing demand for AI memory semiconductors.

The Yongin Cluster, which will be built on a 4.15 million square meter site in Wonsam-myeon, Yongin, Gyeonggi Province, is currently under site preparation and infrastructure construction. SK hynix has decided to build four state-of-the-art fabs that will produce next-generation semiconductors, and a semiconductor cooperation complex with more than 50 small local companies. After the construction of the 1st fab, the company aims to complete the remaining three fabs sequentially to grow the Yongin Cluster into a "Global AI semiconductor production base."

Femtosense, in partnership with ABOV Semiconductor, today launched the AI-ADAM-100, an artificial intelligence microcontroller unit (AI MCU) built on sparse AI technology to enable on-device AI features such as voice-based control in home appliances and other products. On-device AI provides immediate, no-latency user responses with low power consumption, security, operational stability, and low cost compared to GPUs or cloud-based AI.

The AI-ADAM-100 integrates the Femtosense Sparse Processing Unit 001 (SPU-001), a neural processing unit (NPU), and an ABOV Semiconductor MCU to provide deep learning-powered AI voice processing and voice-cleanup capabilities on-device at the edge. With language processing, appliances can implement "say what you mean" voice interfaces that allow users to speak naturally and express their intent freely in multiple ways. For example, "Turn the lights off", "Turn off the lights," and "Lights off" all convey the same intent and are understood as such.

Qualitas Semiconductor Co., Ltd. has developed a new PCIe 6.0 PHY IP, marking a significant advance in computer interconnect technology. This new product, created using advanced 5 nm process technology is designed to meet the high-speed data transfer needs of the AI era. The Qualitas' PCIe PHY IP using 5 nm FinFet CMOS technology consists of hardmacro PMA and PCS compliant to PCIe Base 6.0 specification.

The PCIe 6.0 PHY IP can achieve transmission speeds up to 64GT/s per lane. When using all 16 lanes, it can transfer data at rates up to 256 GB/s. These speeds make it well-suited for data centers and self-driving car technologies, where rapid data processing is essential. Qualitas achieved this performance by implementing 100G PAM4 signaling technology. Highlighting the importance of the new IP, Qualitas CEO Dr. Duho Kim signaled the company's intent to continue pushing boundaries in semiconductor technology.

OPENEDGES Technology, Inc the leading provider of memory subsystem IP, is pleased to announce that its subsidiary, The Six Semiconductor Inc (TSS), has successfully brought-up and validated its HBM3 testchip in 7 nm process technology. The IP validation testchip and the HBM3 PHY were brought up within the first month to 6.4 Gbps, and further tuning has resulted in successful operation of the HBM3 memory subsystem overclocked to 7.2 Gbps.

To date, there are only a handful of IP vendors that have taped out and demonstrated HBM3 memory subsystems, as test shuttle and HBM3 DRAM die stack sample availability are both highly limited. OPENEDGES is thrilled to be amongst one of the few companies to have demonstrated an HBM3 memory subsystem in silicon.

An Innovate UK project worth £1.1M has been awarded to the Lancaster University spinout firm Quinas, the global semiconductor company IQE and Lancaster and Cardiff Universities. Quinas will coordinate the ambitious project which is the first step towards volume production of the universal computer memory ULTRARAM invented by Lancaster Physics Professor Manus Hayne.

ULTRARAM has extraordinary properties, combining the non-volatility of a data storage memory, like flash, with the speed, energy-efficiency, and endurance of a working memory, like DRAM. Most of the funding for the one-year project will be spent at IQE which will scale up the manufacture of compound semiconductor layers from Lancaster University to an industrial process at the Cardiff based firm. This will involve IQE developing advanced capability for growth of the compound semiconductors gallium antimonide and aluminium antimonide for the first time. The project follows significant investment to boost the UK semiconductor industry and the establishment of the world's first compound semiconductor cluster in South Wales.

Applied Materials, Inc. today introduced materials engineering innovations designed to increase the performance-per-watt of computer systems by enabling copper wiring to scale to the 2 nm logic node and beyond. "The AI era needs more energy-efficient computing, and chip wiring and stacking are critical to performance and power consumption," said Dr. Prabu Raja, President of the Semiconductor Products Group at Applied Materials. "Applied's newest integrated materials solution enables the industry to scale low-resistance copper wiring to the emerging angstrom nodes, while our latest low-k dielectric material simultaneously reduces capacitance and strengthens chips to take 3D stacking to new heights."

Overcoming the Physics Challenges of Classic Moore's Law Scaling
Today's most advanced logic chips can contain tens of billions of transistors connected by more than 60 miles of microscopic copper wiring. Each layer of a chip's wiring begins with a thin film of dielectric material, which is etched to create channels that are filled with copper. Low-k dielectrics and copper have been the industry's workhorse wiring combination for decades, allowing chipmakers to deliver improvements in scaling, performance and power-efficiency with each generation.

Samsung Electronics, a world leader in advanced semiconductor technology, today announced that it will provide turnkey semiconductor solutions using the 2-nanometer (nm) foundry process and the advanced 2.5D packaging technology Interposer-Cube S (I-Cube S) to Preferred Networks, a leading Japanese AI company.

By leveraging Samsung's leading-edge foundry and advanced packaging products, Preferred Networks aims to develop powerful AI accelerators that meet the ever-growing demand for computing power driven by generative AI.

A research team from the South Korean Institute for Basic Science (IBS) has developed a new method for growing 1D metallic materials less than 1 nm wide. They applied this technique to create a new structure for 2D semiconductor logic circuits, using the 1D metals as gate electrodes in very small transistors. However, creating very small transistors that can control electron movement within a few nanometers has been challenging. The size of semiconductor devices depends on the width and efficiency of the gate electrode. Current manufacturing processes can't make gate lengths below a few nanometers due to limitations in lithography. To address this, the team used the mirror twin boundary (MTB) of molybdenum disulfide, which is a 1D metal only 0.4 nm wide, as a gate electrode. The IBS team achieved the 1D MTB metallic phase by altering the crystal structure of a 2D semiconductor at the atomic level.

The International Roadmap for Devices and Systems (IRDS) predicts semiconductor technology to reach about 0.5 nm by 2037, with transistor gate lengths of 12 nm. The research team's transistor demonstrated a channel width as small as 3.9 nm, surpassing this prediction. The 1D MTB-based transistor also offers advantages in circuit performance. Unlike some current technologies (FinFETs or GAA) that face issues with parasitic capacitance in highly integrated circuits, this new transistor can minimize such problems due to its simple structure and narrow gate width.

PanelSemi, a developer of ultra-thin flexible LED displays and semiconductor substrates, has partnered with NGK Insulators to create high-performance hybrid packaging solutions. Leveraging its tiled thin-film transistor (TFT) circuit fabrication technology, PanelSemi is developing a hybrid circuit board that combines fine wiring and functional circuits on polyimide film with a ceramic substrate. The company is expanding into high-performance circuit boards for semiconductor modules, targeting large-scale panel manufacturing for wireless communications and opto-electronic integration. The collaboration with NGK extends the application of ceramic substrates to higher power and thermal scenarios.

NGK aims to integrate PanelSemi's circuit fabrication technology with its own products, including the ultra-compact EnerCera lithium-ion rechargeable battery, ceramic substrates, and ceramic packages. PanelSemi's HyBrid Substrate (HBS) technology platform features ultra-fine line width and spacing achieved through Thin Film (TF) and Panel Level Packaging (PLP) processes. HBS enables high-density interconnection, functioning as both an interposer and package substrate in advanced packaging, with the top die directly bonded to the HBS.

To keep pace with unremitting growth in demand for chips, the global semiconductor manufacturing industry is expected to increase capacity by 6% in 2024 and post a 7% gain in 2025, reaching a record capacity high of 33.7 million wafers per month (wpm: 8-inch equivalent), SEMI announced today in its latest quarterly World Fab Forecast report.

Leading-edge capacity for 5 nm nodes and under is expected to grow 13% in 2024, chiefly driven by generative artificial intelligence (AI) for data center training, inference, and leading-edge devices. To increase processing power efficiency, chipmakers including Intel, Samsung, and TSMC are poised to start production of 2 nm Gate-All-Around (GAA) chips, boosting total leading-edge capacity growth by 17% in 2025.

On June 5th, Vanguard and NXP announced plans to jointly establish VisionPower Semiconductor Manufacturing Company (VSMC) in Singapore to build a 12-inch wafer plant. TrendForce posits that this move reflects the trend of global supply chains shifting "Out of China, Out of Taiwan"(OOC/OOT), with Taiwanese companies accelerating their overseas expansion to improve regional capacity flexibility and competitiveness.

TrendForce noted that the semiconductor supply chain has been diversifying over the past two years to mitigate geopolitical and pandemic-related risks, forming two major segments: China's domestic supply chain and a non-China supply chain. Recent US tariff increases have accelerated this shift, leading to increased orders from American customers.

Intel Corporation (Nasdaq: INTC) and Apollo (NYSE: APO) today announced a definitive agreement under which Apollo-managed funds and affiliates will lead an investment of $11 billion to acquire from Intel a 49% equity interest in a joint venture entity related to Intel's Fab 34. The transaction represents Intel's second Semiconductor Co-Investment Program (SCIP) arrangement. SCIP is an element of Intel's Smart Capital strategy, a funding approach designed to create financial flexibility to accelerate the company's strategy, including investing in its global manufacturing operations, while maintaining a strong balance sheet.

Located in Leixlip, Ireland, Fab 34 is Intel's leading-edge high-volume manufacturing (HVM) facility designed for wafers using the Intel 4 and Intel 3 process technologies. To date, Intel has invested $18.4 billion in Fab 34. This transaction allows Intel to unlock and redeploy to other parts of its business a portion of this investment while continuing the build-out of Fab 34. As part of its transformation strategy, Intel has committed billions of dollars of investments to regaining process leadership and building out leading-edge wafer fabrication and advanced packaging capacity globally.

Malaysia is firmly positioning itself as a hub for semiconductor investment, with Prime Minister Anwar Ibrahim stating the country aims to attract over $100 billion in investment into the industry. This aligns with recent trends in the region, such as China's announcement of a massive $47.5 billion investment fund or Micron's plans to build a new chip factory in Hiroshima, Japan by the end of 2027.

As a major player accounting for 13% of global chip testing and packaging, Malaysia has benefited from strong investments by Intel ($7 billion for an advanced packaging plant) and Infineon ($5.4 billion to expand its power chip plant). The country now hopes around 10 local companies will make substantial investments in new facilities focused on chip design and advanced packaging. To support this goal, the Malaysian government plans to allocate $5.3 billion in fiscal backing, along with tax breaks and subsidies. It is targeting these investments to generate revenues between $210 million and $1 billion for the semiconductor industry in Malaysia.

Toshiba Electronic Devices & Storage Corporation ("Toshiba") today held a ceremony to mark the completion of a new 300-millimeter wafer fabrication facility for power semiconductors and an office building at Kaga Toshiba Electronics Corporation in Ishikawa Prefecture, Japan, one of Toshiba's key group companies. The completion of construction is a major milestone for Phase 1 of Toshiba's multi-year investment program. Toshiba will now proceed with equipment installation, toward starting mass production in the second half of fiscal year 2024. Once Phase 1 reaches full-scale operation, Toshiba's production capacity for power semiconductors, mainly MOSFETs and IGBTs, will be 2.5 times that of fiscal 2021, when the investment plan was made. Decisions on the construction and start of operation of Phase 2 will reflect market trends.

The new manufacturing building follows and will make a major contribution to Toshiba's Business Continuity Plan (BCP): it has a seismic isolation structure that absorbs earthquake shock and redundant power sources. Energy from renewable source and solar panels on the roof of the building (onsite PPA model) will allow the facility to meet 100% of its power requirement with renewable energy.

NEO Semiconductor, a leading developer of innovative technologies for 3D NAND flash and DRAM memory, today announced a performance boosting Floating Body Cell Mechanism for 3D X-DRAM. Andy Hsu, Founder & CEO presented groundbreaking Technology CAD (TCAD) simulation results for NEO's 3D X-DRAM during the 16th IEEE International Memory Workshop (IMW) 2024 in Seoul, Republic of Korea.

Neo Semiconductor reveals a unique performance boosting mechanism called Back-gate Channel-depth Modulation (BCM) for Floating Body Cell that can increase data retention by 40,000X and sensing window by 20X.

AMD (NASDAQ:AMD) today announced revenue for the first quarter of 2024 of $5.5 billion, gross margin of 47%, operating income of $36 million, net income of $123 million and diluted earnings per share of $0.07. On a non-GAAP basis, gross margin was 52%, operating income was $1.1 billion, net income was $1.0 billion and diluted earnings per share was $0.62.

"We delivered strong first quarter results with our Data Center and Client segments each growing more than 80% year-over-year driven by the ramp of MI300 AI accelerator shipments and the adoption of our Ryzen and EPYC processors," said AMD Chair and CEO Dr. Lisa Su. "This is an incredibly exciting time for the industry as widespread deployment of AI is driving demand for significantly more compute across a broad range of markets. We are executing very well as we ramp our data center business and enable AI capabilities across our product portfolio."

According to the latest report from Bloomberg, the US government under Joe Biden's administration has announced plans to provide Taiwan Semiconductor Manufacturing Company (TSMC) with a substantial financial support package worth $11.6 billion. The package is composed of $6.6 billion in grants and up to $5 billion in loans. This represents the most significant financial assistance approved under the CHIPS and Science Act, a key initiative to resurrect the US chip industry. The funding will aid TSMC in establishing three cutting-edge semiconductor production facilities in Arizona, with the company's total investment in the state expected to exceed an impressive $65 billion. TSMC's multi-phase Arizona project will commence with the construction of a fab module near its existing Fab 21 facility. Production using 4 nm and 5 nm process nodes is slated to begin by early 2025. The second phase, scheduled for 2028, will focus on even more advanced 2 nm and 3 nm technologies.

TSMC has kept details about the third facility's production timeline and process node under wraps. The company's massive investment in Arizona is expected to profoundly impact the local economy, creating 6,000 high-tech manufacturing jobs and over 20,000 construction positions. Moreover, $50 million has been earmarked for training local workers, which aligns with President Joe Biden's goal of bolstering domestic manufacturing and technological independence. However, TSMC's Arizona projects have encountered obstacles, including labor disputes and uncertainties regarding government support, resulting in delays for the second facility's production timeline. Additionally, reports suggest that at least one TSMC supplier has abandoned plans to set up operations in Arizona due to workforce-related challenges.

On March 29th, the United States announced another round of updates to its export controls, targeting advanced computing, supercomputers, semiconductor end-uses, and semiconductor manufacturing products. These new regulations, which took effect on April 4th, are designed to prevent certain countries and businesses from circumventing U.S. restrictions to access sensitive chip technologies and equipment. Despite these tighter controls, TrendForce believes the practical impact on the industry will be minimal.

The latest updates aim to refine the language and parameters of previous regulations, tightening the criteria for exports to Macau and D:5 countries (China, North Korea, Russia, Iran, etc.). They require a detailed examination of all technology products' Total Processing Performance (TPP) and Performance Density (PD). If a product exceeds certain computing power thresholds, it must undergo a case-by-case review. Nevertheless, a new provision, Advanced Computing Authorized (ACA), allows for specific exports and re-exports among selected countries, including the transshipment of particular products between Macau and D:5 countries.

SK hynix Inc., the world's leading producer of High-Bandwidth Memory (HBM) chips, announced today that it will invest an estimated $3.87 billion in West Lafayette, Indiana to build an advanced packaging fabrication and R&D facility for AI products. The project, the first of its kind in the United States, is expected to drive innovation in the nation's AI supply chain, while bringing more than a thousand new jobs to the region.

The company held an investment agreement ceremony with officials from Indiana State, Purdue University, and the U.S. government at Purdue University in West Lafayette on the 3rd and officially announced the plan. At the event, officials from each party including Governor of Indiana Eric Holcomb, Senator Todd Young, Director of the White House Office of Science and Technology Policy Arati Prabhakar, Assistant Secretary of Commerce Arun Venkataraman, Secretary of Commerce State of Indiana David Rosenberg, Purdue University President Mung Chiang, Chairman of Purdue Research Foundation Mitch Daniels, Mayor of city of West Lafayette Erin Easter, Ambassador of the Republic of Korea to the United States Hyundong Cho, Consul General of the Republic of Korea in Chicago Junghan Kim, SK vice chairman Jeong Joon Yu, SK hynix CEO Kwak Noh-Jung and SK hynix Head of Package & Test Choi Woojin, participated.

At 07:58 local time, Taiwan was rocked by a magnitude 7.4 earthquake on the east coast which was felt nationwide and as far as to the southeastern parts of China and southern Japan. It caused some major damage in the east coast city of Hualien where the epicentre of the quake was located, as well as surrounding areas. The earthquake reportedly left nine people dead and over 900 people injured islandwide. TSMC, UMC, PSMC and Innolux all halted some of their production lines in the Hsinchu Science Park on the west coast of the island, although this is said to have been as a preventive step, rather than caused by actual damage from the earthquake.

All the above-mentioned companies also evacuated their staff from their factories due to the intensity of the quake, as it reached a magnitude of around four or five almost island wide. The semiconductor manufacturers are all inspecting their fabs now to make sure none of the equipment was damaged by the earthquake. Innolux also has a factory in the southern city of Kaohsiung and has reported that it has suspended production in Hsinchu, but that production in Kaohsiung wasn't affected. Local media in Taiwan hasn't made any mention of the likes of Micron or other chip manufacturers, but it's likely that the situation is similar, since all of these companies are located in the same areas on the island. Aftershocks have continued throughout the day and there's a risk for further big earthquakes to follow in the coming days.Images courtesy of the Taiwan Central Weather Administration (CWA).

Update 15:11 UTC: Updated with an official statement from Micron below.

"The Earth is Blue," said Yuri Gagarin, the first human to journey into space. With two-thirds of its surface covered in water, Earth is a planet that exuberates its blue radiance in the dark space. However, today, the scarcity of water is a challenge that planet Earth is confronted with. For some, this may be hard to understand. What happened to our blue planet Earth? To put in numbers, more than 97% of the water on Earth consists of seawater, with another 2% locked in ice caps. That only leaves a mere 1% of water available for our daily use. The problem lies in the fact that this 1% of water is gradually becoming scarcer due to reasons such as climate change, environmental pollution, and population growth, leading to increased water stress. 'Water stress' is quantified by the proportion of water demand to the available water resources on an annual basis, indicating the severity of water scarcity as the stress index rises. Higher stress indexes signify experiencing severe water scarcity.

The semiconductor ecosystem, unsustainable without water
Because water stress issues transcend national boundaries, various stakeholders including international organizations and governments work to negotiate water resource management strategies and promote collaboration. UN designates March 22nd as an annual "World Water Day" to raise awareness about the severity of water scarcity running various campaigns. Now, it's imperative for companies to also take responsibility for the water resources given and pursue sustainable management.

Earlier today, Dutch Prime Minister Mark Rutte met with China's President Xi Jinping—fresh reportage has focused on their discussion of technological trade restrictions. Holland's premier had to carefully navigate the conversation around recent global tensions, most notably the prevention of fancy ASML chipmaking equipment reaching the Chinese mainland. CCTV (China's state broadcaster) selected a couple of choice quotes for inclusion in an online report—Xi remarked that: "the Chinese people also have the right to legitimate development, and no force can stop the pace of China's scientific and technological development and progress." Specific manufacturers and types of machinery were not mentioned during the meeting between state leaders, but media interpretations point to recent ASML debacles being entirely relevant, given the context of international relationships.

ASML is keen to keep Chinese firms on its order books—according to AP News: "China became ASML's second-largest market, accounting for 29% of its revenue as firms bought up equipment before the licensing requirement took effect." Revised licensing agreements have stymied the supply of ASML most advanced chipmaking tools—Chinese foundries have resorted to upgrading existing/older equipment (backed by government funding) in efforts to stay competitive with international producers. Semiconductor Manufacturing International Corporation (SMIC) is reportedly racing to get natively designed EUV machines patented (in co-operation with Huawei). Post-meeting, Rutte commented (to press) on the ongoing technology restrictions: "what I can tell you is that... when we have to take measures, that they are never aimed at one country specifically, that we always try to make sure that the impact is limited, is not impacting the supply chain, and therefore is not impacting the overall economic relationship."

According to Bloomberg's latest investigation, Huawei and Semiconductor Manufacturing International Corporation (SMIC) have submitted patents on the self-aligned quadruple patterning (SAQP) pattern etching technique to enable SMIC to achieve 5 nm semiconductor production. The two Chinese giants have been working with the Deep Ultra Violet (DUV) machinery to develop a pattern etching technique allowing SMIC to produce a node compliant with the US exporting rules while maintaining the density improvements from the previously announced 7 nm node. In the 7 nm process, SMIC most likely used self-aligned dual patterning (SADP) with DUV tools, but for the increased density of the 5 nm node, a doubling to SAQP is required. In semiconductor manufacturing, lithography tools take multiple turns to etch the design of the silicon wafer.

Especially with smaller nodes getting ever-increasing density requirements, it is becoming challenging to etch sub-10 nm designs using DUV tools. That is where Extreme Ultra Violet (EUV) tools from ASML come into play. With EUV, the wavelengths of the lithography printers are 14 times smaller than DUV, at only 13.5 nm, compared to 193 nm of ArF immersion DUV systems. This means that without EUV, SMIC has to look into alternatives like SAQP to increase the density of its nodes and, as a result, include more complications and possibly lower yields. As an example, Intel tried to use SAQP in its first 10 nm nodes to reduce reliance on EUV, which resulted in a series of delays and complications, eventually pushing Intel into EUV. While Huawei and SMIC may develop a more efficient solution for SAQP, the use of EUV is imminent as the regular DUV can not keep up with the increasing density of semiconductor nodes. Given that ASML can't ship its EUV machinery to China, Huawei is supposedly developing its own EUV machines, but will likely take a few more years to show.

Yesterday, AMD announced that its cutting-edge adaptive computing technology was selected by Sony Semiconductor Solutions (SSS) for its newest automotive LiDAR reference design. SSS, a global leader in image sensor technology, and AMD joined forces to deliver a powerful and efficient LiDAR solution for use in autonomous vehicles. Using adaptive computing technology from AMD significantly extends the SSS LiDAR system capabilities, offering extraordinary accuracy, fast data processing, and high reliability for next-generation autonomous driving solutions.

In the rapidly evolving landscape of autonomous driving, the demand for precise and reliable sensor technology has never been greater. LiDAR (Light Detection and Ranging) technology plays a pivotal role in enabling depth perception and environmental mapping for various industries. LiDAR delivers image classification, segmentation, and object detection data that is essential for 3D vision perception enhanced by AI, which cannot be provided by cameras alone, especially in low-light or inclement weather. The dedicated LiDAR reference design addresses the complexities of autonomous vehicle development with a standardized platform to enhance safety in navigating diverse driving scenarios.

According to the latest report by Reuters, the US government is preparing to announce a multi-billion dollar grant for Intel's chip manufacturing operations in Arizona next week, possibly worth more than $10 billion. US President Joe Biden and Commerce Secretary Gina Raimondo will make the announcement, which is part of the 2022 CHIPS and Science Act aimed at expanding US chip production and reducing dependence on China and Taiwan manufacturing. The exact amount of the grant has yet to be confirmed, but rumors suggest it could exceed $10 billion, making it the most significant award yet under the CHIPS Act. The funding will include grants and loans to bolster Intel's competitive position and support the company's US semiconductor manufacturing expansion plans. This comes as a surprise just a day after the Pentagon reportedly refused to invest $2.5 billion in Intel as a part of a secret defense grant.

Intel has been investing significantly in its US expansion, recently opening a $3.5 billion advanced packaging facility in New Mexico, supposed to create extravagant packaging technology like Foveros and EMIB. The chipmaker is also expanding its semiconductor manufacturing capacity in Arizona, with plans to build new fabs in the state. Arizona is quickly becoming a significant hub for semiconductor manufacturing in the United States. In addition to Intel's expansion, Taiwan Semiconductor Manufacturing Company (TSMC) is also building new fabs in the state, attracting supply partners to the region. CHIPS Act has a total funding capacity of $39 billion allocated for semiconductor production and $11 billion for research and development. The Intel grant will likely cover the production part, as Team Blue has been reshaping its business units with the Intel Product and Intel Foundry segments.