Intel Xeon Platinum "Emerald Rapids" 8558P and 8551C 48-Core CPU SKUs Leak
The Geekbench database of benchmark submissions is yielding more leaks about Intel's upcoming 5th generation Xeon Scalable processors codenamed Emerald Rapids. Previously, we have covered the leak of the possibly top-end 64-core Xeon 8592+ Platinum and a 48-core Xeon 8558U processor. However, today, we are seeing information about lower-stack SKUs carrying up to 48 cores each. The first in line is the Xeon Platinum 8558P, a 48-core, 96-threaded CPU that runs at 2.7 GHz base frequency and 4.0 GHz boost frequency. It is equipped with 16 MB of L3 cache in addition to 192 MB of L2, making the total cache memory 260 MB. The integrated memory controller (IMC) of the Xeon Platinum 8558P supports eight-channel DDR5 running at 4800 MT/s, and the CPU has a TDP of 350 Watts.
The other SKU that was also listed was the Xeon Platinum 8551C, also a 48-core, 96-thread model with the same 260 MB cache configuration. However, this SKU has a higher base frequency of 2.9 GHz, with an unknown boost speed and unknown IMC configuration. An interesting thing to note about these 48C/96T SKUs is that they feature less cache compared to the previously leaked 48-core Xeon 8558U processor, which had 96 MB of L2 cache and 260 MB of L3 cache, making for a total of 356 MB of cache (which includes L1D and L1I as well). The segmentation that Intel is doing for its Xeon processors will be based not only on core count, frequency, and TDP but also on CPU cache sizes.
The other SKU that was also listed was the Xeon Platinum 8551C, also a 48-core, 96-thread model with the same 260 MB cache configuration. However, this SKU has a higher base frequency of 2.9 GHz, with an unknown boost speed and unknown IMC configuration. An interesting thing to note about these 48C/96T SKUs is that they feature less cache compared to the previously leaked 48-core Xeon 8558U processor, which had 96 MB of L2 cache and 260 MB of L3 cache, making for a total of 356 MB of cache (which includes L1D and L1I as well). The segmentation that Intel is doing for its Xeon processors will be based not only on core count, frequency, and TDP but also on CPU cache sizes.