# Intel Aims at 10 nm Processors by 2018



## btarunr (Jul 27, 2011)

It's not just host nations of the Olympics that are decided almost decades in advance, but also Intel's silicon names and the fab process they're going to be built on. Intel has its plan for the greater part of this decade already charted out, well beyond the upcoming Ivy Bridge architecture. Intel follows the "tick-tock" product cycle, where every micro-architecture gets to be built on two succeeding fab processes, and every fab process getting to have two succeeding micro-architectures built on it, in succession. Westmere is an optical shrink of the Nehalem architecture, it was a "tick" for the 32 nm process, Sandy Bridge is its "tock", and a new architecture. Ivy Bridge is essentially an optical shrink of Sandy Bridge, it is the "tick" for 22 nm process. 

Ivy Bridge will make its entry through the LGA1155 platform in 2012, it will make up the 2012 Core processor family. Haswell is the next-generation architecture that succeeds Sandy Bridge and IvyBridge, it will be built on the 22 nm process, and is expected to arrive in 2013. Roswell is its optical shrink to 14 nm, slated for 2014. Looking deep into the decade, there's Skylake architecture, that will span across 14 nm and 10 nm processes with Skymont. This model ensures that Intel has to upgrade its fabs every 2 or so years, an entirely new micro-architecture every 2 or so years as well, while providing optical shrinks every alternating year. Optical shrinks introduce new features, increased caches, and allow higher clock speeds. 10 nm for processors by 2018 sounds realistic looking at the advancement of NAND flash technologies that are pushing the boundaries of fab process development. NAND flash is much less complex than processor development, and hence serve as good precursors to a new process. 





*View at TechPowerUp Main Site*


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## laszlo (Jul 27, 2011)

and what after 10nm? 

10nm will be a challenge to made as they all(not only intel) already have problems with 22nm....


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## btarunr (Jul 27, 2011)

They said sub-10 μm was going to be a problem. It turned out pretty well so far.


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## entropy13 (Jul 27, 2011)

It would be even better if they look at other materials as well.


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## hardcore_gamer (Jul 27, 2011)

remember these things intel

hot electron effect
impact ionization
velocity saturation
drain induced barrier lowering
surface scattering
punchthrough
sub-threshold conduction


skylake-->skymont-->skynet


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## Drone (Jul 27, 2011)

Quantum tunnelling, where are yo


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## Jonap_1st (Jul 27, 2011)

hardcore_gamer said:


> remember these things intel
> 
> hot electron effect
> impact ionization
> ...



the judgement day will be closer than i thought..


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## twilyth (Jul 27, 2011)

btarunr said:


> They said sub-10 μm was going to be a problem. It turned out pretty well so far.


10 microns?  As in 10,000nm?  How long ago was that?


hardcore_gamer said:


> remember these things intel
> 
> hot electron effect
> impact ionization
> ...


I didn't understand any of that until "skynet", but at 10nm isn't easier to quote the trace width in atoms?  I mean seriously.  How do you make predictions like that with a straight face?  Unless your margin for error is plus or minus 20 years.


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## assaulter_99 (Jul 27, 2011)

Now I wonder where and when they will hit a wall.


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## Trackr (Jul 27, 2011)

The image shows Sandy Bridge as being a Q4 2011 release.

It was actually a Q1 2011 release.

Does that mean that the whole graph is ahead three quarters?


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## ensabrenoir (Jul 27, 2011)

That timeline makes me think they already have this technology and they're just trying to figure out how to mass produce it cheaply/ cost effectively and yes intel= skynet.  Tthe first attack will be on amd users world wide


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## Benetanegia (Jul 27, 2011)

Trackr said:


> The image shows Sandy Bridge as being a Q4 2011 release.
> 
> It was actually a Q1 2011 release.
> 
> Does that mean that the whole graph is ahead three quarters?



Maybe/probably those are fiscal years, so it's not 3 quarters ahead, but 1 quarter behind (or just on time if they mean production instead of launch).


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## Bjorn_Of_Iceland (Jul 27, 2011)

cant wait for 1nm lol


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## twilyth (Jul 27, 2011)

Bjorn_Of_Iceland said:


> cant wait for 1nm lol



2025.  Obviously.  At least based on their current timescale.  All the universe bends to the will of Intel.


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## Riotpump (Jul 27, 2011)

twilyth said:


> 2025.  Obviously.  At least based on their current timescale.  All the universe bends to the will of Intel.



I welcome our new Skynet Intel based overlords...


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## Mussels (Jul 27, 2011)

there was other threads about graphene being used in future CPU's since its thinner/smaller, and conducts electricity faster. that could well be a solution on how to best the 10nm barrier, once they get the tech ironed out fully.


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## MikeMurphy (Jul 27, 2011)

Can't get much smaller than these molecules.  10nm is actually pretty close.


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## btarunr (Jul 27, 2011)

twilyth said:


> 10 microns?  As in 10,000nm?  How long ago was that?



My bad, 0.1 μm, or 100 nm.


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## TheMailMan78 (Jul 27, 2011)

10nm? I mean really? Thats pretty amazing if they can get em that small. If AMD's APU is successful by then I bet this road map changes dramatically. I mean if tablets and smartphones keep on this momentum they will HAVE to jump on the APU bandwagon more aggressively.


Also I wonder if it will run Crysis......Sorry I know thats 7 years early but we here on TPU are always cutting edge.



Mussels said:


> there was other threads about graphene being used in future CPU's since its thinner/smaller, and conducts electricity faster. that could well be a solution on how to best the 10nm barrier, once they get the tech ironed out fully.



They got 7 years. Thats a several lifetimes in the tech world.


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## Benetanegia (Jul 27, 2011)

MikeMurphy said:


> Can't get much smaller than these molecules. 10nm is actually pretty close.



They are close because they compare it in an order of magnitude basis I believe. Isn't Monocristaline Silicone's lattice spacing 0.5 nm? I don't really know about how semiconductors work at that level, but I would say that 10 cells (5nm?) should suffice, maybe even less. Also there's a bunch of atoms on every cristal cell so much smaller process (than 10nm) should be attainable from the POV of "molecule" size. Bear in mind I make this statement from my complete ignorance on the subject. I know basic electronics where the whole thing is abstract (holes) and physics where a single electron moves from one atom to another, I lack any knowledge of what really happens in the middle.

Graphene does have a much smaller lattice spacing iirc and I've seen claims of 2 layers of graphene being able to create a Cassimir Effect, so what about some science fiction and dreaming of autopowered chips (zero point energy)??!!


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## hardcore_gamer (Jul 27, 2011)

Drone said:


> Quantum tunnelling, where are yo



Hot electron effect is due to tunnelling


Using new materials like graphene may provide scaling beyond the capabilities of silicon, but still dynamic power consumption will be a problem.Adiabatic logic is a solution


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## twilyth (Jul 27, 2011)

hardcore_gamer said:


> Hot electron effect is due to tunnelling
> 
> 
> Using new materials like graphene may provide scaling beyond the capabilities of silicon, but still dynamic power consumption will be a problem.Adiabatic logic is a solution



How is adiabatic logic going to either prevent random tunneling events or compensate for them.  I would be extremely interested in that.


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## Steevo (Jul 27, 2011)

I'm not worried about the CPU's, I'm worried about the layers and traces on the PCB for the RAM, and in the motherboard.


Even if the traces in the CPU are 1nm they can make the insulator around and beside it 20nm if they need to, it just creates more heat as the electrical path is longer, and more latency from the same issue. However their 3D transistor should help with trace length, and thus electrical needs, and a shorter path also reduces the capacitive roll off charge. All that adds up to lower electrical needs, faster processing physically in the chip, and lower TDP. 


The graphics card makers have already fought with memory management, I see this as being a plus for AMD, their dedicated cards have already taught them about the best way to perform on die termination, signaling, voltages, and path length. Intel had a bit of a issue with that on some chips, the termination voltage was burning out processors. They have probably already started work on the same issue as they make smaller and smaller traces on the CPU.


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## twilyth (Jul 27, 2011)

The problem is that at a certain point you run into quantum effects that simply can't be controlled with traditional lithographic methods.  Quantum tunneling for example - where an electron is supposed to be on one side of a dielectric but magically appears on the other.  Tunneling is a probability function that varies with distance.  When you start hitting distances that permit the effect, you're screwed and there's nothing you can do about it.  I just don't happen to know at what level that starts to become a problem - or rather, an unmanageable problem


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## TheMailMan78 (Jul 27, 2011)

I doubt they will be using any "tunneling" within 7 years on a consumer product.


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## twilyth (Jul 27, 2011)

I don't know that they'll ever "use it" so to speak, but that doesn't mean it won't be an issue.  We may not be able to use lightning, but it can still be a serious pain in the ass.


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## TheMailMan78 (Jul 27, 2011)

twilyth said:


> I don't know that they'll ever "use it" so to speak, but that doesn't mean it won't be an issue.  We may not be able to use lightning, but it can still be a serious pain in the ass.



Possibly. But how do we avoid it now? Insulation no? So by the time we hit 10nm I am willing to bet the architecture will have changed so much it wont be an issue. 10nm is tiny I know but not small enough IMO where tunneling will be an issue. IMO....unless they over saturate the chip with electrons it will be fine I think.

But then again I am no engineer. I'm just an artist with a half degree in aerospace engineering.


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## hardcore_gamer (Jul 27, 2011)

twilyth said:


> How is adiabatic logic going to either prevent random tunneling events or compensate for them.  I would be extremely interested in that.



My second paragraph has nothing to do with the first one.FYI tunnelling depends on the material and the electric field across it (voltage/width of the material) and no logic can prevent that. But even if we prevent all the short-channel effects and static power consumption by using new materials, dynamic power consumption is going to be a big problem when integrating 10s of billions of switching elements in a chip.Adiabatic logic is just a solution to reduce dynamic power consumption and it is still in early stages of development.


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## TheMailMan78 (Jul 27, 2011)

hardcore_gamer said:


> My second paragraph has nothing to do with the first one.FYI tunnelling depends on the material and the electric field across it (voltage/width of the material) and no logic can prevent that. But even if we prevent all the short-channel effects and static power consumption by using new materials, dynamic power consumption is going to be a big problem when integrating 10s of billions of switching elements in a chip.Adiabatic logic is just a solution to reduce dynamic power consumption and it is still in early stages of development.



Basically we change the current material from drywall to uranium and it should be fine......in layman's terms 

I think that combined with the layout of the chip itself should be enough to keep it from becoming an issue.


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## hardcore_gamer (Jul 27, 2011)

TheMailMan78 said:


> Possibly. But how do we avoid it now? Insulation no? So by the time we hit 10nm I am willing to bet the architecture will have changed so much it wont be an issue. 10nm is tiny I know but not small enough IMO where tunneling will be an issue. IMO....unless they over saturate the chip with electrons it will be fine I think.
> 
> But then again I am no engineer. I'm just an artist with a half degree in aerospace engineering.




Tunelling isn't the only problem. There are several other "short channel effects"


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## TheMailMan78 (Jul 27, 2011)

hardcore_gamer said:


> Tunelling isn't the only problem. There are several other "short channel effects"



Lower voltage should reduce that issue also I would think. ALSO keep it more constant to keep it from drifting. Granted its still going to be a problem. I am looking forward to see what if any new material they use. We should know the direction they are heading in a year or so.


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## hardcore_gamer (Jul 27, 2011)

I think the CMOS scaling will hit a wall at 6-4nm. If new materials/devices fails to improve the scaling beyond that, next step is to increase the performance / transistor by means of efficient architectures and IP cores. Re-configurable computing also looks promising.


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## TheMailMan78 (Jul 27, 2011)

hardcore_gamer said:


> I think the CMOS scaling will hit a wall at 6-4nm. If new materials/devices fails to improve the scaling beyond that, next step is to increase the performance / transistor by *means of efficient architectures* and IP cores. Re-configurable computing also looks promising.



Hey I already said that!.....just not as cool. 



TheMailMan78 said:


> So by the time we hit 10nm *I am willing to bet the architecture will have changed so much it wont be an issue.*




Note to self......use more fancy words.


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## twilyth (Jul 27, 2011)

TheMailMan78 said:


> Possibly. But how do we avoid it now? Insulation no? So by the time we hit 10nm I am willing to bet the architecture will have changed so much it wont be an issue. 10nm is tiny I know but not small enough IMO where tunneling will be an issue. IMO....unless they over saturate the chip with electrons it will be fine I think.
> 
> But then again I am no engineer. I'm just an artist with a half degree in aerospace engineering.





TheMailMan78 said:


> Lower voltage should reduce that issue also I would think. ALSO keep it more constant to keep it from drifting. Granted its still going to be a problem. I am looking forward to see what if any new material they use. We should know the direction they are heading in a year or so.


Materials are irrelevant when dealing with certain quantum effects like tunneling.  At least I think that's true since it happens as a consequence of the electrons wave/probability function and I don't think that this function is influenced by other materials in the vicinity.  In fact, it is used in microscopy precisely because it's not influenced.

I'm more shaky on these points but I think you also get strange inductance and capacitance effects, but don't ask me to nail those down.  

I think there are also issues of structural stability, migration of ions, etc, etc - at least using any kind of doped silicon.  As hardcore pointed out, it's a long damn list.


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## TheMailMan78 (Jul 27, 2011)

twilyth said:


> Materials are irrelevant when dealing with certain quantum effects like tunneling.  At least I think that's true since it happens as a consequence of the electrons wave/probability function and I don't think that this function is influenced by other materials in the vicinity.  In fact, it is used in microscopy precisely because it's not influenced.
> 
> I'm more shaky on these points but I think you also get strange inductance and capacitance effects, but don't ask me to nail those down.
> 
> I think there are also issues of structural stability, migration of ions, etc, etc - at least using any kind of doped silicon.  As hardcore pointed out, it's a long damn list.



I'm not sure how material COULDN'T play a role in tunneling as some materials are more conductive then others. If you use a better insulator (material) tunneling becomes less of an issue if at all from my understanding.


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## twilyth (Jul 27, 2011)

TheMailMan78 said:


> I'm not sure how material COULDN'T play a role in tunneling as some materials are more conductive then others. If you use a better insulator (material) tunneling becomes less of an issue if at all from my understanding.



Because tunneling means that the electron actually disappears from location A (where you want it to be) and reappears at location B (where it couldn't possibly be).

wiki


> Quantum tunnelling refers to the quantum mechanical phenomenon where a particle tunnels through a barrier that it classically could not surmount. This plays an essential role in several physical phenomena, such as shining stars,[1] and has important applications to modern devices such as the tunnel diode.[2] The effect was predicted in the early 20th century, and its acceptance as a general, physical phenomenon came mid-century.[3]
> 
> As a consequence of the wave-particle duality of matter, tunnelling is often explained using the Heisenberg uncertainty principle. Purely quantum mechanical concepts are central to the phenomenon, so quantum tunnelling is one of the defining features of quantum mechanics and the particle-wave duality of matter.


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## TheMailMan78 (Jul 27, 2011)

twilyth said:


> Because tunneling means that the electron actually disappears from location A (where you want it to be) and reappears at location B (where it couldn't possibly be).
> 
> wiki



But it doesn't "disappear". Its does one of two things in theory.

1. Fragments (which is what I believe)
2. Splits (which my professor believed)

But at no time does it disappear and reappear like magic.







On a side note I want to welcome Hardcore to the forums. Its nice to see someone new with brains.


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## twilyth (Jul 27, 2011)

TheMailMan78 said:


> But it doesn't "disappear". Its does one of two things in theory.
> 
> 1. Fragments (which is what I believe)
> 2. Splits (which my professor believed)
> ...



fundamental particles cannot split or fragment and an electron is a fundamental particle.  However if by split you mean simultaneously travel mulitple, distinct paths simultaneously, then yes, that's perfectly kosher, but not relevant to tunneling.

According to the wave function of a particle, it simultaneously exists in many energy states at many different locations.  In some cases, if you have the right conditions, you can increase the probability that the particle will manifest in a location consistent with it's wave function but which should be precluded by classical mechanics.

That's the best I can do for you.  This isn't an area encompassed by either of my graduate degrees so I'm kinda winging it.


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## TheMailMan78 (Jul 27, 2011)

twilyth said:


> fundamental particles cannot split or fragment and an electron is a fundamental particle.  However if by split you mean simultaneously travel mulitple, distinct paths simultaneously, then yes, that's perfectly kosher, but not relevant to tunneling.
> 
> According to the wave function of a particle, it simultaneously exists in many energy states at many different locations.  In some cases, if you have the right conditions, you can increase the probability that the particle will manifest in a location consistent with it's wave function but which should be precluded by classical mechanics.
> 
> That's the best I can do for you.  This isn't an area encompassed by either of my graduate degrees so I'm kinda winging it.



You can split an election into holons and spinons. Its been done (man made) which leads a lot to believe its done naturally (ie. tunneling).


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## twilyth (Jul 27, 2011)

TheMailMan78 said:


> You can split an election into holons and spinons. Its been done (man made) which leads a lot to believe its done naturally (ie. tunneling).



You knew I'd google that and get knocked upside the head with journal articles - didn't you?  Don't even bother lying about it.

Bastard.


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## TheMailMan78 (Jul 27, 2011)

twilyth said:


> You knew I'd google that and get knocked upside the head with journal articles - didn't you?  Don't even bother lying about it.
> 
> Bastard.



I talk a lot of crap but I'm not a COMPLETE idiot. 

Like I said I have some training in Aerospace engineering (few years of college). I wanted to be an avionics expert like my father at one time. Then I realized I hated math and loved drugs. Became an artist and forgot what planet I'm on half the time.


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## bear jesus (Jul 27, 2011)

If Intel's aiming for 2018 for 10nm i wonder what they are aiming for in 2020 and later? surly Intel, IBM, globalfoundries, TSMC etc are all looking in to what to use next?



TheMailMan78 said:


> I talk a lot of crap but I'm not a COMPLETE idiot.
> 
> Like I said I have some training in Aerospace engineering (few years of college). I wanted to be an avionics expert like my father at one time. Then I realized I hated math and loved drugs. Became an artist and forgot what planet I'm on half the time.



 it all makes sense now


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## Thatguy (Jul 27, 2011)

TheMailMan78 said:


> But it doesn't "disappear". Its does one of two things in theory.
> 
> 1. Fragments (which is what I believe)
> 2. Splits (which my professor believed)
> ...





  or we just have no idea whats going on down at that level and what we assume is a solid electron is actually a collection of smaller particles that make a charge and when materials get small enough the particles can pass through other particle. Kind of how a bullet can't penetrate a kevlar vest but a arrow can.


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## TheMailMan78 (Jul 27, 2011)

Thatguy said:


> or we just have no idea whats going on down at that level and what we assume is a solid electron is actually a collection of smaller particles that make a charge and when materials get small enough the particles can pass through other particle. Kind of how a bullet can't penetrate a kevlar vest but a arrow can.



That has to do with matter density which is somewhat a different debate. As for the electron being made up of "smaller particles" isn't really supported by current theories as the election is a building block of matter unless you feel holons and spinons are smaller (less volume). But that wouldn't explain the original mass of the electron when split. They are just less energized but the mass is consistent which why I believe in the fragmentation of the electron. Not the split.


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## yogurt_21 (Jul 27, 2011)

Trackr said:


> The image shows Sandy Bridge as being a Q4 2011 release.
> 
> It was actually a Q1 2011 release.
> 
> Does that mean that the whole graph is ahead three quarters?



actually it was a q2 2011 release

http://en.wikipedia.org/wiki/List_of_Intel_Xeon_microprocessors#.22Sandy_Bridge.22_.2832_nm.29

most were released april 3rd, 2011 the same time the 10 core westmere's were released. 

remember this is a server roadmap and not a deskop roadmap.

at any rate I seriously doubt the roadmap is for fiscal year, they are more than likely referencing the higher end sany bridge cpu's when they speak of late q4 2011. After all doesn't that mirror lga2011's release?


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## wolf (Jul 27, 2011)

bring on Ivy brige! I like to keep my eyes on the close future as a consumer, otherwise I'd never upgrade drooling voer what will be in 5+ years time...

22nm from 32nm should enable considerably higher clockspeeds IMO, would be nice to see some 6 core CPU's make it to 1155 too. also it would be a hec of a blessing if 1155 Ivy brige chips work on curent P/H67 and Z68 mobo's.



TheMailMan78 said:


> Like I said I have some training in Aerospace engineering (few years of college). I wanted to be an avionics expert like my father at one time. Then I realized I hated math and loved drugs. Became an artist and forgot what planet I'm on half the time.



explains a hec of a lot


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## hardcore_gamer (Jul 27, 2011)

When explaining the tunelling, it is better to treat the electron as a wave and use schrodinger's wave equation. Splitting it into smaller particles complicates the solution.
Uncertainty principle gives a simple explanation. For a narrow barrier and high electric field across it, probability of finding the electron on the other side of the barrier takes a finite non-zero value.


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## TheMailMan78 (Jul 27, 2011)

hardcore_gamer said:


> When explaining the tunelling, it is better to treat the electron as a wave and use schrodinger's wave equation. Splitting it into smaller particles complicates the solution.
> Uncertainty principle gives a simple explanation. For a narrow barrier and high electric field across it, probability of finding the electron on the other side of the barrier takes a finite non-zero value.



True. But like most debates this got derailed into the finer details. As for complicating the subject keep in mind a lot of people have no clue what you or I are talking about. With that being said we might as well explore the smaller details.

Does considering splitting complicate things? Yeah but it COULD be an issue when getting down to 10nm as we were discussing (tunneling). The barrier will damn near be null at that point. As I said before it will be in the materials and design that will make or break a CPU when it gets that small. Intel has a tough road ahead IMO.


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## hardcore_gamer (Jul 27, 2011)

10nm is the channel length (physical), the thickness of the gate dielectric will be much less than that.Yes, Intel has a tough road ahead.

When the CMOS scaling hits a wall, all the major semiconductor companies should start making processors based on an open (license free) instruction set architecture which is more efficient than x86 and more scalable than ARM. ( my dream )


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## ensabrenoir (Jul 27, 2011)

*just a matter of time*

I'm of the belief that the time new tech hits the market those who put it out are r &d ing something 10 to 20 years beyound it.   Consumer level is an inch above. End of life.    We may not b able to see it like henery ford and his model t Couldn't see. The latest bmw 7 series but were on our way 2 nano tech just like the cartoons and movies. Our 2011 and bulldozers will b used in children toys and cofee makers(make u the perfect cup according to your dna)


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## TheMailMan78 (Jul 27, 2011)

hardcore_gamer said:


> 10nm is the channel length (physical), the thickness of the gate dielectric will be much less than that.Yes, Intel has a tough road ahead.
> 
> When the CMOS scaling hits a wall, all the major semiconductor companies should start making processors based on an open (license free) instruction set architecture which is more efficient than x86 and more scalable than ARM. ( my dream )



This could be your dream man.....

http://www.cbc.ca/news/technology/story/2008/01/21/algae-computers.html

Can't patient nature.


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## [H]@RD5TUFF (Jul 27, 2011)

entropy13 said:


> It would be even better if they look at other materials as well.



That's what I was thinking I mean I have a suspision we are @ or near the limit of current materials.


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## Thatguy (Jul 28, 2011)

TheMailMan78 said:


> That has to do with matter density which is somewhat a different debate. As for the electron being made up of "smaller particles" isn't really supported by current theories as the election is a building block of matter unless you feel holons and spinons are smaller (less volume). But that wouldn't explain the original mass of the electron when split. They are just less energized but the mass is consistent which why I believe in the fragmentation of the electron. Not the split.



Your assuming of course that we actually understand what a electronc is !


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## ensabrenoir (Jul 28, 2011)

Its really easy to get caught up in the end result(the toys of our  amusement) That one can often trivialize  the scientific intellect used to create it.   Much brain cells were re-awakened as strangely  enough..... i understood(most) what was being talked about,  Who knew...  i guess i was paying attention in college after all...


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## Hayder_Master (Jul 28, 2011)

When they say this that's mean already have sample of 10nm cpu.


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## Thatguy (Jul 28, 2011)

Hayder_Master said:


> When they say this that's mean already have sample of 10nm cpu.



I doubt that, they might be close though.


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## FordGT90Concept (Jul 28, 2011)

Well, you can't accuse them of not being ambitious. XD


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## lilhasselhoffer (Jul 28, 2011)

[H]@RD5TUFF said:


> That's what I was thinking I mean I have a suspision we are @ or near the limit of current materials.



What?

Intel is not stupid.  They do not base their production futures off of hopeful numbers, they base them off of reality.

When light transfer methods (for resist etching) could no longer work they had developed doping.  When traditional silicon didn't provide enough resistance they developed high-k gate materials.  When 2d transistors posed heat dissipation issues they developed 3d transistors.  As high-k materials are becoming insufficient they are researching graphene solutions.  

Now spend a little time thinking about the manufacturing environment.  Research needs to be completed, prototypes need to be made, production machinery needs to be designed, machinery needs to be fabricated and installed, trial runs need to be made, and the people need to be trained for production.  Two years to do all of this means that, right now, Intel is very likely testing the basic prototypes of the 10 nm process.  If not, they can't be far off.

Current problems with the 22 nm process are very likely to not make any difference in the future plans.  Scaling the process for production is a different challenge than research.  Whenever you understand how a machine like Intel works, you understand that one delay doesn't have the same domino effect that it would at other companies.


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## Thatguy (Jul 28, 2011)

lilhasselhoffer said:


> What?
> 
> Intel is not stupid.  They do not base their production futures off of hopeful numbers, they base them off of reality.
> 
> ...



yes it does, and I predict more delays. Why any delay cuases a domino effect in any production enviroment is that is typically pulls engineering resources away and also often creates quality and process audit for engineering standards. Every fialure had better have a thruough review and its review applied to all forward tech and manu, if not. Thats fialure with a big fat F


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## Funtoss (Jul 28, 2011)

Hmmm it could be acheiveable lol


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## bostonbuddy (Jul 28, 2011)

I'll wait for the bio computers that store data similar to dna.
My 960 should get me by till then.


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## extrasalty (Jul 29, 2011)

I think intel will elongate the transistors vertically and pack them much like the hard drives perpendicular recording.


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## Recus (Jul 29, 2011)

Not sure is it allowed to create threads in "News" section, will post here. Deal with it. 







Intel arms Haswell with DX11.1

http://www.sweclockers.com/nyhet/14288-intel-ger-stod-for-directx-111-i-haswell


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## Damn_Smooth (Jul 29, 2011)

I'm still waiting for a 10Ghz Netburst. It's 2011 Intel, where is it?


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## mdm-adph (Aug 1, 2011)

TheMailMan78 said:


> This could be your dream man.....
> 
> http://www.cbc.ca/news/technology/story/2008/01/21/algae-computers.html
> 
> Can't patient nature.



You want to bet?  Tell that to all the trolls trying to patent parts of the human genome.


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