Monday, February 20th 2012
Sony and Tokyo Tech Make Chip Capable of 6.3 Gb/s Millimeter-Wave Wireless Transfer
Sony Corporation today announced that the National University Corporation, Tokyo Institute of Technology and Sony have jointly developed a radio frequency ("RF") LSI and a baseband ("BB") LSI that enables millimeter-wave wireless data transfer at the world's fastest rate of 6.3 Gb/s. This technological achievement was adopted for presentation at the International Solid-State Circuits Conference (ISSCC) to be held in San Francisco from February 19, 2012 as academic paper No. 12.3 wherein details of the technology will be disclosed.
In recent years, the demand for ever-increasing wireless communication speeds has led to a consequential increase in the need for more frequencies. In particular, the shortage of frequencies under 6 GHz has become an increasingly critical issue. Additionally, the amounts of inter-device data transmission has also quickly risen due to enhancements in the sound and image quality of audio data, photos, and the video images used for TV, mobile devices and online video-sharing services. Such enhancements have driven the need for the technologies that facilitate the inter-device transmission of large amounts of data at much higher speeds.
In order to accommodate these expected future developments, the Tokyo Institute of Technology and Sony have jointly developed a millimeter-wave wireless data transfer technology that realizes both high-speed and low-power data transfer between mobile devices. Implementation of this technology will enable users to transmit and receive data at much higher speeds between mobile devices without the need for cable connections. This technology will also enable users to enjoy uncompressed high-quality video streaming from a mobile device to a display.
In this joint development, Sony was tasked with designing the digital parts of the BB LSI and the development of the chip unit as a whole, while the Tokyo Institute of Technology designed the RF LSI and the analog parts of BB LSI.
The high-efficiency and high-integrity of the rate-14/15 Low-Density Parity-Check (LDPC) error-correcting code developed by Sony significantly decreases the amount of redundant data that is required for error correction, and this has enabled LDPC decoding at the world's lowest per-bit energy efficiency of 11.8 pJ/b (74 mW at 6.3 Gb/s). This LDPC code was proposed to the 60 GHz band millimeter-wave wireless communication standard IEEE 802.15.3c and employed in the standards.
A research team led by Professor Akira Matsuzawa and Associate Professor Kenichi Okada at the Tokyo Institute of Technology has developed an RF LSI that functions as a 60 GHz band millimeter-wave direct-conversion transceiver capable of, for the first time ever, the 16 Quadrature Amplitude Modulation (16QAM) of high-speed wireless communications for every frequency channel defined under the 60 GHz band millimeter-wave wireless communication standards.
This breakthrough has been achieved by a unique back-to-back layout structure of the injection locked oscillator. The analog-to-digital converter (ADC) on the BB LSI achieved the world's lowest power consumption of 12 mW at a sampling rate of 2.3 G samples/s as an ADC integrated in a 60 GHz wireless chip by developing a simple comparator which does not increase the conversion noise.
Part of this R&D was conducted as a part of the "R&D for Expansion of Radio Wave Resources" sponsored by the Japanese Ministry of Internal Affairs and Communications (MIC).
In order to accommodate these expected future developments, the Tokyo Institute of Technology and Sony have jointly developed a millimeter-wave wireless data transfer technology that realizes both high-speed and low-power data transfer between mobile devices. Implementation of this technology will enable users to transmit and receive data at much higher speeds between mobile devices without the need for cable connections. This technology will also enable users to enjoy uncompressed high-quality video streaming from a mobile device to a display.
In this joint development, Sony was tasked with designing the digital parts of the BB LSI and the development of the chip unit as a whole, while the Tokyo Institute of Technology designed the RF LSI and the analog parts of BB LSI.
The high-efficiency and high-integrity of the rate-14/15 Low-Density Parity-Check (LDPC) error-correcting code developed by Sony significantly decreases the amount of redundant data that is required for error correction, and this has enabled LDPC decoding at the world's lowest per-bit energy efficiency of 11.8 pJ/b (74 mW at 6.3 Gb/s). This LDPC code was proposed to the 60 GHz band millimeter-wave wireless communication standard IEEE 802.15.3c and employed in the standards.
A research team led by Professor Akira Matsuzawa and Associate Professor Kenichi Okada at the Tokyo Institute of Technology has developed an RF LSI that functions as a 60 GHz band millimeter-wave direct-conversion transceiver capable of, for the first time ever, the 16 Quadrature Amplitude Modulation (16QAM) of high-speed wireless communications for every frequency channel defined under the 60 GHz band millimeter-wave wireless communication standards.
This breakthrough has been achieved by a unique back-to-back layout structure of the injection locked oscillator. The analog-to-digital converter (ADC) on the BB LSI achieved the world's lowest power consumption of 12 mW at a sampling rate of 2.3 G samples/s as an ADC integrated in a 60 GHz wireless chip by developing a simple comparator which does not increase the conversion noise.
Part of this R&D was conducted as a part of the "R&D for Expansion of Radio Wave Resources" sponsored by the Japanese Ministry of Internal Affairs and Communications (MIC).
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