TotallySo 2021 earliest for DDR chips to hit the market in volume, actual sticks maybe a year later pending how fast it's adopted.

RAMBUS

silentbogoIt's OK even at 2022. Both Intel and AMD already have a roadmap laid out for the next 4-5 years and it does not involve anything radically new, including DDR5.
Just waiting on DDR4L for now....

ChaitanyaWe are yet to see DDR4 3200Mhz(JEDEC spec and not fraudulent SPD enhancement) and there are talks of DDR5, guess DDR4 will be DDR RAM standard with slowest adoption so far.

ArdWar

RAMBUS

THIS COMPANY IS STILL AROUND???

The main purpose of this capability is to enable reads and writes to occur at high clock frequencies without the loss of bandwidth due to bus-turnaround cycles incurred in DDR SRAM.

QDR SRAM uses two clocks, one for read data and one for write data and has separate read and write data buses (also known as Separate I/O), whereas DDR SRAM uses a single clock and has a single common data bus used for both reads and writes (also known as Common I/O). This helps to eliminate problems caused by the propagation delay of the clock wiring, and allows the illusion of concurrent reads and writes (as seen on the bus, although internally the memory still has a conventional single port - operations are pipelined but sequential).

When all data I/O signals are accounted, QDR SRAM is not 2x faster than DDR SRAM but is 100% efficient when reads and writes are interleaved. In contrast, DDR SRAM is most efficient when only one request type is continually repeated, e.g. only read cycles. When write cycles are interleaved with read cycles, one or more cycles are lost for bus turnaround to avoid data contention, hence bus efficiency is reduced.

Spoiler: MORE IMAGE EXAMPLES

DeathtoGnomes"Get off the Bus Gus"

EarthDogToo bad memory bandwidth really doesnt hold anything back as it stands...

Whats the point of a bigger pipe whwn we cant come close to saturatung what we have in most cases? ;)

bonehead123IIRC correctly, RAMBUS literally fubarred several different memory concepts many years ago to the point where anyone who was anyone in the computer field back then repeatedly sued the crap out of them, some for patent infringements, some for IP theft, and still others for what was essentially vaporware, because nothing they made or attempted to make either didn't work at all , or didn't work anywhere as well as they claimed it would.

I seem to recall Intel even got into that game, because they promised them that their "uber-ram" would be the ultimate evolution of pc memory for many many years to come. I think even Apple was interested in rambus at one point for the Mac Pro workstations (during the development of their massive G5 rigs), until they realized their claims were all smoke and mirrors and there was no way that they could ever produce anything reliably or profitably...

So sad to hear they even still exist, let alone trying to weasel themselves back into the arena again :(

ValantarI for one care less for this, and more for a revised SO-DIMM standard. The prevalence of thin-and-light laptops has made clear the restrictions of the relatively large size of this standard, so to avoid the idiotic "solder everything to the board" tendency, we need smaller standards. m.2 did this for PCIe, now it should be RAM's turn to go on a diet.

My suggestions: either DIMMs half the size of current SO-DIMMs, or dual-channel DIMMs so that a single DIMM won't strangle your CPU and iGPU. Of course density would be an issue here, but what's stopping us from stacking RAM chips? Or just relying on process shrinks to shrink package sizes, with a new mounting standard to match? Of course higher density means more complex PCBs, but that ought to be par for the course at this point, and not something to really affect pricing.

Franzen4RealThe higher density/lower power is also a factor. From a bandwidth perspective, APU's could benefit for graphics performance. All in all, it seems mostly the laptop/mobile segment has the most to gain until something like HBM becomes readily available.

trparkyWill this mean that memory timings will finally come down? I've noticed that lately as memory bandwidth has gone up memory timings have shot through the roof unless of course you buy very expensive very high-end enthusiast RAM.

EarthDogNo. Why would the trend of higher speeds and looser timings change on the same technology?

trparkyWill this mean that memory timings will finally come down? I've noticed that lately as memory bandwidth has gone up memory timings have shot through the roof unless of course you buy very expensive very high-end enthusiast RAM.

Prima.VeraSo what? Memory timing increase proportionally with the speed. CAS latency and true latency are 2 completelly different things.
Please read this article to understand in more details:
www.crucial.com/usa/en/memory-performance-speed-latency
en.wikipedia.org/wiki/CAS_latency#Memory_timing_examples



As you can see, the Speed and Clock Cycle time are the ones that matter, not CAS timings. The bigger the frequency, the lesser Clock Cycle time is.
true latency (ns) = clock cycle time (ns) x number of clock cycles (CL)
The latest DDR4-4000Mhz have a true latency of 8.911ns. ;)