Monday, September 12th 2022
NVIDIA's Third Largest Ada GPU, the AD106, Features PCIe x8 Interface
It looks like NVIDIA is finally taking AMD's route in the mid-range by giving the third-largest silicon in its next-generation GeForce "Ada" RTX 40-series a narrower PCI-Express host interface. The AD106 silicon will be NVIDIA's third largest client GPU based on the "Ada" architecture, and succeeds the GA106 powering the likes of the GeForce RTX 3060. This chip reportedly features a narrower PCI-Express x8 host interface. At this point we don't know if the AD106 comes with PCI-Express Gen 5 or Gen 4. Regardless, having a PCIe lane count of 8 could possibly impact performance of the GPU on systems with PCI-Express Gen 3, such as 10th Gen Intel "Comet Lake," or even AMD's Ryzen 7 5700G APU.
Interestingly, the same leak also claims that the AD107, the fourth largest silicon powering lower mid-range SKUs, and which succeeds the GA107, features the same PCIe lane-count of x8. This is unlike AMD, which gives the "Navi 24" silicon a PCI-Express 4.0 x4 interface. Lowering the PCIe lane count simplifies PCB design, since there are fewer PCIe lanes to be wired out in precise trace-lengths to avoid asynchrony. It also reduces the pin-count of the GPU package. NVIDIA's calculation here is that there are now at least two generations of Intel and AMD platforms with PCIe Gen 4 or later (Intel "Rocket Lake" and "Alder Lake," AMD "Zen 2," and "Zen 3,") and so it makes sense to lower the PCIe lane-count.
Source:
kopite7kimi (Twitter)
Interestingly, the same leak also claims that the AD107, the fourth largest silicon powering lower mid-range SKUs, and which succeeds the GA107, features the same PCIe lane-count of x8. This is unlike AMD, which gives the "Navi 24" silicon a PCI-Express 4.0 x4 interface. Lowering the PCIe lane count simplifies PCB design, since there are fewer PCIe lanes to be wired out in precise trace-lengths to avoid asynchrony. It also reduces the pin-count of the GPU package. NVIDIA's calculation here is that there are now at least two generations of Intel and AMD platforms with PCIe Gen 4 or later (Intel "Rocket Lake" and "Alder Lake," AMD "Zen 2," and "Zen 3,") and so it makes sense to lower the PCIe lane-count.
40 Comments on NVIDIA's Third Largest Ada GPU, the AD106, Features PCIe x8 Interface
And if Ngreedia goes with new power connector for all cards or not.
so its all about cuting cost.
They're saving it for THEMSELVES and slap you with same if not higher price, depending on what they think they can get away with.
Together with a steep rise in boardpower, supposably in price, too, and a smaller GPU with narrower memory interface (256Bit instead of 320/384Bit on x080, 192/160Bit instead of 256Bit on x070/x060Ti) and still only an increase in VRAM capacity by 50% instead of 100% on average, this again gives us the impresseion that NV gives us less for our money than in the last generations.
I don't see how Nvidia or AMD could cut costs by more than a couple $ this way.
So far there isn't a single product in the Nvidia ADA stack I'm really excited for. It all looks... handicapped.
I will upgrade 2060 if only: => 3070 perf, 200W TDP max and $300-350.
But the Nvidia tactics last two years kinda make me turn to red team again. Not that red team is no saint.......
Waiting for reviews for both vendors and make a decision based on my expectations.
P.S. also 2060 is a 170W card, but runs just fine at 125W with minimal loss.
So whoever have 'older' pcie4 will pay more in order to get the full passthrough.
I have more bad suggestions for NV but everything in due time.
If 4060 is full AD106 with 18Gbps GDDR6 it will be in worst case 200W (like 3060Ti) and the FHD performance should be at 3070Ti level at least!
We should wait regarding 8X PCI-express scaling, but the performance essentially will be at OC RTX 2080Ti level which is PCI-express 3.0 16X which offers similar bandwidth with 4.0 8X (not that we can conclude anything concrete from that though)