Friday, November 15th 2024
Intel Removes DLVR Bypass for "Arrow Lake" in Latest 0x112 Microcode Update
Intel has significantly changed its latest 0x112 microcode update, removing users' ability to bypass the Digital Linear Voltage Regulator (DLVR) through standard BIOS settings on "Arrow Lake" processors. DLVR, a technology designed to provide precise voltage control for individual performance cores and efficiency core clusters, offers great benefits during gaming sessions and light workloads. According to overclocker der8auer's analysis, DLVR can effectively manage power consumption during gaming, with power losses of around 20 W at typical gaming loads. However, these losses can shoot up to approximately 88 W under full CPU utilization. Previously, users could disable DLVR through a BIOS setting called "Power Gate" mode, which is particularly useful for intensive workloads where power losses might impact performance. With the new microcode update, this option has been removed from standard BIOS settings. It is also worth pointing out that DLVR is in its second iteration inside Arrow Lake CPUs, after the initial debut in "Raptor Lake," which had DLVR fused off.
Intel explained to Hardwareluxx that this change was implemented to "prevent accidental misuse of DLVR bypass," restricting its use to extreme overclocking scenarios involving sub-ambient cooling methods like liquid nitrogen. The update has already been rolled out through BIOS updates on some Z890 chipset motherboards, with ASRock and MSI being among the first manufacturers to implement the new microcode. While DLVR bypass may still be accessible through specialized LN2 profiles on high-end motherboards, the average enthusiast user loses direct control over this feature. This development mainly affects early Arrow Lake adopters, as not all motherboards include extreme overclocking profiles. While Intel's move appears to prevent potential issues, we must remember that power settings are something that users should only change with plenty of consideration. Removing this power gate mod is Intel prevention for Raptor Lake-like situations where these chips had an issue with Vmin shift.
Sources:
HardwareLuxx.de, via Tom's Hardware
Intel explained to Hardwareluxx that this change was implemented to "prevent accidental misuse of DLVR bypass," restricting its use to extreme overclocking scenarios involving sub-ambient cooling methods like liquid nitrogen. The update has already been rolled out through BIOS updates on some Z890 chipset motherboards, with ASRock and MSI being among the first manufacturers to implement the new microcode. While DLVR bypass may still be accessible through specialized LN2 profiles on high-end motherboards, the average enthusiast user loses direct control over this feature. This development mainly affects early Arrow Lake adopters, as not all motherboards include extreme overclocking profiles. While Intel's move appears to prevent potential issues, we must remember that power settings are something that users should only change with plenty of consideration. Removing this power gate mod is Intel prevention for Raptor Lake-like situations where these chips had an issue with Vmin shift.
10 Comments on Intel Removes DLVR Bypass for "Arrow Lake" in Latest 0x112 Microcode Update
Default is on and I am sure TPU tested with it on, you can still OC but I think it would be better to just have a warning message and let users have the option.
Performance improvements will come later (end on month or early next month). Then be good time to retest.
Just wait until the next planned review.
And the idea for DLVR is to save power during bursty scenarios, which is perfect for laptops, but not so good for load, because DLVR adds multiple parallel regulators to reduce voltage droop.
Maybe I missed something but don't know where 1.1V came from and calculating 220A presumably from 240W with it! Sensor tables only showed around 160A IIRC. So if 220A at 1.1V then package power at 1.5V is at least 330W?
Also I would think bypassing the DLVR would mean all DLVR gates turned on and still in circuit.
If SVID was always at 1.5V then as a crude example demonstrating dynamic power
1.5V in
1.4V Cores, dynamic power 280W = 200A so DLVR at 0.1V = 20W
Total SVID power 300W
Drop core voltage to 1V same clock
1.5V in
1.0V Cores, dynamic power ~140W = 140A so DLVR at 0.5V = 70W
Total SVID power ~210W
However such a huge change in core voltage might be done to reduce clocks also which would reduce power even further.
Note that he later changed SVID 1.5VI would call that a 30W decrease but whatever.
Seems like a tweakers paradise :D