Remember that HT on P4 was achieved through using an "integer register" trick. Performance was gained only on SOME thread types. It wasnt dual core. For encoding... it wasnt necessarily any better at all. Decent encoding requires FPU or SSE2/3/4 co-tasking. There's no word yet if those instruction types can be co-tasked. I suspect NOT. They couldnt on the P4HT.

"Virtual" cores is worrying. It sounds like "Virtual PC". What happens is that you CAN have independent threads running, but IN PRACTICE... one execution stage of one thread is paused while the other is executed. Its acheived by having a DOUBLE SET of registers. But only 4 instructions can actually be executed at once, not 8. So a dual xeon quad core will be a lot faster (8 real cores) compared to the 4 real and 4 virtual cores. (the virtual cores only work when the real cores are not doing anything, e.g. waiting for memory).

The advantage of the virtual core is only for memory intensive loops where the execution part of the CPU is stalled waiting for memory lookups OUT OF CACHE. While the CPU is waiting for the memory... it can quickly do a couple of instructions on the "virtual thread".

The performance increase is going to be like P4 HT... but WORSE due to the fact that in most situations, one of the other 3 cores on the CPU will take the thread ownership.

P4 + HT compared to P4 without HT was approximately 20% gain IN THE BEST POSSIBLE (REAL WORLD)CIRCUMSTANCES and usually more like 1-2%.

So I agree withan earlier poster, its more of a marketing gimmick.

Whats needed is to see the Nehalem run a benchmark, e.g. CINEBENCH 10, and take a look at the CPU results. I think we will be disappointed. If not... they would have shown these results already.

It's not expected to produce extreme gains, though HTT can at least step up the processor's efficiency. The performance gains (or penalties) would be comparable to the Pentium 4 with HT enabled (or disabled).

i am sure nehalem is still way faster then core2dou with HT off
anny way Nehalem is way more advanced then xeon or core2
i just cant wait for bloomfield :)

mmm... integrated triple channel ddr3 controller on a native quad... does that mean that mbs will start having six ddr3 slots? do current MBs support tripple channel?

no current mobo's support tirpple channel
6 slots posible
trichannel 3 slots
dual 2 slots

phanbueymmm... integrated triple channel ddr3 controller on a native quad... does that mean that mbs will start having six ddr3 slots? do current MBs support tripple channel?

This will come out in a new socket architecture of its own. Obviously motherboards with then either have 4 ~ 6 slots. If there's an LGA 775/771 implementation (like how Intel released Prescott for the older s478) , that could just use the usual 128 bit wide memory bus.