Friday, February 27th 2009
Intel E5200 Gets Updated, R0 Stepping Coming Up
Intel's Pentium Dual-Core E5200 processor is getting on course for a specifications update. The chip will feature in a new, improved Wolfdale-2M core, spec'd out as the R0 stepping, from its current M0 stepping. The new stepping is intended to add new instructions, power-management features, and bring about changes in the chip-package. A short list of known changes is as follows:
Source:
TechConnect Magazine
- CPUID changed from 10677 to 1067A
- Power State Indicator (PSI) support with Intel 4 series chipsets
- New instructions - XSAVE and XRSTOR
- New S-spec and MM numbers
- New halide-free chip package
29 Comments on Intel E5200 Gets Updated, R0 Stepping Coming Up
it was pretty expected from intel cause they get short of working old M0 dies :laugh: and newer e5300 and e5400 are based on R0 from their start (jan2009)
I just wish they wouldn't disable the extra instruction SEE instruction sets on these processor. Virtualization and execution disable bit I can understand.
M0:5200
http://processorfinder.intel.com/details.aspx?sSpec=SLAY7
R0:5300,5400
http://processorfinder.intel.com/details.aspx?sSpec=SLB9U
http://processorfinder.intel.com/details.aspx?sSpec=SLB9V
I know, I was making a more broad statement about Intel disabling them on their processors processors, not specifically the E5000 series. I can understand why they would disable Virtualization and the NX-Bit on processors, but not the extra instruction sets. Sorry, I should have been more clear.
:/
I love my E5200, it does EVERYTHING running at 3.8 GHz easily, and thats with C0 stepping.
:/