
TSMC Leadership Speaks of "Unprecedented" Demand for 2 nm; Greater Than Previous-gen Nodes
Despite recent whispers of TSMC losing a key 4 nm node process customer, industry analysts reckon that Taiwan's premier foundry business will remain in a comfortable leading position for the foreseeable future. "Optimistic" expert opinion points to "revenue growth for supply chain players," driven by the rapid progress of the firm's 2 nm manufacturing prowess. Naturally, their cutting-edge manufacturing capabilities—supposedly bolstered by GAAFET—are being tracked with keen interest. According to a fairly fresh Ctee Taiwan news piece, the usual big players are reportedly queued up and present within factory order books. The likes of Apple, NVIDIA, AMD, Qualcomm, MediaTek and Broadcom are mentioned. Mid-way through last month, Team Red officially announced a big collaborative milestone: "(our) next-generation AMD EPYC processor—codenamed "Venice"—is the first HPC product in the industry to be taped out and brought up on the TSMC advanced 2 nm (N2) process technology."
Ctee's report cites recent statements by C. C. Wei. Apparently, the TSMC CEO has stressed (on multiple occasions) that there is "unprecedented" demand for his company's 2 nm production pipelines—far exceeding previous levels for 3 nm. In addition, TSMC reps—who are currently touring the States; hosting technology symposiums—have revealed 2 nm (N2) defect density trends. Ctee outlined these intriguing details: "(N2's) defect density (D0) performance is comparable to that of the 5 nm family, and even surpasses the 7 nm and 3 nm processes of the same period, making it one of the most technologically mature advanced nodes." Wei's foundry team seems to be well ahead of main competition; insiders reckon that alleged equipment upgrades signal a push into 1.4 nm territories. Crucially, mass production of 2 nm (N2) wafers is expected to begin later this year—a cross-facility push was uttered by industry moles.
Ctee's report cites recent statements by C. C. Wei. Apparently, the TSMC CEO has stressed (on multiple occasions) that there is "unprecedented" demand for his company's 2 nm production pipelines—far exceeding previous levels for 3 nm. In addition, TSMC reps—who are currently touring the States; hosting technology symposiums—have revealed 2 nm (N2) defect density trends. Ctee outlined these intriguing details: "(N2's) defect density (D0) performance is comparable to that of the 5 nm family, and even surpasses the 7 nm and 3 nm processes of the same period, making it one of the most technologically mature advanced nodes." Wei's foundry team seems to be well ahead of main competition; insiders reckon that alleged equipment upgrades signal a push into 1.4 nm territories. Crucially, mass production of 2 nm (N2) wafers is expected to begin later this year—a cross-facility push was uttered by industry moles.