Ayar Labs, a leader in silicon photonics for chip-to-chip connectivity, will showcase its in-package optical I/O solution integrated with Intel's industry-leading Agilex Field-Programmable Gate Array (FPGA) technology. In demonstrating 5x current industry bandwidth at 5x lower power and 20x lower latency, the optical FPGA - packaged in a common PCIe card form factor - has the potential to transform the high performance computing (HPC) landscape for data-intensive workloads such as generative artificial intelligence (AI), machine learning, and support novel new disaggregated compute and memory architectures and more.

"We're on the cusp of a new era in high performance computing as optical I/O becomes a 'must have' building block for meeting the exponentially growing, data-intensive demands of emerging technologies like generative AI," said Charles Wuischpard, CEO of Ayar Labs. "Showcasing the integration of Ayar Labs' silicon photonics and Intel's cutting-edge FPGA technology at Supercomputing is a concrete demonstration that optical I/O has the maturity and manufacturability needed to meet these critical demands."

BeagleBoard.org, a pioneer in open-source single-board computers (SBCs), is excited to unveil the BeagleV -Fire, a revolutionary SBC powered by the Microchip's PolarFire MPFS025T FCVG484E 5x core RISC-V System on Chip (SoC) with FPGA fabric. This remarkable addition to the BeagleBoard.org BeagleV family of boards opens up new horizons for developers, tinkerers, and the open-source community to explore the vast potential of RISC-V architecture and FPGA technology.

BeagleV -Fire is the second board in the BeagleV series of single board computers (SBCs) from BeagleBoard.org. BeagleV -Fire like other BeagleV SBCs, is set to revolutionize the world of embedded systems and empower developers and enthusiasts worldwide. After the launch of BeagleV -Ahead, BeagleV -Fire represents another significant milestone in the democratization of computer architecture and open-source hardware development for the masses. Built around the powerful and energy-efficient RISC-V instruction set architecture (ISA) along with its versatile FPGA fabric, BeagleV -Fire SBC offers unparalleled opportunities for developers, hobbyists, and researchers to explore and experiment with RISC-V technology.

Zero ASIC, a semiconductor startup, came out of stealth today to announce early access to its one-of-a-kind ChipMaker platform, demonstrating a number of world firsts:

• 3D chiplet composability enabling billions of new silicon products
• Fully automated no-code chiplet-based chip design
• Zero install interactive RTL-based chip emulation
• Roadmap to 100X reduction in chip development costs

"Custom Application Specific Integrated Circuits (ASICs) offer 10-100X cost and energy advantage over commercial off the shelf (COTS) devices, but the enormous development cost makes ASICs non-viable for most applications," said Andreas Olofsson, CEO and founder of Zero ASIC. "To build the next wave of world changing silicon devices, we need to reduce the barrier to ASICs by orders of magnitude. Our mission at Zero ASIC is to make ordering an ASIC as easy as ordering catalog parts from an electronics distributor."

Phison Electronics, a global leader in NAND controllers and storage solutions, announced today that the company has expanded its portfolio of PCIe 5.0 high-speed transmission solutions with PCIe 5.0, CXL 2.0 compatible redriver and retimer data signal conditioning IC products. Leveraging the company's deep expertise in PCIe engineering, Phison is the only signal conditioners provider that offers the widest portfolio of multi-channel PCIe 5.0 redriver and retimer solutions and PCIe 5.0 storage solutions designed specifically to meet the data infrastructure demands of artificial intelligence and machine learning (AI+ML), edge computing, high-performance computing, and other data-intensive, next-gen applications. At the 2023 Open Compute Project Global Summit, the Phison team is showcasing its expansive PCIe 5.0 portfolio, demonstrating the redriver and retimer technologies alongside other enterprise NAND flash, illustrating a holistic vision for a PCIe 5.0 data ecosystem to address the most demanding applications of the AI-everywhere era.

"Phison has focused industry-leading R&D efforts on developing in-house, chip-to-chip communication technologies since the introduction of the PCIe 3.0 protocol, with PCIe 4.0 and PCIe 5.0 solutions now in mass production, and PCIe 6.0 solutions now in the design phase," said Michael Wu, President & General Manager, Phison US. "Phison's accumulated experience in high-speed signaling enables our team to deliver retimer and redriver design solutions that are optimized for top signal integration, low power usage, and high temperature endurance, to deliver interface speeds for the most challenging compute environments."

ASUS, a global infrastructure solution provider, is excited to announce its participation in the 2023 OCP Global Summit, which is taking place from October 17-19, 2023, at the San Jose McEnery Convention Center. The prestigious annual event brings together industry leaders, innovators and decision-makers from around the world to explore and discuss the latest advancements in open infrastructure and cloud technologies, providing a perfect stage for ASUS to unveil its latest cutting-edge products.

The ASUS theme for the OCP Global Summit is Solutions beyond limits—ASUS empowers AI, cloud, telco and more. We will showcase an array of products:

Intel Corporation today announced its intent to separate its Programmable Solutions Group (PSG) operations into a standalone business. This will give PSG the autonomy and flexibility it needs to fully accelerate its growth and more effectively compete in the FPGA industry, which serves a broad array of markets, including the data center, communications, industrial, automotive, aerospace and defense sectors. Intel also announced that Sandra Rivera, executive vice president at Intel, will assume leadership of PSG as chief executive officer; Shannon Poulin has been named chief operating officer.

Standalone operations for PSG are expected to begin Jan. 1, 2024, with ongoing support from Intel. Intel expects to report PSG as a separate business unit when it releases first-quarter 2024 financials. Over the next two to three years, Intel intends to conduct an IPO for PSG and may explore opportunities with private investors to accelerate the business's growth, with Intel retaining a majority stake.

AMD today announced the AMD Alveo UL3524 accelerator card, a new fintech accelerator designed for ultra-low latency electronic trading applications. Already deployed by leading trading firms and enabling multiple solution partner offerings, the Alveo UL3524 provides proprietary traders, market makers, hedge funds, brokerages, and exchanges with a state-of-the-art FPGA platform for electronic trading at nanosecond (ns) speed.

The Alveo UL3524 delivers a 7X latency improvement over prior generation FPGA technology, achieving less than 3ns FPGA transceiver latency for accelerated trade execution. Powered by a custom 16 nm Virtex UltraScale + FPGA, it features a novel transceiver architecture with hardened, optimized network connectivity cores to achieve breakthrough performance. By combining hardware flexibility with ultra-low latency networking on a production platform, the Alveo UL3524 enables faster design closure and deployment compared to traditional FPGA alternatives.

AMD today announced AMD Kria K24 System-on-Module (SOM) and KD240 Drives Starter Kit, the latest additions to the Kria portfolio of adaptive SOMs and developer kits. AMD Kria K24 SOM offers power-efficient compute in a small form factor and targets cost-sensitive industrial and commercial edge applications. Advanced InFO (Integrated Fan-Out) packaging makes the K24 half the size of a credit card while using half the power of the larger, connector-compatible Kria K26 SOM.

The K24 SOM provides high determinism and low latency for powering electric drives and motor controllers used in compute-intensive digital signal processing (DSP) applications at the edge. Key applications include electric motor systems, robotics for factory automation, power generation, public transportation such as elevators and trains, surgical robotics and medical equipment like MRI beds, and EV charging stations. Coupled with the KD240 Drives Starter Kit, an out-of-the-box-ready motor control-based development platform, the products offer a seamless path to production deployment with the K24 SOM. Users can quickly be up and running, speeding time to market for motor control and DSP applications without requiring FPGA programming expertise.

To address customers' growing needs, Intel expanded its Intel Agilex FPGA portfolio and broadened its Programmable Solutions Group (PSG) offerings to handle the increased demand for customized workloads, including enhanced AI capabilities, and to provide lower total cost of ownership (TCO) and more complete solutions. These new products and technologies will be the focus of Intel's FPGA Technology Day (IFTD) on Sept. 18, where hardware engineers, software developers and system architects can interact with Intel and partner experts.

FPGAs play an important role in Intel's portfolio by offering flexible and customizable platform capabilities for demanding applications and workloads. Intel FPGAs solve customer challenges from cloud to edge with AI capabilities across silicon, IP and software. Intel's latest announcements illustrate how the company's increased investment in its FPGA portfolio is unfolding. So far in 2023, Intel has released 11 of 15 expected new products - more new product introductions than ever in Intel's FPGA business. As disclosed in its second quarter 2023 earnings call, Intel reported that its PSG business unit delivered 35% revenue growth year-over-year, marking the third consecutive quarter of record revenue.

QuickLogic Corporation, a developer of embedded FPGA (eFPGA) IP, ruggedized FPGAs and Endpoint AI/ML solutions, and YorChip, a pioneering startup specializing in UCIe-compatible IP, have formed a strategic partnership to revolutionize the world of FPGA chiplets. The collaboration will result in a groundbreaking lineup of FPGA chiplets optimized for low power consumption and low cost, opening new possibilities for a wide range of applications, including the fast-growing edge IoT and AI/ML markets.

According to Yole Group, a market research company, by 2023, they expect chiplet adoption will lead to a TAM of chiplet-based integrated circuits in excess of $200B, across the consumer, automotive defense, aerospace, industrial, and medical markets. Since discrete FPGAs are already prevalent in those same markets, wide adoption of eFPGA-based UCIe (Unified Chiplet Interconnect Express) enabled chiplets is expected, and QuickLogic and YorChip are well-positioned to capitalize on this growth opportunity.

At this year's Hot Chips event, Intel provided the first in-depth look at its next-generation Intel Xeon product lineup, built on a new, innovative platform architecture. The platform marks an important evolution for Intel Xeon by introducing processors with a new Efficient-core (E-core) architecture alongside its well-established Performance-core (P-core) architecture. Code-named Sierra Forest and Granite Rapids, respectively, these new products will bring simplicity and flexibility to customers, offering a compatible hardware architecture and shared software stack to tackle critical workloads such as artificial intelligence.

"It is an exciting time for Intel and its Xeon roadmap. We recently shipped our millionth 4th Gen Xeon, our 5th Gen Xeon (code-named Emerald Rapids) will launch in Q4 2023 and our 2024 portfolio of data center products will prove to be a force in the industry," said Lisa Spelman, Intel corporate vice president and general manager of Xeon Products and Solutions.

OpenHW Group today announced that the industry's most comprehensive Development Kit for an open-source RISC-V MCU is now available to be ordered. The OpenHW CORE-V MCU DevKit includes an open-source printed circuit board (PCB) which integrates OpenHW's CORE-V MCU and various peripherals, a software development kit (SDK) with a full-featured Eclipse-based integrated development environment (IDE), as well as connectivity to Amazon Web Services (AWS) via AWS IoT ExpressLink for secure and reliable connectivity between IoT devices and AWS cloud services.

The comprehensive open-source CORE-V MCU DevKit enables software development for embedded, internet-of-things (IoT), and artificial intelligence (AI)-driven applications. The CORE-V MCU is based on the open-source CV32E40P embedded-class processor, a small, efficient, 32-bit, in-order open-source RISC-V core with a four-stage pipeline that implements the RV32IM[F]C RISC-V instruction extensions.

Magewell today announced two new models in the company's Eco Capture family of ultra-compact, power-efficient M.2 video capture cards. Hot on the heels of the recently introduced Eco Capture AIO M.2—which features selectable HDMI and SDI 1080p60 inputs—the Eco Capture HDMI 4K Plus M.2 and Eco Capture 12G SDI 4K Plus M.2 capture 4K video at 60 frames per second over HDMI or SDI interfaces, respectively. Magewell will highlight the new Eco Capture models alongside other innovations in stand 7.A44 at the IBC 2023 exhibition in Amsterdam from September 15 to 18.

Magewell's Eco Capture cards offer systems integrators and OEM developers a space-efficient, high-performance video capture solution with low latency and low power consumption. Ideal for use in small, portable or embedded systems where full-sized PCIe slots are not available, the cards feature an M.2 connector and measure only 22 mm x 80 mm (0.87x3.15 in). The new models are the first Eco Capture cards to leverage a PCIe Gen 3 bus interface, offering increased DMA bandwidth over earlier siblings.

AMD today announced revenue for the second quarter of 2023 of $5.4 billion, gross margin of 46%, operating loss of $20 million, net income of $27 million and diluted earnings per share of $0.02. On a non-GAAP basis, gross margin was 50%, operating income was $1.1 billion, net income was $948 million and diluted earnings per share was $0.58.

"We delivered strong results in the second quarter as 4th Gen EPYC and Ryzen 7000 processors ramped significantly," said AMD Chair and CEO Dr. Lisa Su. "Our AI engagements increased by more than seven times in the quarter as multiple customers initiated or expanded programs supporting future deployments of Instinct accelerators at scale. We made strong progress meeting key hardware and software milestones to address the growing customer pull for our data center AI solutions and are on-track to launch and ramp production of MI300 accelerators in the fourth quarter."

Introducing the Versal HBM Series VHK158 Evaluation Kit. This features the Versal HBM series VH1582 device, which integrates multi-Tbps High Bandwidth Memory (HBM), hardened connectivity IP, and adaptive compute in a single device, eliminating the bottlenecks between memory, I/O, and compute while delivering up to 6 times more memory bandwidth.

The VHK158 evaluation kit is an evaluation platform for the Versal HBM series VH1582 device designed to keep up with the higher memory needs of compute intensive, memory bound applications, providing adaptable acceleration for data center, wired networking, test & measurement, and aerospace & defense applications. The VHK158 board's primary focus is to enable demonstration and evaluation of the VH1582 silicon and support customer application development

High Bandwidth Memory (HBM) is emerging as the preferred solution for overcoming memory transfer speed restrictions due to the bandwidth limitations of DDR SDRAM in high-speed computation. HBM is recognized for its revolutionary transmission efficiency and plays a pivotal role in allowing core computational components to operate at their maximum capacity. Top-tier AI server GPUs have set a new industry standard by primarily using HBM. TrendForce forecasts that global demand for HBM will experience almost 60% growth annually in 2023, reaching 290 million GB, with a further 30% growth in 2024.

TrendForce's forecast for 2025, taking into account five large-scale AIGC products equivalent to ChatGPT, 25 mid-size AIGC products from Midjourney, and 80 small AIGC products, the minimum computing resources required globally could range from 145,600 to 233,700 Nvidia A100 GPUs. Emerging technologies such as supercomputers, 8K video streaming, and AR/VR, among others, are expected to simultaneously increase the workload on cloud computing systems due to escalating demands for high-speed computing.

AMD today announced the AMD Versal Premium VP1902 adaptive system-on-chip (SoC), the world's largest adaptive SoC. The VP1902 adaptive SoC is an emulation-class, chiplet-based device designed to streamline the verification of increasingly complex semiconductor designs. Offering 2X the capacity over the prior generation, designers can confidently innovate and validate application-specific integrated circuits (ASICs) and SoC designs to help bring next generation technologies to market faster.

AI workloads are driving increased complexity in chipmaking, requiring next-generation solutions to develop the chips of tomorrow. FPGA-based emulation and prototyping provides the highest level of performance, allowing faster silicon verification and enabling developers to shift left in the design cycle and begin software development well before silicon tape-out. AMD, through Xilinx, brings over 17 years of leadership and six generations of the industry's highest capacity emulation devices, which have nearly doubled in capacity each generation.

Edge sensors, such as LiDAR, radar and 3D surround-view camera systems, are becoming more prevalent in the automotive market, especially with the growing adoption in autonomous driving. As more sensors are needed for autonomy, there are increasing needs for faster signal processing, reduced device costs and smaller form factors. Functional safety is also critical for many of these autonomous applications.

To address these market needs, we're introducing two additions to our AMD Automotive XA Artix UltraScale+ family: the XA AU10P and XA AU15P cost-optimized processors, which are automotive-qualified and optimized for use in advanced driver-assistance systems (ADAS) sensor applications. The Artix UltraScale+ devices extend the AMD portfolio of automotive-grade, functional-safety proven and highly scalable FPGA and adaptive SoCs, joining the automotive-grade Spartan 7, Zynq 7000 and Zynq UltraScale+ product families.

Achronix Semiconductor Corporation, a leader in high-performance FPGAs and embedded FPGA (eFPGA) IP, today announced that its VectorPath accelerator card featuring a Speedster 7t FPGA has been certified by PCI-SIG for PCIe Gen 5 and is the first and only FPGA accelerated CEM add-in card certified for PCIe Gen 5 x16 at 32 gigatransfers per second (GT/s) on the PCI-SIG Integrator's list. VectorPath S7t-VG6 accelerator cards are designed to reduce time to market when developing high-performance compute and acceleration functions for AI, ML, networking and data center applications and are shipping today.

"Achronix continues to drive acceleration in the high-performance FPGA add-in card market," said Craig Petrie, Vice President at BittWare. "Achieving PCI-SIG Gen 5 certification is an important milestone. Our customers can be assured of the highest PCIe bandwidths and have confidence that VectorPath cards will interoperate with Gen 5 servers."

Intel's Programmable Solutions Group today announced that the Intel Agilex 7 with the R-Tile chiplet is shipping production-qualified devices in volume - bringing customers the first FPGA with PCIe 5.0 and CXL capabilities and the only FPGA with hard intellectual property (IP) supporting these interfaces. "Customers are demanding cutting-edge technology that offers the scalability and customization needed to not only efficiently manage current workloads, but also pivot capabilities and functions as their needs evolve. Our Agilex products offer the programmable innovation with the speed, power and capabilities our customers need while providing flexibility and resilience for the future. For example, customers are leveraging R-Tile, with PCIe Gen 5 and CXL, to accelerate software and data analytics, cutting the processing time from hours to minutes," said Shannon Poulin, Intel corporate vice president and general manager of the Programmable Solutions Group.

Faced with time, budget and power constraints, organizations across industries including data center, telecommunications and financial services, turn to FPGAs as flexible, programmable and efficient solutions. Using Agilex 7 with R-Tile, customers can seamlessly connect their FPGAs with processors, such as 4th Gen Intel Xeon Scalable processors, with the highest bandwidth processor interfaces to accelerate targeted data center and high performance computing (HPC) workloads. Agilex 7's configurable and scalable architecture enables customers to quickly deploy customized technology - at scale with hardware speeds based on their specific needs - to reduce overall design costs and development processes and to expedite execution to achieve optimal data center performance.

Introducing Duo - The Higher Energy Analogue System. You've always known what to expect from a video game system. Until now. Duo is an all-in-one reimagining of perhaps the most underappreciated video game systems of all time. Analogue Duo is compatible with nearly every NEC system and game format ever made. TurboGrafx-16. PC Engine. SuperGrafx. TurboGrafx CD. PC Engine CD-ROM. Super Arcade CD-ROM. 1080p. Zero lag. Bluetooth. 2.4 G. Because the last thing a video game system should be is predictable. Completely engineered in FPGA. Analogue OS. No emulation.

We're preserving history with FPGA hardware. Duo is designed with unparalleled compatibility. The core functionality of each system is engineered directly into an Altera Cyclone V, a sophisticated FPGA. We spent thousands of hours engineering each system via FPGA for absolute accuracy. Unlike the knock off and emulation systems that riddle the market today, you'll be experiencing the entire NEC era free of compromises. Duo is designed to preserve video game history, with the respect it deserves.

Tachyum today announced its latest milestone of officially entering the final phase of test and development for the Prodigy Universal Processor. This last stage of Quality Assurance (QA) testing of all necessary ported software on a Field Programmable Gate Array (FPGA) for final testing will ensure the chip is production worthy.

Prodigy is currently running ported software on its software emulation platform. Once all Quality Assurance testing is successfully completed on FPGA, the Prodigy chip will be ready for tape-out this year. This phase of porting and finalizing all necessary software for tape out will ensure that existing applications run seamlessly and deliver industry-leading performance for hyperscale, high-performance computing and artificial intelligence workloads once the Prodigy chip is received from the fabrication house.

The global economy has faced increased inflation risks and downstream inventory corrections in 2H22, which have affected IC design houses faster than wafer foundries, as they are far more sensitive and responsive to market reversals. TrendForce reports that adverse factors such as weak overall consumption, restrictions from China, and the slowdown of corporate IT spending and CSP demand have impacted the revenue performance of the world's top 10 IC design houses in 4Q22, leading to a QoQ decline of 9.2%, or approximately US$33.96 billion.

TrendForce predicts that the revenue of these top 10 companies keep declining—though with a slight convergence—into 1Q23, owing to ongoing inventory corrections across the entire supply chain as well as Q1 being the traditional off-season for consumer demand. Demand will continue to be weak despite new product launches and inventory replenishment in the supply chain.

One of the biggest drawbacks of modern CPUs is that adding more cores doesn't equal more performance in a linear fashion. Parallelism in CPUs offer limited scaling for most applications and even none for some. A South Korean company called Morumi is now taking a stab at solving this problem and wants to develop a CPU that can offer more or less infinite processing scaling, as more cores are added. The company has been around since 2018 and focused on various telecommunications chips, but has now started the development on what it calls every one period parallel processor (EOPPP) technology.

EOPPP is said to distribute data to each of the cores in a CPU before the data is being processed, which is said to be done over a type of mesh network inside the CPU. This is said to allow for an almost unlimited amount of instructions to be handled at once, if the CPU has enough cores. Morumi already has an early 32-core prototype running on an FPGA and in certain tasks the company has seen a tenfold performance increase. It should be noted that this requires software specifically compiled for EOPPP and Moumi is set to release version 1.0 of its compiler later this year. It's still early days, but it'll be interesting to see how this technology develops, but if it's successfully developed, there's also a high chance of Morumi being acquired by someone much bigger that wants to integrate the technology into their own products.

Today, Intel launched Intel Agilex 7 FPGAs with F-Tile, equipped with the fastest field-programmable gate array (FPGA) transceivers available on the market and designed to help customers address challenges across the most bandwidth-intensive areas of the data-centric world, including data centers and high-speed networks. Created with embedded, networking and cloud customers in mind, Intel's new F-Tile-enabled Agilex 7 FPGAs deliver flexible hardware solutions with industry-leading transceiver performance, delivering up to 116 gigabits per second (Gbps) and hardened 400 gigabit Ethernet (GbE) intellectual property (IP).

"Intel's Agilex 7 with F-Tile is loaded with transceivers that deliver more flexibility, bandwidth and data rate performance than any other FPGA on the market today. Together with Intel manufacturing and our supply chain resilience, we're delivering multiple industry-leading products and capabilities that our customers and the industry require to address a broad range of critical business needs," said Shannon Poulin, Intel corporate vice president and general manager of the Programmable Solutions Group.