Back in September, NVIDIA's Jensen Huang said that Moore's Law is dead, but it seems like AMD disagrees with NVIDIA, at least for now. According to an interview with AMD's CTO, Mark Papermaster, AMD still believes that Moore's Law will be alive for another six to eight years. However, AMD no longer believes that transistor density can be doubled every 18 to 24 months, while remaining in the same cost envelope. "I can see exciting new transistor technology for the next - as far as you can really plot these things out - about six to eight years, and it's very, very clear to me the advances that we're going to make to keep improving the transistor technology, but they're more expensive," Papermaster said.

AMD believes we'll see a change in how chips are being designed and put together, with chiplets being the future of semiconductors. Papermaster calls this "a Moore's Law equivalent, meaning that you continue to really double that capability every 18 to 24 months" although it's not exactly Moore's Law in the traditional sense. AMD also appears to be betting heavily on FPGA technology in some of its market segments, for something the company calls adaptive computing. As to how things will play out, time will tell, but with both AMD and Intel going down the chiplet route, albeit in slightly different ways, we should continue to see new innovations from both companies, with or without Moore's Law.

Xilinx Field Programmable Gate Arrays (FPGAs), now part of AMD, are always in demand in the semiconductor industry. Today, AMD has shared a letter to Xilinx customers that the selected FPGA device series will receive an 8-25% price increase. Citing AMD's investment into the supply chain, along with increased prices from the suppliers, Xilinx FPGAs will get more expensive. From January 9, 2023, the cost of the Spartan 6 series will increase by 25%, the price of the Versal series will not increase, and all other Xilinx products will increase by 8%. Interestingly, the older series manufactured on 40-28 nm nodes will increase while the latest Versal series doesn't experience any change.

Regarding lead times, the 16 nm UltraScale+ series, 20 nm UltraScale series, and 28 nm 7 series all take 20 weeks from order to delivery, which will remain until the third quarter of 2023. You can read the entire document below.

Innodisk, a leading global provider of industrial-grade flash storage, DRAM memory and embedded peripherals, has announced its latest step into the AI market, with the launch of EXMU-X261, an FPGA Machine Vision Platform. Powered by AMD's Xilinx Kria K26 SOM, which was designed to enable smart city and smart factory applications, Innodisk's FPGA Machine Vision Platform is set to lead the way for industrial system integrators looking to develop machine vision applications.

Automated defect inspection, a key machine vision application, is an essential technology in modern manufacturing. Automated visual inspection guarantees that the product works as expected and meets specifications. In these cases, it is vital that a fast and highly accurate inspection system is used. Without AI, operators must manually inspect each product, taking an average of three seconds per item. Now, with the help of AI solutions such as Innodisk's FPGA Machine Vision Platform, product inspection in factories can be automated, and the end result is not only faster and cheaper, but can be completely free of human error.

Intel's upcoming Sapphire Rapids processors have faced multiple delays over the past few years. Built on Intel 7 manufacturing process, the CPU is supposed to bring new advances for Intel's clients and significant performance uplifts. However, TrendForce reports that the mass production of Sapphire Rapids processors will be delayed from Q4 of 2022 to the first half of 2023. The reason for this (yet another) delay is that the Sapphire Rapids MCC die is facing a meager yield on Intel 7 manufacturing technology, estimated to be at only 50-60% at the time of writing. Economically, this die-yielding percentage is not profitable for Intel since many dies are turning out to be defective.

This move will stop many OEMs and cloud service providers (CSPs) from rolling out products based on the Sapphire Rapids design and will have to delay it until next year's mass production. On the contrary, AMD is likely to reap the benefits of Intel's delay, and AMD's x86 server market share will jump from 15% in 2022 to 23% in 2023. Given that AMD ships processors with the highest core counts, many companies will opt for AMD's solutions in their data centers. With more companies being concerned by their TCO measures with rising energy costs, favors fall in the hand of single-socket servers.

Alphawave IP (LSE: AWE), a global leader in high-speed connectivity for the world's technology infrastructure, today announced the successful tapeout of its ZeusCORE100 1-112 Gbps NRZ/PAM4 Serialiser-Deserialiser ("SerDes"), Alphawave's first testchip on TSMC's most advanced N3E process. Alphawave IP will be exhibiting this new product alongside its complete portfolio of high-performance IP, chiplet, and custom silicon solutions at the TSMC OIP Forum on October 26 in Santa Clara, CA as the Platinum sponsor.

ZeusCORE100 is Alphawave's most advanced multi-standard-SerDes, supporting extra-long channels over 45dB and the most requested standards such as 800G Ethernet, OIF 112G-CEI, PCIe GEN6, and CXL 3.0. Attendees will be able to visit the Alphawave booth and meet the company's technology experts including members of the recently acquired OpenFive team. OpenFive is a longstanding partner of TSMC through the OIP Value Chain Aggregator (VCA) program. OpenFive is one of a select few companies with an idea-to-silicon methodology in TSMC's latest technologies, and advanced packaging capabilities, enabling access to the most advanced foundry solution available with the best Power-Performance-Area (PPA). With Alphawave's industry-leading IP portfolio and the addition of OpenFive's capabilities, designers can create systems on a chip (SoCs) that pack more compute power into smaller form factors for networking, AI, storage, and high-performance computing (HPC) applications.

Today AMD (NASDAQ: AMD) announced its collaboration with the Energy Sciences Network (ESnet) on the launch of ESnet6, the newest generation of the U.S. Department of Energy's (DOE's) high-performance network dedicated to science. AMD worked closely with ESnet since 2018 to integrate powerful adaptive computing for the smart and programmable network nodes of ESnet6. ESnet6's extreme scale packet monitoring system uses AMD Alveo U280 FPGA-based network-attached accelerator cards at the core network switching nodes. This will enable high-touch packet processing and help improve the accuracy of network monitoring and management to enhance performance. The programmable hardware allows for new capabilities to be added for continuous innovation in the network.

In order to customize AMD Alveo U280 2x100Gb/s accelerators as network interface cards (NIC) for ESnet6, the OpenNIC overlay - developed by AMD - was used to provide standard network-interface and host-attachment hardware, allowing novel and experimental networking functions to be implemented easily on the Alveo card. OpenNIC has since been open-sourced after being successfully used and evolved by ESnet, as well as various leading academic research groups. Also important for rapid innovation by non-hardware experts was the use of the AMD VitisNetP4 development tools for compiling the P4 packet processing language to FPGA hardware.

AMD Alveo U280 cards, using OpenNIC and VitisNetP4, are being deployed on every node of the ESnet6 network. The high-touch approach based on FPGA-accelerated processing allows every packet in the ESnet6 network to be monitored at extremely high transfer rates to enable deep insights into the behavior of the network, as well as helping to rapidly detect and correct problems and hot spots in the network. The Alveo U280 card with OpenNIC platform also supplies the adaptability to allow the continuous roll-out of new capabilities to the end user community as needs evolve over the lifetime of ESnet6.

On Day 2 of Intel Innovation, Intel illustrated how its efforts and investments to foster an open ecosystem catalyze community innovation, from silicon to systems to apps and across all levels of the software stack. Through an expanding array of platforms, tools and solutions, Intel is focused on helping developers become more productive and more capable of realizing their potential for positive social good. The company introduced new tools to support developers in artificial intelligence, security and quantum computing, and announced the first customers of its new Project Amber attestation service.

"We are making good on our software-first strategy by empowering an open ecosystem that will enable us to collectively and continuously innovate," said Intel Chief Technology Officer Greg Lavender. "We are committed members of the developer community and our breadth and depth of hardware and software assets facilitate the scaling of opportunities for all through co-innovation and collaboration."

Flex Logix Technologies, Inc., supplier of high performance and efficient edge AI inference accelerators and the leading supplier of eFPGA IP, today announced the InferX Hawk - a hardware and software-ready Mini-ITX x86 system designed to help customers quickly and easily customize, build and deploy edge and embedded AI systems. The InferX Hawk system includes the Flex Logix InferX X1 AI accelerator chip, AMD Ryzen Embedded R2314 SoC, InferX Runtime software, and the EasyVision platform running Linux or Windows to deliver an integrated low power, high-performance AI system.

The AMD Ryzen Embedded R2314 delivers performance per watt efficiency using "Zen+" core architecture and Radeon Graphics. With the Hawk Mini-ITX solution, customers can save over six months of hardware and software development time, additional system costs and power over NVIDIA and other solutions.

Achronix Semiconductor Corporation, a leader in high-performance FPGAs and embedded FPGA (eFPGA) IP, today announced that their VectorPath accelerator card featuring the Speedster 7t FPGA has been certified by PCI-SIG and added to the CEM Add-In card integrators list supporting PCIe Gen4 x16. The VectorPath S7t-VG6 accelerator card is designed to reduce time to market when developing high-performance compute and acceleration functions for AI, ML, networking and data center applications. The VectorPath accelerator cards are available and shipping today for new orders.

"Achronix is an important, strategic partner for BittWare. The Speedster7t FPGA has an innovative architecture that provides significant differentiation in the high-performance FPGA market segment," said Craig Petrie, VP of sales and marketing at BittWare. "Designers can now use the VectorPath accelerator card in PCIe Gen4-based system with the confidence of PCI-SIG certification."

MIPS, a leading developer of highly scalable RISC processor IP, announced it is working with Intel to accelerate innovation in open computing. As part of this effort, MIPS' eVocore is being incorporated into the new Intel Pathfinder for RISC-V, a platform designed to deliver new capabilities for pre-silicon development. Intel Pathfinder allows new ways for System-on-a-Chip (SoC) architects and system software developers to define new products and pursue pre-silicon software development on RISC-V.

"MIPS is thrilled to be part of the Intel Pathfinder for RISC-V platform, providing high performance cores with support for multi-cluster, multi-core and multi-threading to accelerate innovation," said Desi Banatao, MIPS CEO. "These multiprocessors have unique features and a high level of scalability that make them ideal for compute-intensive tasks across a broad range of markets and applications."

Based on media reports out of Taiwan, TSMC seems to have plenty of customers lined up for its 3 nm node, with Apple being the first customer out the gates when production starts sometime next month. However, TSMC is only expected to start the production with a mere 1,000 wafer starts a month, which seems like a very low figure, especially as this is said to remain unchanged through all of Q4. On the plus side, yields are expected to be better than the initial 5 nm node yields. Full-on mass production for the 3 nm node isn't expected to happen until the second half of 2023 and TSMC will also kick off its N3E node sometime in 2023.

Apart from Apple, major customers for the 3 nm node include AMD, Broadcom, Intel, MediaTek, NVIDIA and Qualcomm. Contrary to earlier reports by TrendForce, it appears that TSMC will continue its rollout of the 3 nm node as previously planned. Apple is expected to produce the A17 smartphone and tablet SoC, as well as advanced versions of the M2, as well as the M3 laptop and desktop processors on the 3 nm node. Intel is still said to be producing its graphics chiplets with TSMC, with the potential for GPU and FPGA products in the future. There's no word on what the other customers are planning to produce on the 3 nm node, but MediaTek and Qualcomm are obviously looking at using the node for future smartphone and tablet SoCs, with AMD and NVIDIA most likely aiming for upcoming GPUs and Broadcom for some kind of HPC related hardware.

SMART Modular Technologies, Inc. ("SMART"), a division of SGH and a global leader in memory solutions, solid-state drives, and hybrid storage announces its new Compute Express Link (CXL) Memory Module, the XMM CXL memory module. SMART's new DDR5 XMM CXL modules helps boost server and data center performance by enabling cache coherent memory to be added behind the CXL interface, further expanding big data processing capabilities beyond the current 8-channel/12-channel limitations of most servers.

The industry adoption of composable serial-attached memory architecture enables a whole new era for the memory module industry. Serial-attached memory adds capacity and bandwidth capabilities beyond main memory DIMM modules. Servers with XMM CXL modules can be dynamically configured for different applications and workloads without being shut down. Memory can be shared across nodes to meet throughput and latency requirements.

BittWare, a Molex company, a leading supplier of enterprise-class accelerators for edge and cloud-computing applications, today introduced new card and server-level solutions featuring Intel Agilex FPGAs. The new BittWare IA-860m helps customers alleviate memory-bound application workloads by leveraging up to 32 GB of HBM2E in-package memory and 16-lanes of PCIe 5.0 (with CXL upgrade option). BittWare also added new Intel Agilex I-Series FPGA-based products with the introduction of the IA-440i and IA-640i accelerators, which support high-performance interfaces, including 400G Ethernet and PCIe 5.0 (CXL option). These newest models complement BittWare's existing lineup of Intel Agilex F-Series products to comprise one of the broadest portfolios of Intel Agilex FPGA-based offerings on the market. This announcement reinforces BittWare's commitment to addressing ever-increasing demands of high-performance compute, storage, network and sensor processing applications.

"BittWare is excited to apply Intel's advanced technology to solve increasingly difficult application problems, quickly and at low risk," said Craig Petrie, vice president, Sales and Marketing of BittWare. "Our longstanding collaboration with Intel, expertise with the latest development tools, including OneAPI, as well as alignment with Molex's global supply chain and manufacturing capabilities enable BittWare to reduce development time by 12-to-18 months while ensuring smooth transitions from proof-of-concept to volume product deployment."

GIGABYTE Technology, an industry leader in high-performance servers and workstations, today became the first-to-market with a dual-socket motherboard, MP72-HB0, that supports up to 256 Arm cores, making it ideal for cloud native workloads. Also, the launch includes two more servers, G242-P35 and G242-P36, to offer up to 120 TB of NVMe (Gen4) storage capacity paired with Ampere Altra or Ampere Altra Max processors. These GPU-centric servers and motherboard will quickly find a home with hyperscaler and cloud workloads. Altra Max processors have predictable high-performance by having a high core count CPU with one thread per core, 128 threads on a monolithic 128-core chip. Multi-socket support and a wealth of PCIe/CCIX lanes make the platform highly scalable. At the same time, there is industry-leading power efficiency/core, which is highly sought after by our customers.

Hot Chips 34, the upcoming semiconductor conference from Sunday, August 21 to Tuesday, August 23, 2022, will feature many significant contributions from folks like Intel, AMD, Tesla, and NVIDIA. Today, thanks to Intel's registration at the event, we discovered that the company would present its work on Meteor Lake and Arrow Lake processors with the novel Foveros 3D packaging. The all-virtual presentation from Intel will include talks about Ponte Vecchio GPU and its architecture, system, and software; Meteorlake and Arrowlake 3D Client Architecture Platform with Foveros; and some Xeon D and FPGA presentations. You can see the official website here for a complete list of upcoming talks.

As a little reminder, Meteor Lake is supposed to arrive next year, replacing the upcoming Raptor Lake design, and it has already ahs been pictured, which you can see below. The presentation will be recorded and all content posted on Hot Chips's website for non-attendees to catch up on.

Today AMD announced the Kria KR260 Robotics Starter Kit, the latest addition to the Kria portfolio of adaptive system-on-modules (SOMs) and developer kits. A scalable and out-of-the-box development platform for robotics, the Kria KR260 offers a seamless path to production deployment with the existing Kria K26 adaptive SOMs. With native ROS 2 support, the standard framework for robotics application development, and pre-built interfaces for robotics and industrial solutions, the new SOM starter kit enables rapid development of hardware-accelerated applications for robotics, machine vision and industrial communication and control.

"The Kria KR260 Robotics Starter Kits builds on the success of our Kria SOMs and KV260 Vision AI Starter Kit for AI and embedded developers, providing roboticists with a complete, out-of-the-box solution for this rapidly growing application space," said Chetan Khona, senior director of Industrial, Vision, Healthcare and Sciences Markets at AMD. "Roboticists will now be able to work in their standard development environment on a platform that has all the interfaces and capabilities needed to be up and running in less than an hour. The KR260 Starter Kit is an ideal platform to accelerate robotics innovation and easily take ideas to production at scale."

Samsung Electronics, the world leader in advanced memory technology, today announced its development of the industry's first 512-gigabyte (GB) Compute Express Link (CXL) DRAM, taking an important step toward the commercialization of CXL which will enable extremely high memory capacity with low latency in IT systems. Since introducing the industry's first CXL DRAM prototype with a field-programmable gate array (FPGA) controller in May 2021, Samsung has been working closely with data center, enterprise server and chipset companies to develop an improved, customizable CXL device.

The new CXL DRAM is built with an application-specific integrated circuit (ASIC) CXL controller and is the first to pack 512 GB of DDR5 DRAM, featuring four times the memory capacity and one-fifth the system latency over the previous Samsung CXL offering. "CXL DRAM will become a critical turning point for future computing structures by substantially advancing artificial intelligence (AI) and big data services, as we aggressively expand its usage in next-generation memory architectures including software-defined memory (SDM)," said Cheolmin Park, Vice President of Memory Global Sales & Marketing at Samsung Electronics, and Director of the CXL Consortium. "Samsung will continue to collaborate across the industry to develop and standardize CXL memory solutions, while fostering an increasingly solid ecosystem."

SMART Modular Technologies, Inc. ("SMART"), a division of SGH and a global leader in memory solutions, solid-state drives, and hybrid storage products, announces its new SMART Kestral PCIe Optane Memory Add-in-Card (AIC), which is able to add up to 2 TB of Optane Memory expansion on a PCIe-Gen4-x16 or PCIe-Gen3-x16 interface independent of the motherboard CPU. SMART's Kestral AICs accelerate selected algorithms by offloading software-defined storage functions from the host CPU to the Intel FPGA on the AIC. SMART's Kestral memory AICs are ideal for hyperscale, data center, and other similar environments that run large memory applications, and would benefit from memory acceleration or system acceleration through computational storage.

"With the advancement of new interconnect standards such as CXL and OpenCAPI, SMART's new family of SMART Kestral AICs addresses the industry's need for a variety of new memory module form factors and interfaces for memory expansion and acceleration," stated Mike Rubino, SMART Modular's vice president of engineering. "SMART is able to leverage our many years of experience in developing and productizing controller-based memory solutions to meet today's emerging and continually evolving memory add-on needs of server and storage system customers."

With the exponential growth of data in the world today, coupled with the shift from centralized clusters of compute and data storage to a more distributed architecture that processes data everywhere—in the cloud, at the edge, and at all points in between—Field-Programmable Gate Arrays (FPGAs) are taking on an increasingly important role in modern applications from the data center to the network to the edge. The flexibility, power efficiency, massively parallel architecture, and huge input/output (I/O) bandwidth make FPGAs attractive for accelerating a wide range of tasks from high-performance computing (HPC) to storage and networking. Many of these applications put enormous demands on memory, including capacity, bandwidth, latency and power efficiency.

To handle these high-demand applications, Intel today introduced product details for the Intel Agilex M-Series FPGAs, built on Intel 7 process technology, the industry's highest memory bandwidth FPGAs with in-package HBM DRAM. The Intel Agilex M-Series incorporates several new functional innovations and features that provide the industry with the high-speed networking, computing and memory acceleration required to meet ever-more ambitious performance and capability goals for networks, cloud and embedded edge applications.

AMD (NASDAQ: AMD) today announced the completion of its acquisition of Xilinx in an all-stock transaction. The acquisition, originally announced on October 27, 2020, creates the industry's high-performance and adaptive computing leader with significantly expanded scale and the strongest portfolio of leadership computing, graphics and adaptive SoC products. AMD expects the acquisition to be accretive to non-GAAP margins, non-GAAP EPS and free cash flow generation in the first year.

"The acquisition of Xilinx brings together a highly complementary set of products, customers and markets combined with differentiated IP and world-class talent to create the industry's high-performance and adaptive computing leader," said AMD President and CEO Dr. Lisa Su. "Xilinx offers industry-leading FPGAs, adaptive SoCs, AI engines and software expertise that enable AMD to offer the strongest portfolio of high-performance and adaptive computing solutions in the industry and capture a larger share of the approximately $135 billion market opportunity we see across cloud, edge and intelligent devices."

AMD (NASDAQ: AMD) today announced that it has received approval from all necessary authorities to proceed with the acquisition of Xilinx, Inc. (NASDAQ: XLNX). With the exception of the remaining customary closing conditions, all conditions to the transaction closing have been satisfied and the company expects the transaction to close on or about February 14, 2022.

AMD announced its intention to acquire Xilinx in an all-stock transaction on October 27, 2020. The transaction brings together two industry leaders with complementary product portfolios and customers, combining CPUs, GPUs, FPGAs, Adaptive SoCs and deep software expertise to enable leadership computing platforms for cloud, edge and intelligent end devices.

Rambus Inc., a premier chip and silicon IP provider making data faster and safer, today announced the availability of its PCI Express (PCIe ) 6.0 Controller. The PCIe specification is the interconnect of choice across a broad landscape of data-intensive markets including data center, AI/ML, HPC, automotive, IoT, defense and aerospace. Optimized for power, area and latency, the Rambus PCIe 6.0 controller delivers data rates up to 64 Gigatransfers per second (GT/s) for high-performance applications. In addition, the controller provides state-of-the-art security with an Integrity and Data Encryption (IDE) engine that monitors and protects PCIe links against physical attacks.

"The rapid advancement of AI/ML and data-intensive workloads requires that we continue to provide higher data rate solutions with best-in-class latency, power and area," said Sean Fan, chief operating officer at Rambus. "As the latest addition to our portfolio of industry-leading interface IP, our PCIe 6.0 Controller offers customers an easy to integrate solution that delivers both performance and security for advanced SoCs and FPGAs."

Intel is reportedly looking to disrupt the cryptocurrency mining hardware business with fixed-function ASICs that either outperform GPUs, or end up with lower enough performance/Watt or performance/Dollar to take make GPUs unviable as a mining hardware option. The company is planning to unveil its first such product, codenamed "Bonanza Mine," an ASIC purpose-built for Bitcoin mining.

Since it's an ASIC, "Bonanza Mine" doesn't appear to be a re-purposed Xe-HPC processor, or even an FPGA that's been programmed to mine Bitcoin. It's a purpose-built piece of silicon. Intel will unveil "Bonanza Mine" at the 2022 ISSCC Conference. It describes the chip as being an "ultra low-voltage energy-efficient Bitcoin mining ASIC," putting power-guzzling GPUs on notice. If Intel can clinch Bitcoin with "Bonanza Lake," designing ASICs for other cryptocurrencies is straightforward. With demand from crypto-miners slashed, graphics cards will see a tremendous fall in value, forcing scalpers to cut prices.

Driven by forces such as the pandemic, geopolitics, and the digital transformation of everyday life, there has been a shortage of global foundry production capacity for nearly two years and shortages have been especially severe for mature 1Xnm~180nm nodes, according to TrendForce's investigations. Although all foundries are furiously increasing capital expenditures to expand capacity, unrealized future expansion does not ease existing supply issues. In addition, the uneven distribution of supply chain resources that has exacerbated the shortage of parts and components has yet to be definitively alleviated. Circumstances as a whole will continue affecting shipments of related whole devices. Only the PC category is expected to emerge largely unscathed in 1Q22.

Moving into 1Q22, TrendForce states, due to the limited increase in production capacity, the market's supply situation is expected to be approximately the same as in 4Q21. However, some end products have entered their traditional off-season cycle and the slowdown in demand momentum is expected to alleviate the immediate pressure on OEMs and ODMs regarding supply chain stocking.

Intel today released oneAPI 2022 toolkits. Newly enhanced toolkits expand cross-architecture features to provide developers greater utility and architectural choice to accelerate computing. "I am impressed by the breadth of more than 900 technical improvements that the oneAPI software engineering team has done to accelerate development time and performance for critical application workloads across Intel's client and server CPUs and GPUs. The rich set of oneAPI technologies conforms to key industry standards, with deep technical innovations that enable applications developers to obtain the best possible run-time performance from the cloud to the edge. Multi-language support and cross-architecture performance acceleration are ready today in our oneAPI 2022 release to further enable programmer productivity on Intel platforms," said Greg Lavender, Intel chief technology officer, senior vice president and general manager of the Software and Advanced Technology Group.

New capabilities include the world's first unified compiler implementing C++, SYCL and Fortran, data parallel Python for CPUs and GPUs, advanced accelerator performance modeling and tuning, and performance acceleration for AI and ray tracing visualization workloads. The oneAPI cross-architecture programming model provides developers with tools that aim to improve the productivity and velocity of code development when building cross-architecture applications.