Samsung Electronics, the world leader in advanced memory technology, today announced its development of the industry's first 512-gigabyte (GB) Compute Express Link (CXL) DRAM, taking an important step toward the commercialization of CXL which will enable extremely high memory capacity with low latency in IT systems. Since introducing the industry's first CXL DRAM prototype with a field-programmable gate array (FPGA) controller in May 2021, Samsung has been working closely with data center, enterprise server and chipset companies to develop an improved, customizable CXL device.

The new CXL DRAM is built with an application-specific integrated circuit (ASIC) CXL controller and is the first to pack 512 GB of DDR5 DRAM, featuring four times the memory capacity and one-fifth the system latency over the previous Samsung CXL offering. "CXL DRAM will become a critical turning point for future computing structures by substantially advancing artificial intelligence (AI) and big data services, as we aggressively expand its usage in next-generation memory architectures including software-defined memory (SDM)," said Cheolmin Park, Vice President of Memory Global Sales & Marketing at Samsung Electronics, and Director of the CXL Consortium. "Samsung will continue to collaborate across the industry to develop and standardize CXL memory solutions, while fostering an increasingly solid ecosystem."

SMART Modular Technologies, Inc. ("SMART"), a division of SGH and a global leader in memory solutions, solid-state drives, and hybrid storage products, announces its new SMART Kestral PCIe Optane Memory Add-in-Card (AIC), which is able to add up to 2 TB of Optane Memory expansion on a PCIe-Gen4-x16 or PCIe-Gen3-x16 interface independent of the motherboard CPU. SMART's Kestral AICs accelerate selected algorithms by offloading software-defined storage functions from the host CPU to the Intel FPGA on the AIC. SMART's Kestral memory AICs are ideal for hyperscale, data center, and other similar environments that run large memory applications, and would benefit from memory acceleration or system acceleration through computational storage.

"With the advancement of new interconnect standards such as CXL and OpenCAPI, SMART's new family of SMART Kestral AICs addresses the industry's need for a variety of new memory module form factors and interfaces for memory expansion and acceleration," stated Mike Rubino, SMART Modular's vice president of engineering. "SMART is able to leverage our many years of experience in developing and productizing controller-based memory solutions to meet today's emerging and continually evolving memory add-on needs of server and storage system customers."

With the exponential growth of data in the world today, coupled with the shift from centralized clusters of compute and data storage to a more distributed architecture that processes data everywhere—in the cloud, at the edge, and at all points in between—Field-Programmable Gate Arrays (FPGAs) are taking on an increasingly important role in modern applications from the data center to the network to the edge. The flexibility, power efficiency, massively parallel architecture, and huge input/output (I/O) bandwidth make FPGAs attractive for accelerating a wide range of tasks from high-performance computing (HPC) to storage and networking. Many of these applications put enormous demands on memory, including capacity, bandwidth, latency and power efficiency.

To handle these high-demand applications, Intel today introduced product details for the Intel Agilex M-Series FPGAs, built on Intel 7 process technology, the industry's highest memory bandwidth FPGAs with in-package HBM DRAM. The Intel Agilex M-Series incorporates several new functional innovations and features that provide the industry with the high-speed networking, computing and memory acceleration required to meet ever-more ambitious performance and capability goals for networks, cloud and embedded edge applications.

AMD (NASDAQ: AMD) today announced the completion of its acquisition of Xilinx in an all-stock transaction. The acquisition, originally announced on October 27, 2020, creates the industry's high-performance and adaptive computing leader with significantly expanded scale and the strongest portfolio of leadership computing, graphics and adaptive SoC products. AMD expects the acquisition to be accretive to non-GAAP margins, non-GAAP EPS and free cash flow generation in the first year.

"The acquisition of Xilinx brings together a highly complementary set of products, customers and markets combined with differentiated IP and world-class talent to create the industry's high-performance and adaptive computing leader," said AMD President and CEO Dr. Lisa Su. "Xilinx offers industry-leading FPGAs, adaptive SoCs, AI engines and software expertise that enable AMD to offer the strongest portfolio of high-performance and adaptive computing solutions in the industry and capture a larger share of the approximately $135 billion market opportunity we see across cloud, edge and intelligent devices."

AMD (NASDAQ: AMD) today announced that it has received approval from all necessary authorities to proceed with the acquisition of Xilinx, Inc. (NASDAQ: XLNX). With the exception of the remaining customary closing conditions, all conditions to the transaction closing have been satisfied and the company expects the transaction to close on or about February 14, 2022.

AMD announced its intention to acquire Xilinx in an all-stock transaction on October 27, 2020. The transaction brings together two industry leaders with complementary product portfolios and customers, combining CPUs, GPUs, FPGAs, Adaptive SoCs and deep software expertise to enable leadership computing platforms for cloud, edge and intelligent end devices.

Rambus Inc., a premier chip and silicon IP provider making data faster and safer, today announced the availability of its PCI Express (PCIe ) 6.0 Controller. The PCIe specification is the interconnect of choice across a broad landscape of data-intensive markets including data center, AI/ML, HPC, automotive, IoT, defense and aerospace. Optimized for power, area and latency, the Rambus PCIe 6.0 controller delivers data rates up to 64 Gigatransfers per second (GT/s) for high-performance applications. In addition, the controller provides state-of-the-art security with an Integrity and Data Encryption (IDE) engine that monitors and protects PCIe links against physical attacks.

"The rapid advancement of AI/ML and data-intensive workloads requires that we continue to provide higher data rate solutions with best-in-class latency, power and area," said Sean Fan, chief operating officer at Rambus. "As the latest addition to our portfolio of industry-leading interface IP, our PCIe 6.0 Controller offers customers an easy to integrate solution that delivers both performance and security for advanced SoCs and FPGAs."

Intel is reportedly looking to disrupt the cryptocurrency mining hardware business with fixed-function ASICs that either outperform GPUs, or end up with lower enough performance/Watt or performance/Dollar to take make GPUs unviable as a mining hardware option. The company is planning to unveil its first such product, codenamed "Bonanza Mine," an ASIC purpose-built for Bitcoin mining.

Since it's an ASIC, "Bonanza Mine" doesn't appear to be a re-purposed Xe-HPC processor, or even an FPGA that's been programmed to mine Bitcoin. It's a purpose-built piece of silicon. Intel will unveil "Bonanza Mine" at the 2022 ISSCC Conference. It describes the chip as being an "ultra low-voltage energy-efficient Bitcoin mining ASIC," putting power-guzzling GPUs on notice. If Intel can clinch Bitcoin with "Bonanza Lake," designing ASICs for other cryptocurrencies is straightforward. With demand from crypto-miners slashed, graphics cards will see a tremendous fall in value, forcing scalpers to cut prices.

Driven by forces such as the pandemic, geopolitics, and the digital transformation of everyday life, there has been a shortage of global foundry production capacity for nearly two years and shortages have been especially severe for mature 1Xnm~180nm nodes, according to TrendForce's investigations. Although all foundries are furiously increasing capital expenditures to expand capacity, unrealized future expansion does not ease existing supply issues. In addition, the uneven distribution of supply chain resources that has exacerbated the shortage of parts and components has yet to be definitively alleviated. Circumstances as a whole will continue affecting shipments of related whole devices. Only the PC category is expected to emerge largely unscathed in 1Q22.

Moving into 1Q22, TrendForce states, due to the limited increase in production capacity, the market's supply situation is expected to be approximately the same as in 4Q21. However, some end products have entered their traditional off-season cycle and the slowdown in demand momentum is expected to alleviate the immediate pressure on OEMs and ODMs regarding supply chain stocking.

Intel today released oneAPI 2022 toolkits. Newly enhanced toolkits expand cross-architecture features to provide developers greater utility and architectural choice to accelerate computing. "I am impressed by the breadth of more than 900 technical improvements that the oneAPI software engineering team has done to accelerate development time and performance for critical application workloads across Intel's client and server CPUs and GPUs. The rich set of oneAPI technologies conforms to key industry standards, with deep technical innovations that enable applications developers to obtain the best possible run-time performance from the cloud to the edge. Multi-language support and cross-architecture performance acceleration are ready today in our oneAPI 2022 release to further enable programmer productivity on Intel platforms," said Greg Lavender, Intel chief technology officer, senior vice president and general manager of the Software and Advanced Technology Group.

New capabilities include the world's first unified compiler implementing C++, SYCL and Fortran, data parallel Python for CPUs and GPUs, advanced accelerator performance modeling and tuning, and performance acceleration for AI and ray tracing visualization workloads. The oneAPI cross-architecture programming model provides developers with tools that aim to improve the productivity and velocity of code development when building cross-architecture applications.

Optical computing has been the research topic of many startups and tech companies like Intel and IBM, searching for the practical approach to bring a new way of computing. However, the most innovative solutions often come out of startups and today is no exception. According to the report from EETimes, optical computing startup Lightelligence has developed a processor that outperforms regular GPUs by 100 times in calculating some of the most challenging mathematical problems. As the report indicates, the Photonic Arithmetic Computing Engine (PACE) from Lightelligence manages to outperform regular GPUs, like NVIDIA's GeForce RTX 3080, by almost 100 times in the NP-complete class of problems.

More precisely, the PACE accelerator was tackling the Ising model, an example of a thermodynamic system used for understanding phase transitions, and it achieved some impressive results. Compared to the RTX 3080, it reached 100 times greater speed-up. All of that was performed using 12,000 optical devices integrated onto a circuit and running at 1 GHz frequency. Compared to the purpose-built Toshiba's simulated bifurcation machine based on FPGAs, the PACE still outperforms this system designed to tackle the Ising mathematical computation by 25 times. The PACE chip uses standard silicon photonics integration of Mach-Zehnder Interferometer (MZI) for computing and MEMS to change the waveguide shape in the MZI.

Xilinx, Inc., the leader in adaptive computing, today at the SC21 supercomputing conference introduced the Alveo U55C data center accelerator card and a new standards-based, API-driven clustering solution for deploying FPGAs at massive scale. The Alveo U55C accelerator brings superior performance-per-watt to high performance computing (HPC) and database workloads and easily scales through the Xilinx HPC clustering solution.

Purpose-built for HPC and big data workloads, the new Alveo U55C card is the company's most powerful Alveo accelerator card ever, offering the highest compute density and HBM capacity in the Alveo accelerator portfolio. Together with the new Xilinx RoCE v2-based clustering solution, a broad spectrum of customers with large-scale compute workloads can now implement powerful FPGA-based HPC clustering using their existing data center infrastructure and network.

While the global electronics supply chain experienced a chip shortage, the corresponding shortage of foundry capacities also led various foundries to raise their quotes, resulting in an over 20% YoY increase in the total annual revenues of the top 10 foundries for both 2020 and 2021, according to TrendForce's latest investigations. The top 10 foundries' annual revenue for 2021 is now expected to surpass US$100 billion. As TSMC leads yet another round of price hikes across the industry, annual foundry revenue for 2022 will likely reach US$117.69 billion, a 13.3% YoY increase.

TrendForce indicates that the combined CAPEX of the top 10 foundries surpassed US$50 billion in 2021, a 43% YoY increase. As new fab constructions and equipment move-ins gradually conclude next year, their combined CAPEX for 2022 is expected to undergo a 15% YoY increase and fall within the US$50-60 billion range. In addition, now that TSMC has officially announced the establishment of a new fab in Japan, total foundry CAPEX will likely increase further next year. TrendForce expects the foundry industry's total 8-inch and 12-inch wafer capacities to increase by 6% YoY and 14% YoY next year, respectively.

Phison Electronics Corp., a global leader in NAND flash controller integrated circuits and storage solutions, today announced its technology development of PCIe Gen 5 customizable SSD solutions for Enterprise and Client SSDs. Phison customers from Hyperscale Cloud Data Centers to PC Gaming demand the fastest performance motherboards and SSD storage devices. Their business models require that they transition to the newest technologies when they first become available, usually well before the rest of the software and hardware ecosystem has been established.

Phison is enabling our valued customers with PCIe Gen 5 SSD platforms that may be customized to perform optimally in their applications. Customers who are early adopters of PCIe Gen 5 SSDs will benefit from superior specifications and first to market leadership revenue. The data rate specification for PCIe Gen 5 at 32 Gb/s is twice the lane speed of PCIe Gen 4 at 16 Gb/s, enabling either double the overall performance, or offering similar performance, but using half as many lanes as PCIe Gen 4.

Tachyum Inc. today announced that it has successfully executed the Linux boot process on the field-programmable gate array (FPGA) prototype of its Prodigy Universal Processor, in 2 months after taking delivery of the IO motherboard from manufacturing. This achievement proves the stability of the Prodigy emulation system and allows the company to move forward with additional testing before advancing to tape out.

Tachyum engineers were able to perform the Linux boot, execute a short user-mode program and shutdown the system on the fully functional FPGA emulation system. Not only does this successful test prove that the basic processor is stable, but interrupts, exceptions, timing, and system-mode transitions are, as well. This is a key milestone, which dramatically reduces risk, as booting and running large and complex pieces of software like Linux reliably on the Tachyum FPGA processor prototype shows that verification and hardware stability are past the most difficult turning point, and it is now obvious that verification and testing should successfully complete in the coming months. Designers are now shifting their attention to debug and verification processes, running hundreds of trillions of test cycles over the next few months, and running large scale user mode applications with compatibility testing to get the processor to production quality.

Lattice Semiconductor, the low power programmable leader, today expanded its growing portfolio of automotive products with the announcement of versions of the Lattice Certus -NX FPGA family optimized for infotainment, advanced driver assistance systems (ADAS), and safety-focused applications. Built on the Lattice Nexus platform, these new Certus-NX devices combine automotive-grade features with best-in-class I/O density, power efficiency, small size, reliability, instant-on performance, and support for fast PCI Express (PCIe) and Gigabit Ethernet interfaces.

"Demand for automotive semiconductors is increasing as the ongoing trends towards automotive system electrification, autonomy, and connectivity have manufacturers looking for ways to deliver the advanced features and user experiences drivers are looking for in their next vehicle," said Jay Aggarwal, Director of Silicon Product Marketing, Lattice Semiconductor. "With class-leading performance and power efficiency, support for popular I/O standards in a small form factor, and high reliability, our Certus-NX general purpose FPGAs make a compelling silicon platform for the next-generation automotive applications car makers are eager to provide to their customers."

While the server industry transitions to the latest generation of processors based on the x86 platform, the Intel Ice Lake and AMD Milan CPUs entered mass production earlier this year and were shipped to certain customers, such as North American CSPs and telecommunication companies, at a low volume in 1Q21, according to TrendForce's latest investigations. These processors are expected to begin seeing widespread adoption in the server market in 3Q21. TrendForce believes that Ice Lake represents a step-up in computing performance from the previous generation due to its higher scalability and support for more memory channels. On the other hand, the new normal that emerged in the post-pandemic era is expected to drive clients in the server sector to partially migrate to the Ice Lake platform, whose share in the server market is expected to surpass 30% in 4Q21.

The ramp-up of the Intel Ice Lake and AMD Milan processors is expected to not only propel growths in server shipment for two consecutive quarters from 2Q21 to 3Q21, but also drive up the share of high-density products in North American hyperscalers' enterprise SSD purchases, according to TrendForce's latest investigations. In China, procurement activities by domestic hyperscalers Alibaba and ByteDance are expected to increase on a quarterly basis as well. With the labor force gradually returning to physical offices, enterprises are now placing an increasing number of IT equipment orders, including servers, compared to 1H21. Hence, global enterprise SSD procurement capacity is expected to increase by 7% QoQ in 3Q21. Ongoing shortages in foundry capacities, however, have led to the supply of SSD components lagging behind demand. At the same time, enterprise SSD suppliers are aggressively raising the share of large-density products in their offerings in an attempt to optimize their product lines' profitability. Taking account of these factors, TrendForce expects contract prices of enterprise SSDs to undergo a staggering 15% QoQ increase for 3Q21.

Intel Corporation today reported second-quarter 2021 financial results. "There's never been a more exciting time to be in the semiconductor industry. The digitization of everything continues to accelerate, creating a vast growth opportunity for us and our customers across core and emerging business areas. With our scale and renewed focus on both innovation and execution, we are uniquely positioned to capitalize on this opportunity, which I believe is merely the beginning of what will be a decade of sustained growth across the industry," said Pat Gelsinger, Intel CEO. "Our second-quarter results show that our momentum is building, our execution is improving, and customers continue to choose us for leadership products."

Xilinx, Inc., the leader in adaptive computing, today introduced the Versal HBM adaptive compute acceleration platform (ACAP), the newest series in the Versal portfolio. The Versal HBM series enables the convergence of fast memory, secure connectivity, and adaptable compute in a single platform. Versal HBM ACAPs integrate the most advanced HBM2E DRAM, providing 820 GB/s of throughput and 32 GB of capacity for 8X more memory bandwidth and 63% lower power than DDR5 implementations. The Versal HBM series is architected to keep up with the higher memory needs of the most compute intensive, memory bound applications for data center, wired networking, test and measurement, and aerospace and defense.

"Many real-time, high-performance applications are critically bottlenecked by memory bandwidth and operate at the edge of their power and thermal limits," said Sumit Shah, senior director, Product Management and Marketing at Xilinx. "The Versal HBM series eliminates those bottlenecks to provide our customers with a solution that delivers significantly higher performance and reduced system power, latency, form factor, and total cost of ownership for data center and network operators."

AMD's ambitious acquisition of Xilinx, makers of cutting-edge FPGAs, has been approved by the UK Competition and Markets Authority. This would go down as AMD's biggest tech acquisition, as the company is forking out USD $35 billion in stock. If it goes through, the AMD-Xilinix combine will see current AMD shareholders own 74% of the company, and current Xilinx shareholders with the other 26%. Both companies announced in April 2021 that their shareholders "overwhelmingly" approved of the deal. The Xilinx buyout by AMD isn't too far behind in terms of value, to NVIDIA's ambitious $40 billion bid to acquire Arm Holdings.Many Thanks to DeathtoGnomes for the tip

Intel CEO Pat Gelsinger announced the addition of two new technology leaders to its executive leadership team, as well as several changes to Intel business units. Current Intel executives Sandra Rivera and Raja Koduri will each take on new senior leadership roles, and technology industry veterans Nick McKeown and Greg Lavender will join the company.

"Since re-joining Intel, I have been impressed with the depth of talent and incredible innovation throughout the company, but we must move faster to fulfill our ambitions," said Gelsinger. "By putting Sandra, Raja, Nick and Greg - with their decades of technology expertise - at the forefront of some of our most essential work, we will sharpen our focus and execution, accelerate innovation, and unleash the deep well of talent across the company."

Today as part of its MWC 2021 virtual event, Intel showcased multiple groundbreaking network deployments powered by its technology and unveiled the Intel Network Platform. It also announced new additions to its leading product portfolio for 5G and edge, reaffirming its position as the leading network silicon provider. The company confirmed its leadership in virtual radio access network (vRAN), noting nearly all commercial vRAN deployments are running on Intel technology. In the years ahead, it sees global vRAN base station deployments scale, from hundreds to "hundreds of thousands," and eventually millions.

"Network transformation is critical to unleash the possibilities of 5G and maximize the rise of the edge to create new and better business outcomes for our customers across the globe. As the leading network silicon provider, we have been driving this shift to virtualizing the core to access to edge, and implementing edge computing capabilities with our decade of experience, to power our society's digital revolution," said Dan Rodriguez, Intel corporate vice president, Network Platforms Group.

Today during the Six Five Summit, Intel unveiled its vision for the infrastructure processing unit (IPU), a programmable networking device designed to enable cloud and communication service providers to reduce overhead and free up performance for central processing units (CPUs). With an IPU, customers will better utilize resources with a secure, programmable, stable solution that enables them to balance processing and storage.

"The IPU is a new category of technologies and is one of the strategic pillars of our cloud strategy. It expands upon our SmartNIC capabilities and is designed to address the complexity and inefficiencies in the modern data center. At Intel, we are dedicated to creating solutions and innovating alongside our customer and partners—the IPU exemplifies this collaboration," said Guido Appenzeller, chief technology officer, Data Platforms Group, Intel.

Tachyum Inc. today announced that it has taken delivery of an IO motherboard for its Prodigy Universal Processor hardware emulator from manufacturing. This provides the company with a complete system prototype integrating CPU, memory, PCI Express, networking and BMC management subsystems when connected to the previously announced field-programmable gate array (FPGA) emulation system board.

The Tachyum Prodigy FPGA DDR-IO Board connects to the Prodigy FPGA CPU Board to provide memory and IO connectivity for the FPGA-based CPU tiles. The fully functional Prodigy emulation system is now ready for further build out, including Linux boot and incorporation of additional test chips. It is available to customers to perform early testing and software development prior to a full four-socket reference design motherboard, which is expected to be available Q4 2021.

British competition regulator Competition and Markets Authority (CMA) on Monday, launched an enquiry into the ramifications of AMD's buy-out of FPGA maker Xilinx. The agency is soliciting opinions from the public on whether the $35 billion all-stock purchase will make goods and services less competitive for the UK. Unlike NVIDIA's Arm buyout the Xilinx acquisition is seeing no opposition from tech-giants. The Register notes that AMD could combine Xilinx's FPGAs with its x86 CPU and RDNA SIMD to create highly customizable HPC accelerators. AMD president Dr Lisa Su said "By combining our world-class engineering team and deep domain expertise, we will create an industry leader with the vision, talent and scale to define the future of high performance computing."