In another breakthrough in single-board computing, AAEON has released the de next-RAP8, the world's smallest board featuring embedded 13th Generation Intel Core Processors, measuring just 3.31" x 2.17" (84 mm x 55 mm). Available with a choice of the Intel Core i7-1365UE, Intel Core i5-1335UE, or Intel Core i3-1315UE, all at 15 W, the de next-RAP8 can leverage up to 10 cores and 12 threads. The board also boasts up to 16 GB of LPDDR5x system memory and Intel Iris Xe graphics.

Designed for drone and robotics applications, the de next-RAP8 hosts two Intel-based RJ-45 ports, one for 2.5GbE and one for 1GbE speeds, alongside two USB 3.2 Gen 2 Type-A ports on its rear I/O. Rounding off its physical ports are an HDMI 1.2a port and a 12 V DC Jack. The board adds to these with a relatively dense set of pin headers and connectors. Given the board's target application fields being robotics and drones, the most notable inclusions are an 8-bit GPIO, four USB 2.0, and two RS-232/422/285 signals, all of which are available via a 40-pin header on the board's CPU-side. For more industrial use, the de next-RAP8 offers SMBus/I2C as an optional function.

AMD at its 2025 Advancing AI event name-dropped its two next generations of EPYC server processors to succeed the current EPYC "Turin" powered by Zen 5 microarchitecture. 2026 will see AMD debut the Zen 6 microarchitecture, and its main workhorse for the server segment will be EPYC "Venice." This processor will likely see a generational increase in CPU core counts, increased IPC from the full-sized Zen 6 cores, support for newer ISA, and an updated I/O package. AMD is looking to pack "Venice" with up to 256 CPU cores per package.

AMD is looking to increase the CPU core count per CCD (CPU complex die) with "Zen 6." The company plans to build these CCDs on the 2 nm TSMC N2 process node. The sIOD (server I/O die) of "Venice" implements PCI-Express Gen 6 for a generational doubling in bandwidth to GPUs, SSDs, and NICs. AMD is also claiming memory bandwidth as high as 1.6 TB/s. There are a couple of ways they can go about achieving this, either by increasing the memory clock speeds, or giving the processor a 16-channel DDR5 memory interface, up from the current 12-channel DDR5. The company could also add support for multichannel DIMM standards, such as MR-DIMM and MCR-DIMMs. All said and done, AMD is claiming a 70% increase in multithreaded performance over the current EPYC "Turin," which we assume is comparing the highest performing part to its next-gen successor.

InstLatX64 has spent a significant chunk of time investigating AMD web presences; last month they unearthed various upcoming "Zen 5" processor families. This morning, a couple of mysterious CPU identifiers—"B50F00, B90F00, BA0F00, and BC0F00"—were highlighted in a social media post. According to screen-captured information, Team Red's Linux team seems to be patching in support for "Zen 6" technologies—InstLatX64 believes that the "B50F00" ID and internal "Weisshorn" codename indicate a successor to AMD's current-gen EPYC "Turin" server-grade processor series (known internally as "Breithorn"). Earlier in the month, a set of AIDA64 Beta update release notes mentioned preliminary support for "next-gen AMD desktop, server and mobile processors."

In a mid-April (2025) announcement, Dr. Lisa Su and colleagues revealed that their: "next-generation AMD EPYC processor, codenamed 'Venice,' is the first HPC product in the industry to be taped out and brought up on the TSMC advanced 2 nm (N2) process technology." According to an official "data center CPU" roadmap, "Venice" is on track to launch in 2026. Last month, details of "Venice's" supposed mixed configuration of "Zen 6" and "Zen 6C" cores—plus other technical tidbits—were disclosed via a leak. InstLatX64 and other watchdogs reckon that some of the latest identifiers refer to forthcoming "Venice-Dense" designs and unannounced Instinct accelerators.

Xsight Labs, a leading fabless semiconductor company providing end-to-end connectivity for next-generation hyperscale, edge and AI data center networks, today announced availability of its Arm -based E1-SoC for cloud and edge AI data centers. The E-Series is the only product of its kind to provide full control plane and data path programmability and is the industry's highest performance software-defined DPU (Data Processing Unit). Xsight Labs is taking orders now for its E1-SoC and the E1-Server, the first-to-market 800G DPU.

E1 is the first SoC in the E-Series, Xsight Labs' SDN (Software Defined Network) Infrastructure Processor product family of fully programmable network accelerators. Built on TSMC's advanced 5 nm process technology, the E1-SoC will begin shipping to customers and ecosystem partners.

Computer scientists at ETH Zurich discover new class of vulnerabilities in Intel processors, allowing them to break down barriers between different users of a processor using carefully crafted instruction sequences. Entire processor memory can be read by employing quick, repeated attacks. Anyone who speculates on likely events ahead of time and prepares accordingly can react quicker to new developments. What practically every person does every day, consciously or unconsciously, is also used by modern computer processors to speed up the execution of programs. They have so-called speculative technologies which allow them to execute instructions on reserve that experience suggests are likely to come next. Anticipating individual computing steps accelerates the overall processing of information.

However, what boosts computer performance in normal operation can also open up a backdoor for hackers, as recent research by computer scientists from the Computer Security Group (COMSEC) at the Department of Information Technology and Electrical Engineering at ETH Zurich shows. The computer scientists have discovered a new class of vulnerabilities that can be exploited to misuse the prediction calculations of the CPU (central processing unit) in order to gain unauthorized access to information from other processor users.Update:: Intel released a security advisory regarding CVE-2024-45332, accompanied by a public announcement, and provided TechPowerUp with the following statement:

"We appreciate the work done by ETH Zurich on this research and collaboration on coordinated public disclosure. Intel is strengthening its Spectre v2 hardware mitigations and recommends customers contact their system manufacturer for the appropriate update. To date, Intel is not aware of any real-world exploits of transient execution vulnerabilities.", Intel spokesperson

Cadence today announced the Cadence Tensilica NeuroEdge 130 AI Co-Processor (AICP), a new class of processor designed to complement any neural processing unit (NPU) and enable end-to-end execution of the latest agentic and physical AI networks on advanced automotive, consumer, industrial and mobile SoCs. Based on the proven architecture of the highly successful Tensilica Vision DSP family, the NeuroEdge 130 AICP delivers more than 30% area savings and over 20% savings in dynamic power and energy without impacting performance. It also leverages the same software, AI compilers, libraries and frameworks to deliver faster time to market. Multiple customer engagements are currently underway, and customer interest is strong.

"With the rapid proliferation of AI processing in physical AI applications such as autonomous vehicles, robotics, drones, industrial automation and healthcare, NPUs are assuming a more critical role," said Karl Freund, founder and principal analyst of Cambrian AI Research. "Today, NPUs handle the bulk of the computationally intensive AI/ML workloads, but a large number of non-MAC layers include pre- and post-processing tasks that are better offloaded to specialized processors. However, current CPU, GPU and DSP solutions involve tradeoffs, and the industry needs a low-power, high-performance solution that is optimized for co-processing and allows future proofing for rapidly evolving AI processing needs."

Going back to May 2023, an industry inside report suggested that AMD was planning a new generation Ryzen Threadripper High-End Desktop (HEDT) processor series. At the time, "Shimada Peak" was linked to a possible 2025 launch. Over the ensuing years, shipping manifests have revealed the transfer of various 9000 SKUs between Team Red facilities—starting with a mysterious 96-core prototype. Industry observers have been seeking out newer evidence of AMD's next-gen flagship "Zen 5" Threadripper chip; likely going under a "9995WX" moniker.

Late last week, a fresh leak unearthed a likely sub-flagship SKU: the 9985WX. This alleged 64-core SKU was spotted—by Everest (aka Olrak29)—alongside 9955WX (16-core) and 9945WX (12-core) siblings, in a shipping manifest. As reported on TechPowerUp on March 21, the same source uncovered two other entry-level models: the 9975WX (32-core) and 9965WX (24-core) parts. Unfortunately, Team Red's rumored monstrous 96-core 9995WX processor was not listed within fresh batches of shipping documents. Industry watchdogs expect AMD to repeat its product layout from past generations; spanning from entry-tier 12-core offerings up to the aforementioned 96-core range-topper. The latest leak suggests utilization of the SP6 socket type, and 350 W TDPs (across all product identifiers).

Lightmatter has launched its latest photonic processor, representing a fundamental shift from traditional computing architectures. The new system integrates six chips into a single 3D packaged module, each containing photonic tensor cores and control dies that work in concert to accelerate AI workloads. Detailed in a recent Nature publication, the processor combines approximately 50 billion transistors with one million photonic components interconnected via high-speed optical links. The industry has faced numerous computing challenges as conventional scaling approaches plateau, with Moore's Law, Dennard scaling, and DRAM capacity doubling, all reaching physical limits per silicon area. Lightmatter's solution implements an adaptive block floating point (ABFP) format with analog gain control to overcome these barriers. During matrix operations, weights and activations are grouped into blocks sharing a single exponent determined by the most significant value, minimizing quantization errors.

The processor achieves 65.5 trillion 16-bit ABFP operations per second (sort of 16-bit TOPs) while consuming just 78 W of electrical power and 1.6 W of optical power. What sets this processor apart is its ability to run unmodified AI models with near FP32 accuracy. The system successfully executes full-scale models, including ResNet for image classification, BERT for natural language processing, and DeepMind's Atari reinforcement learning algorithms without specialized retraining or quantization-aware techniques. This represents the first commercially available photonic AI accelerator capable of running off-the-shelf models without fine-tuning. The processor's architecture fundamentally uses light for computation to address next-generation GPUs' prohibitive costs and energy demands. With native integration for popular AI frameworks like PyTorch and TensorFlow, Lightmatter hopes for immediate adoption in production environments.

Google has rolled out its seventh-generation AI chip, Ironwood, which aims to boost AI application performance. This processor focuses on "inference" computing—the quick calculations needed for chatbot answers and other AI outputs. Ironwood stands as one of the few real options to NVIDIA's leading AI processors coming from Google's ten-year multi-billion-dollar push to develop it. These tensor processing units (TPUs) are exclusively available through Google's cloud service or to its internal engineers.

According to Google Vice President Amin Vahdat, Ironwood combines functions from previously separate designs while increasing memory capacity. The chip can operate in groups of up to 9,216 processors and delivers twice the performance-per-energy ratio compared to last year's Trillium chip. When configured in pods of 9,216 chips, Ironwood delivers 42.5 Exaflops of computing power. This is more than 24 times the computational capacity of El Capitan, currently the world's largest supercomputer, which provides only 1.7 Exaflops per pod.

Mark Gurman—Bloomberg's resident soothsayer of Apple inside track info—has disclosed predictive outlooks for next-generation M5 chip-based MacBooks. Early last month, we experienced the launch of the Northern Californian company's M4 MacBook Air series—starting at $999; also available in a refreshing metallic blue finish. The latest iteration of Apple's signature "extra slim" notebook family arrived with decent performance figures. As per usual, press and community attention has turned to a potential successor. Gurman's (March 30) Power On newsletter posited that engineers are already working on M5-powered super slim sequels—he believes that these offerings will arrive early next year, potentially reusing the current generation's 15-inch and 13-inch fanless chassis designs.

In a mid-February predictive report, Gurman theorized that Apple was planning a major overhaul of the MacBook Pro design. A radical reimagining of the long-running notebook series—that reportedly utilizes M6 chipsets and OLED panels—is a distant prospect; perhaps later on in 2026. The Cupertino-headquartered megacorp is expected to stick with its traditional release cadence, so 2025's "M5" refresh of MacBook Pro models could trickle out by October. Insiders believe that Apple will reuse existing MacBook Pro shells—the last major redesign occurred back in 2021. According to early February reportage, mass production of the much-rumored M5 chip started at some point earlier in the year. Industry moles posit that a 3 nm (N3P) node process was on the order books, chez TSMC foundries.

Tachyum today announced that it has successfully enabled DRAM Failover correct system on its Prodigy Universal Processor, demonstrating enhanced reliability for even larger-scale AI and HPC applications even in the case of DRAM chip failures.

Tachyum's DRAM Failover is an advanced memory error correction technology that improves the reliability of DRAM and provides a higher level of protection than traditional Error Correction Code (ECC). DRAM Failover can correct multi-bit errors within a single memory chip or across multiple memory chips, allowing continued memory operation in the event of device-level faults in memory. With DRAM Failover, even a whole DRAM chip failure can be tolerated without affecting the system and applications.

The status of Intel "Meteor Lake-S" (MTL-S) desktop processors was the subject of much speculation throughout 2023—by September of that year, Team Blue leadership projected an upcoming launch in 2024. Technically, Meteor Lake was deployed to "sort-of desktops" platforms—albeit in mini-PCs that utilized Core Ultra mobile chips. Industry moles insisted that Intel was still actively engaged in production of MTL-S samples in late 2023. According to a recent ITHome report, those insider tales turned out to be legitimate. On Monday (March 24), the online publication revealed the existence of a mysterious "Q46W" engineering sample—courtesy of Kyoka (a trusted source). A CPU-Z diagnostic revealed the unannounced CPU's turboboost capability reaching 4.5 GHz, while base frequency sat at the 2.8 GHz mark.

According to ITHome's investigative piece, Team Blue: "tested a very special desktop processor: it uses the Meteor Lake architecture, has 6 performance cores and 8 energy efficiency cores (6P+8E), but the performance cores (P-cores) do not support Hyper-Threading. The production date of the product in hand is the 51st week of 2023, which is obviously later than the time when Meteor Lake-S was reported to be cancelled for external sales. From this situation, 'Q46W' may be a development test processor for FCLGA1851 platform or the 800 series chipset. Kyoka believes that the processor should be in the ES2 stage." A Xianyu seller—tbNick_3u8k4—is reportedly offloading a surprising quantity of "Intel Confidential Q46W" processors, allegedly manufactured back in early 2024. Photos show tray-mounted units available for sale on Taobao's second hand market platform. tbNick_3u8k4 mentions that this particular batch of Q46W chips "requires a special motherboard to light up," suggesting that readily available Intel 800 Series chipset-based models are not fit for purpose.

Dune: Awakening, the multiplayer survival game inspired by Frank Herbert's legendary sci-fi novel and Legendary Entertainment's award-winning films, will launch on May 20th. Funcom is excited to share that pre-orders begin today, and gamers everywhere are now less than two months away from descending upon the most dangerous planet in the universe.

The standard edition, the Deluxe Edition, and the Ultimate Edition are now available for pre-order on Steam, with the latter including, among many other goodies, an incredible, 90-minute-long digital soundtrack. In celebration of this moment, Funcom has prepared a journey behind the scenes of the making of the music, giving viewers a unique glimpse at how award-winning composer Knut Avenstroup Haugen brought the album to life with a live orchestra at the legendary AIR Lyndhurst studio in London.

Last Friday, AMD confirmed finalized price points for its upcoming Ryzen 9 9950X3D ($699) and 9900X3D ($599) gaming processors—both launching on March 12. Media outlets are very likely finalizing their evaluations of review silicon; official embargoes are due for lifting tomorrow (March 11). By Team Red decree, a drip feed of pre-launch information was restricted to teasers, a loose March launch window, and an unveiling of basic specifications (at CES 2025). A trickle of mid-January to early March leaks have painted an incomplete picture of performance expectations for the 3D V-Cache-equipped 16 and 12-core parts. A fresh NDA-busting disclosure has arrived online, courtesy of an alleged Ryzen 9 9950X3D sample's set of benchmark scores.

A pre-release candidate posted single and multi-thread ratings of 4739 and 69,701 (respectively), upon completion of PassMark tests. Based on this information, a comparison chart was assembled—pitching the Ryzen 9 9950X3D against its direct predecessor (7950X3D), a Zen 5 relative (9950X), and competition from Intel (Core Ultra 9 285K). AMD's brand-new 16-core flagship managed to outpace the previous-gen Ryzen 9 7950X3D by ~14% in single thread stakes, and roughly 11% in multithreaded scenarios. Test system build details and settings were not mentioned with this leak—we expect to absorb a more complete picture tomorrow, upon publication of widespread reviews. The sampled Ryzen 9 9950X3D CPU surpassed its 9950X sibling by ~5% with its multi-thread result, both processors are just about equal in terms of single-core performance. The Intel Core Ultra 9 285K CPU posted the highest single-core result within the comparison—5078 points—exceeding the 9950X3D's tally by about 7%. The latter pulls ahead by ~3% in terms of recorded multi-thread performance. Keep an eye on TechPowerUp's review section; where W1zzard will be delivering his verdict(s) imminently.

Google security researchers have published comprehensive details on "EntrySign," a significant vulnerability affecting all AMD Zen processors through Zen 4. The flaw allows attackers with local administrator privileges to install custom microcode updates on affected CPUs, bypassing AMD's cryptographic verification system. The vulnerability stems from AMD's use of AES-CMAC as a hash function in its signature verification process—a critical cryptographic error. CMAC is designed as a message authentication code, not a secure hash function. The researchers discovered that AMD had been using a published example key from NIST documentation since Zen 1, allowing them to forge signatures and deploy arbitrary microcode modifications. These modifications can alter CPU behavior at the most fundamental level, enabling sophisticated attacks that persist until the next system reboot.

Google's security team has released "zentool," an open-source jailbreak toolkit allowing researchers to create, sign, and deploy custom microcode patches on vulnerable processors. The toolkit includes capabilities for microcode disassembly, patch authoring with limited assembly support, and cryptographic signing functions. As a proof-of-concept, the researchers demonstrated modifying the RDRAND instruction to consistently return predetermined values, effectively compromising the CPU's random number generation. AMD has issued microcode updates that replace the compromised validation routine with a custom secure hash function. The company's patches also leverage the AMD Secure Processor to update the validation routine before x86 cores can process potentially tampered microcode. While the attack requires local administrator access and doesn't persist through power cycles, it poses significant risks to confidential computing environments using technologies like SEV-SNP and DRTM. The researchers noted their findings could enable further CPU security research beyond exploit development, potentially allowing the implementation of new security features similar to those developed for Intel processors through similar techniques.

Codasip, the European RISC-V leader, announced that it has been selected to provide a general purpose, high-end processor as part of the large-scale European supercomputing project Digital Autonomy with RISC-V in Europe (DARE).

DARE is set to build a supercomputing compute stack, featuring high-performance and energy-efficient RISC-V-based processors and accelerators designed and developed in Europe. The European Union has committed 240 million Euros in funding for the first 3-year program phase. The selected partners will leverage hardware/software co-design to achieve competitive performance and efficiency.

One of the main pillars that vendors of Arm-based processors often cite as a competitive advantage versus x86 processors is a keen focus on energy efficiency and predictability of performance. In the quest for higher efficiency and performance, Arm vendors have largely designed out the ability to operate on multiple threads concurrently—something that most enterprise-class CPUs have enabled for years under the technology description of "SMT"—which was also created in the name of enabling performance and efficiency benefits.

Arm vendors often claim that SMT brings security risks, creates performance unpredictability from shared resource contention and drives added cost and energy needed to implement SMT. Interestingly, Arm does support multi-threading in its Neoverse E1-class processor family for embedded uses such as automotive. Given these incongruities, this blog intends to provide a bit more clarity to help customers assess what attributes of performance and efficiency really bring them value for their critical workloads.

Damo Academy—a research and development wing of Alibaba—launched its debut "server-grade processor" design late last week, in Beijing. According to a South China Morning Post (SCMP) news article, the C930 model is a brand-new addition to the e-commerce platform's XuanTie RISC-V CPU series. Company representatives stated that their latest product is designed as a server-level and high-performance computing (HPC) solution. Going back to March 2024, TechPowerUp and other Western hardware news outlets picked up on Alibaba's teasing of the Xuantie C930 SoC, and a related Xuantie 907 matrix processing unit. Fast-forward to the present day; Damo Academy has disclosed that initial shipments—of finalized C930 units—will be sent out to customers this month.

The newly released open-source RISC-V architecture-based HPC chip is an unknown quantity in terms of technical specifications. Damo Academy reps did not provide any detailed information during last Friday's conference (February 28). SCMP's report noted the R&D division's emphasizing of "its role in advancing RISC-V adoption" within various high-end fields. Apparently, the XuanTie engineering team has: "supported the implementation of more than thirty percent of RISC-V high-performance processors." Upcoming additions will arrive in the form of the C908X for AI acceleration, R908A for automotive processing solutions, and an XL200 model for high-speed interconnection. These XuanTie projects are reportedly still deep in development.

The AMD Ryzen 9 9950X3D processor will head to retail next month—a March 12 launch day is rumored—but a handful of folks seem to have early samples in their possession. Reviewers and online influencers have been tasked with evaluating pre-launch silicon, albeit under strict conditions; i.e. no leaking. Inevitably, NDA-shredding material has seeped out—yesterday, we reported on an alleged sample's ASUS Silicon Prediction rating. Following that, a Bulgarian system integrator/hardware retailer decided to upload Cinebench R23 and PCMark Time Spy results to Facebook. Evidence of this latest leak was scrubbed at the source, but VideoCardz preserved crucial details.

The publication noticed distinguishable QR and serial codes in PCbuild.bg's social media post; so tracing activities could sniff out points of origin. As expected, the leaked benchmark data points were compared to Ryzen 9 9950X and 7950X3D scores. The Ryzen 9 9950X3D sample recorded a score of 17,324 points in 3DMark Time Spy, as well as 2279 points (single-core) and 42,423 points (multi-core) in Cinebench R23. Notebookcheck observed that the pre-launch candidate came: "out ahead of the Ryzen 9 7950X3D in both counts, even if the gaming win is less than significant. Comparing the images of the benchmark results to our in-house testing and benchmark database shows the 9950X3D beating the 7950X3D by nearly 17% in Cinebench multicore." When compared to its non-3D V-Cache equivalent, the Ryzen 9 9950X3D leverages a slight performance advantage. A blurry shot of PCbuild.bg's HWiNFO session shows the leaked processor's core clock speeds; going up to 5.7 GHz (turbo) on a single CCD (non-X3D). The X3D-equipped portion seems capable of going up to 5.54 GHz.

Today, Lenovo announced three new infrastructure solutions, powered by Intel Xeon 6 processors, designed to modernize and elevate data centers of any size to AI-enabled powerhouses. The solutions include next generation Lenovo ThinkSystem V4 servers that deliver breakthrough performance and exceptional versatility to handle any workload while enabling powerful AI capabilities in compact, high-density designs. Whether deploying at the edge, co-locating or leveraging a hybrid cloud, Lenovo is delivering the right mix of solutions that seamlessly unlock intelligence and bring AI wherever it is needed.

The new Lenovo ThinkSystem servers are purpose-built to run the widest range of workloads, including the most compute intensive - from algorithmic trading to web serving, astrophysics to email, and CRM to CAE. Organizations can streamline management and boost productivity with the new systems, achieving up to 6.1x higher compute performance than previous generation CPUs with Intel Xeon 6 with P-cores and up to 2x the memory bandwidth when using new MRDIMM technology, to scale and accelerate AI everywhere.

MiTAC Computing Technology Corporation, a leading server platform design manufacturer and a subsidiary of MiTAC Holdings Corporation, today announced the launch of its latest server systems and motherboards powered by the latest Intel Xeon 6 with P-core processors. These industry-leading processors are designed for compute-intensive workloads, providing up to twice the performance for the widest range of workloads including AI and HPC.

Driving Innovation in AI and High-Performance Computing
"For over a decade, MiTAC Computing has collaborated with Intel to push the boundaries of server technology, delivering cutting-edge solutions optimized for AI and high-performance computing (HPC)," said Rick Hwang, President of MiTAC Computing Technology Corporation. "With the integration of the latest Intel Xeon 6 P-core processors our servers now unlock groundbreaking AI acceleration, boost computational efficiency, and scale cloud operations to new heights. These innovations provide our customers with a competitive edge, empowering them to tackle demanding workloads with superior empower our customers with a competitive edge through superior performance and an optimized total cost of ownership."

LG Electronics USA (LG) today announced pricing and pre-order availability of its 2025 AI-enabled LG gram lineup, the company's first on-device AI-laptops powered by Intel Core Ultra Series 2 CPUs. Introduced at CES 2025, the new lineup includes the LG gram Pro Z90TP ($1999 to $2399), LG gram Pro Copilot+PC Z90TS ($1849 to $2399), LG gram Pro 2-in-1 T90TP ($1999 to $2399) and LG gram Copilot+PC Z90TL ($1999 to $2399). Leveraging LG's gram AI technology, and cloud AI capabilities powered by GPT-4o, these laptops deliver impressive hybrid AI performance while preserving the LG gram's iconic slim and lightweight design.

Throughout the duration of the pre-order period (Feb. 24, 2025 to March 23, 2025), customers will receive an LG gram +view IPS portable monitor (349.99 value) at no additional cost and $200 savings on select models. All standard terms of purchase apply.

MSI is pleased to announce support for the upcoming AMD Ryzen 9 9950X3D and 9900X3D processors, built on the Zen 5 architecture and featuring AMD's cutting-edge 2nd generation AMD 3D V-Cache technology. This innovative technology is designed to significantly increases the cache size, allowing faster data access and improved performance. Engineered to deliver exceptional performance, these processors meet the demands of even the most intensive gaming and content creation workloads.

At the heart of this experience is the MSI MEG X870E GODLIKE motherboard, which sets a new standard with its innovative design and robust features. The Dynamic Dashboard III, a 3.99-inch full-color LCD, offers real-time hardware monitoring, troubleshooting, BIOS update status, clock display, and personalization options, enhancing user experience and system control. MSI's EZ Link design complements this, streamlining cable management by consolidating the front panel, fan, and RGB headers into the EZ Bridge and EZ Control Hub, ensuring a cleaner build and simplified installation process.

ASUS Republic of Gamers (ROG) announced that the 2025 ROG Flow Z13 is now available for pre-order. This versatile gaming 2-in-1 can feature up to AMD's newest AMD Ryzen AI Max+ 395 Processor with Radeon 8060S Graphics and a unified memory structure, allowing for incredible performance and power efficiency. A new stainless steel and copper vapor chamber, larger intake vents, and 2nd Gen Arc Flow Fans offer 70% more airflow for quiet and efficient cooling.

This 13-inch tablet boasts a stunning ROG Nebula Display, a 2.5K resolution 180 Hz touchscreen with 500 nits of peak brightness, and Corning Gorilla Glass 5 protection. The Flow Z13 now also features a larger 70Wh battery, a larger touchpad and keycaps, and a convenient Command Center button for quick access to vital system functions. With dual USB-C ports, both of which support USB4 and power delivery, as well as a dedicated HDMI 2.1 port, the Flow Z13 lets gamers leave their dongles at home.

So far, this Friday (February 7) has been a bumper day for Intel CPU-related leaks. Golden Pig Upgrade and Jaykihn appear to be in competition with each other—they have uncovered all manner of speculative treasures across desktop and mobile segments. The latest revelation provides an early insight into unannounced feline-themed next-gen CPUs, courtesy of a Jaykihn social media post. Team Blue's Panther Lake processor family is slated for launch within the latter half of 2025—Intel officially stated that it would be their "lead product" on 18A. Older rumors had the "mobile-exclusive" Panther Lake processor family linked to a mixed configuration of new "Cougar Cove" P-cores and updated "Skymont" E-cores. According to today's leak, a variety of core configurations and feature sets are in the pipeline.

Jaykihn has listed three Panther Lake SKUs, and a "more mainstream" lower-end Wildcat Lake model. Common features include support for Thunderbolt 4 connectivity and LPDDR5X memory. Team Blue's rumored highest-end Panther Lake-H (PTL-H) processor appears to max out with a grand total of sixteen cores—consisting of 4 P-cores, 8 E-Cores, and 4 LP cores. The integrated graphics solution is (allegedly) a 12 core Xe3 "Celestial" GPU, with support for LPDDR5X memory—it is the only one on the list to completely jettison DDR5 compatibility. Insiders believe that the total platform (TOPS) rating is 180. As interpreted by VideoCardz, a 12-core "Panther Lake-U" (PTL-U) SKU is reportedly free of efficiency (E) units. The sole Wildcat Lake (WCL) model seems to sport a 2 P-core, 4-LP, and 2-Xe3 configuration.