Intel CEO Pat Gelsinger was a special guest at Lenovo Tech World 2024, the computing giant's annual showcase of its latest innovations. The opening keynote address saw Gelsinger make a special appearance to greet Lenovo CEO Yang Yuanqing, but he wasn't alone. In his pocket was a next-generation "Panther Lake" processor. This chip appears to be an H-segment package for mainstream notebooks, which makes the chip a direct successor to the "Arrow Lake-H" mobile processor that comes out in Q1-2025.

According to leaks from reliable sources, "Panther Lake-H" is said to come in CPU core-counts of up to 18. That's 6P+8E+4LP. It sees the reintroduction of low-power island E-cores located in the SoC tile. The six P-cores are "Cougar Cove," which could feature a generational IPC uplift over the current "Lion Cove," while the current "Skymont" E-cores are carried forward into "Panther Lake." The SoC tile could see an upgrade to a newer foundry node from its current 6 nm on "Arrow Lake," to accommodate the low-power island E-cores, and possibly a faster NPU. The iGPU of "Panther Lake" is allegedly based on the next-generation Xe3 "Celestial" graphics architecture. This faster iGPU, along with a faster NPU, low-power island E-cores, and slightly faster P-cores, could be what "Panther Lake-H" brings to the table. Given that "Arrow Lake-H" sees an early-2025 introduction, we don't expect "Panther Lake-H" out till at least 2026.

Some of the first images of a de-lidded Intel Core Ultra 9 285K "Arrow Lake-S" processor surfaced on the web, confirming a disaggregated chiplet-based processor design. Intel pivoted to chiplet based processors with its Core Ultra "Meteor Lake," allowing it to build specific IP blocks of the processor on different foundry nodes, ensuring the ones that don't need the most advanced nodes can make do with slightly older ones, thereby maximizing Intel's yields for that advanced node. The die shot reveals a similar level of disaggregation to "Meteor Lake" than that of the more recent Core Ultra 200V "Lunar Lake" mobile processor.

With "Lunar Lake," Intel had re-aggregated a few things. "Lunar Lake" only has two tiles—SoC tile and I/O tile. The 3 nm SoC tile contains the CPU complex, a large iGPU, and a large 40 TOPS-class NPU, all sharing die-space with the memory controllers, and PCIe root complex. The smaller 6 nm I/O tile contains the PHYs of the various I/O interfaces. The "Arrow Lake" chip appears to have a similar degree of disaggregation as "Meteor Lake." We can spot at least five tiles sitting on top of the Foveros base tile. The picture has no annotation for the various tiles, but recent reports by Moore's Law is Dead and Jay Kihn shed some light on what these could be.

Some of the first die-shots and annotations of the Intel Core Ultra 200V "Lunar Lake" processor surfaced on the web, thanks to die-shots by GeenWens and Kurnalsalts on Twitter. Be sure to check out our Lunar Lake Technical Deep-dive article to learn the basics of how Lunar Lake is different from "Meteor Lake." Both are disaggregated chiplet-based processors, but Lunar Lake remodels things a bit. All the logic engines of the processor—the CPU, the iGPU, and the NPU, are located in a centralized Compute tile that's built on the TSMC 3 nm process, while all the I/O controllers are spun out to the Platform Controller tile built on TSMC 6 nm, which sit on a Foveros base tile that acts as an interposer, facilitating high-density microscopic connections between the two tiles. The base tile sits on the fiberglass substrate, which also has stacked LPDDR5X memory for either 16 GB or 32 GB of on-package system memory.

The Kurnalsalts annotation provides a good lay of the land for the Compute tile. The most striking aspect of it is the CPU. "Lunar Lake" comes with a 4P+4E core hybrid CPU, but the two kinds of cores do not share a last-level cache or sit in a ringbus, unlike in case of the Compute tile of "Meteor Lake." The four "Lion Cove" P-cores each come with 2.5 MB of dedicated L2 caches, and share a 12 MB L3 cache. The four "Skymont" E-cores are not part of the ringbus connecting the four P-cores, rather they are physically separated, much like the low-power island E-cores on "Meteor Lake." The E-core cluster shares a 4 MB L2 cache among the four E-cores. This E-core cluster is directly connected to the switching fabric of the Compute tile.

Intel's Core Ultra 200 series "Arrow Lake" CPU generation is bringing a complete P/E core redesign and, allegedly, a new package. According to VideoCardz, Intel's flagship SKU—Core Ultra 9 285K—features a completely redesigned box with new accent colors. Colors of choice include blue, black, and gray tones with a futuristic look. At the center of the new box is grey plastic packaging that protects and holds the actual processor. As the recent leaks suggested, this SKU will boast 8 "Lion Cove" P-Cores and 16 "Skymont" E-Cores without Hyper-Threading and with a maximum boost of 5.7 GHz. All of this will be packed inside a 125-watt power envelope. While we await the official launch, supposedly scheduled for October 10 and released on October 24, we can preview the new packaging box that Intel prepared for its new CPU family.

Intel's future processor microarchitectures and their constituent CPU cores have hit the rumor-mill. The "Lion Cove" P-core is now current-gen, as products based on the Core Ultra 200V "Lunar Lake" processor, which implements it, have been announced. "Lion Cove" will also be the main workhorse of "Arrow Lake," and Intel's Xeon 7 P-core server processors. The core ditches Hyper-Threading, but introduces a double-digit percent IPC gain over "Raptor Cove." The thunder of "Lion Cove" was stolen by the new "Skymont" E-core during the "Lunar Lake" technical presentations, as it offers nearly the same IPC as "Raptor Cove," at much lower power, and is held back by a lack of HTT and its inability to operate at high clock speeds that "Raptor Cove" can. We predict "Skymont" is shaking things up at Intel, and will have an impact on the way the company's future CPU cores are designed—to place greater emphasis on power and die-area to achieve IPC growth targets with each generation.

The successor to "Lion Cove" is codenamed "Royal Core." This would be the first time in over five years (since "Sunny Cove") that Intel's P-core codename doesn't use "Cove," signaling a departure from that naming scheme. The first iteration of "Royal Core" will power Intel's "Nova Lake" microarchitecture that succeeds "Lunar Lake." A slightly updated version of this core, codenamed "Royal Core 1.1," will power the "Beast Lake" microarchitecture, which likely falls in the lineage of "Arrow Lake," if not being a direct successor to it. An alleged Intel employee's work project description revealed "Cobra Core," a CPU core that succeeds "Royal Core," although the codename of its parent microarchitecture hasn't been revealed. Microarchitectures such as "Beast Lake," and its successor implementing "Cobra Core" are slated for much later into the decade, and we don't expect them to see the light of the day till at least 2026-27, if not later.

Details have emerged about Intel's upcoming "Panther Lake" processors, set to be the third generation of Core Ultra mobile chips. Called the Core Ultra 300 series, these CPUs are expected to succeed "Lunar Lake". According to recent leaks, Panther Lake-H will be manufactured using Intel's cutting-edge 18A process node. The chips are said to feature a combination of Cougar Cove P-Cores, Skymont E-Cores, and Xe3 (Celestial) integrated graphics. This architecture builds upon Intel's hybrid core design, refining it for even better performance on mobile devices. The leaked information suggests a range of configurations for Panther Lake-H, the high-perfomance variant of the lineup. These include models with varying core counts and power envelopes, from efficient 25 W parts to more interesting 45 W options. Notably, some SKUs reportedly feature up to 18 cores in total, combining P-cores, E-cores, and LP E-cores in a five-tile package. This is an increase from previously believed 16 cores.

AMD "Strix Halo" isn't just a mobile processor with an oversized iGPU meant to power "gaming ultraportables," it has other potential applications such as game consoles (both handheld and standalone). Not willing to cede this market to AMD, Intel is reportedly readying its own such chip, which is being reported as the "Arrow Lake Halo" for the lack of an official name. This chip will feature a large iGPU based on the Xe2 "Battlemage" graphics architecture, the variant of Xe2 Intel plans to use for its next-generation Arc discrete GPUs. The CPU compute complex will be carried over from the regular "Arrow Lake" chips, and feature a mix of "Lion Cove" P-cores, and "Skymont" E-core clusters.

To meet the higher memory bandwidth demand that arises from a high-performance iGPU and CPU, AMD designed the RDNA 3.5 graphics architecture to be more LPDDR5-aware, since at the physical layer, LPDDR operates differently from GDDR. Intel will probably do something similar, and deploy a 256-bit wide LPDDR5/x memory interface replacing the 128-bit wide interface the regular "Arrow Lake" mobile chips come with. Whether "Arrow Lake Halo" and "Strix Halo" remain competitive will depend a lot on which gaming experiences the two companies want to sell. The way the iGPU of "Strix Halo" is rumored to be specced suggests something that is 1440p-capable, or 4K-capable with FSR 3.

Intel may have debuted its Hybrid (heterogeneous multicore) architecture for the desktop with the 12th Gen Core "Alder Lake-S," but the value-ended Core i3 series SKUs throughout the 12th, 13th, and 14th Gen Core processors have remained 4-core/8-thread traditional multicore chips, with just four P-cores. Intel is about to change this with the Core Ultra 200 series "Arrow Lake-S." According to OneRaichu, a reliable source with Intel leaks, the company is giving finishing touches to a pair of Core Ultra 3 series desktop processor SKUs based on the "Arrow Lake" microarchitecture. These will be 8-core chips, a doubling in core-count form the past generations, but the nature of these 8 cores is not yet known.

Among the SKUs in the leak are the Core Ultra 3 205, and the Core Ultra 3 215, both of which are 8-core chips. The two are probably differentiated in a similar manner to past generations of Intel Core i3 desktop did, using cache sizes (eg: Core i3-10100 and i3-10300). The chips probably feature a 4P+4E core configuration, as a "2P+6E" configuration might not be possible, as the E-core clusters are indivisible, although we don't know if the same rule applies to the "Skymont" E-core clusters. The dedicated L2 caches of both the P-cores and E-core clusters could be smaller than on Core Ultra 5 and above SKUs. The Core Ultra 200V "Lunar Lake" processor uses "Lion Cove" P-cores with 2.5 MB of L2 cache per core, while the Core Ultra 9 285K probably has "Lion Cove" P-cores with 3 MB of L2 cache per core.

Intel is preparing at least twelve Core Ultra 200-series "Arrow Lake-S" desktop processor SKUs for the consumer segment, with more variants possible for the commercial desktop segment in the future. Q4 2024 could see the company debut its first SKUs targeting the PC enthusiast and gamer crowd with as many as five unlocked K or KF series SKUs. These, and finer details such as clock speeds, were revealed in a massive info dump by Jaykihn, a reliable source with Intel leaks. Intel is expected to debut the series later this year with the Core Ultra 9 285K, the Core Ultra 7 265K and 265KF; and the Core Ultra 5 245K and 245KF. The company is skipping a KF SKU for its top Core Ultra 9 part.

As has been consistent for several past generations of Intel processors, the top Core Ultra 9 (formerly Core i9) tier gets Thermal Velocity Boost, Turbo Boost Max 3.0, and classic Turbo Boost 2.0. The 285K maxes out the "Arrow Lake-S" B0 silicon, enabling all 8 "Lion Cove" P-cores, and all 16 "Skymont" E-cores. It comes with a P-core base frequency of 3.70 GHz, and an impressive 3.20 GHz E-core base frequency. The maximum P-core boost frequency achievable for up to two cores is 5.70 GHz, and 3-6 as well as 7-8 cores boost up to 5.40 GHz, making it the all-P-core boost frequency for this chip. The four E-core clusters are assured an all-E-core boost frequency of 4.60 GHz. The iGPU has 64 execution units, and ticks at up to 2.00 GHz.

Intel Core Ultra "Arrow Lake-S" desktop processors are expected to debut later this year, and introduce the new Lion Cove P-cores, along with Skymont E-cores to the desktop platform. Engineering samples and qualification samples with specs close to retail chips seem to already be in the hands of PC OEMs and motherboard vendors, given the volume of leaks over the past few days. Jaykihn0, one of the more influential sources of these leaks, revealed a few interesting details of the maximum boost frequencies of these chips.

The QS of a top Core Ultra 9 "Arrow Lake-S" SKU, probably the flagship model that succeeds the current Core i9-14900K, is described as having a maximum P-core boost frequency of 5.70 GHz, and an all-P-core boost frequency of 5.40 GHz. The maximum E-core boost frequency, which is also the all-E-core boost frequency, is said to be 4.60 GHz. Let's unpack this. "Arrow Lake" uses the same mix of "Lion Cove" P-cores and "Skymont" E-cores as "Lunar Lake," albeit arranged along a ringbus, and sharing an L3 cache, unlike on "Lunar Lake," where the P-cores have their own exclusive L3 cache, and the E-cores are arranged in a low-power island, with the fabric of the SoC tile connecting the two.

A CPU-Z screenshot of an alleged Intel Core Ultra 9 285K "Arrow Lake-S" desktop processor engineering sample is doing rounds on social media, thanks to wxnod. CPU-Z identifies the chip with an Intel Core Ultra case badge with the deep shade of blue associated with the Core Ultra 9 brand extension, which hints at this being the top Core Ultra 9 285K processor model, we know it's the "K" or "KF" SKU looking at its processor base power reading of 125 W. The chip is built in the upcoming Intel Socket LGA1851. CPU-Z displays the process node as 7 nm, which corresponds with the Intel 4 foundry node.

Intel is using the same Intel 4 foundry node for "Arrow Lake-S" as the compute tile of its "Meteor Lake" processor. Intel 4 offers power efficiency and performance comparable to 4 nm nodes from TSMC, although it is physically a 7 nm node. Likewise, the Intel 3 node is physically 5 nm. If you recall, the main logic tile of "Lunar Lake" is being built on the TSMC N3P (3 nm) node. This means that Intel is really gunning for performance/Watt with "Lunar Lake," to get as close to the Apple M3 Pro as possible.

Intel is preparing to launch its next generation of mobile CPUs with Core Ultra 200 series "Lunar Lake" leading the charge. However, as these processors are about to hit the market, leakers reveal Intel's plans for the next-generation Core Ultra 300 series "Panther Lake". According to rumors, Panther Lake will double the core count of Lunar Lake, which capped out at eight cores. There are several configurations of Panther Lake in the making based on the different combinations of performance (P) "Cougar Cove," efficiency (E) "Skymont," and low power (LP) cores. First is the PTL-U with 4P+0E+4LP cores with four Xe3 "Celestial" GPU cores. This configuration is delivered within a 15 W envelope. Next, we have the PTL-H variant with 4P+8E+4LP cores for a total of 16 cores, with four Xe3 GPU cores, inside a 25 W package. Last but not least, Intel will also make PTL-P SKUs with 4P+8E+4LP cores, with 12 Xe3 cores, to create a potentially decent gaming chip with 25 W of power.

Intel's Panther Lake CPU architecture uses an innovative design approach, utilizing a multi-tile configuration. The processor incorporates five distinct tiles, with three playing active roles in its functionality. The central compute operations are handled by one "Die 4" tile with CPU and NPU, while "Die 1" is dedicated to platform control (PCD). Graphics processing is managed by "Die 5", leveraging Intel's Xe3 technology. Interestingly, two of the five tiles serve a primarily structural purpose. These passive elements are strategically placed to achieve a balanced, rectangular form factor for the chip. This design philosophy echoes a similar strategy employed in Intel's Lunar Lake processors. Panther Lake is poised to offer greater versatility compared to its Lunar Lake counterpart. It's expected to cater to a wider range of market segments and use cases. One notable advancement is the potential for increased memory capacity compared to Lunar Lake, which capped out at 32 GB of LPDDR5X memory running at 8533 MT/s. We can expect to hear more potentially at Intel's upcoming Innovation event in September, while general availability of Panther Lake is expected in late 2025 or early 2026.

Intel is preparing a complete refresh of its desktop platform this year, with the introduction of the Core Ultra 200 series processors based on the "Arrow Lake" microarchitecture. The company skipped a desktop processor based on "Meteor Lake," probably because it didn't meet the desired multithreaded performance targets for Intel as it maxed out at 6P+8E+2LP, forcing Intel to come up with the 14th Gen Core "Raptor Lake Refresh" generation to see it through 2H-2023 and at least three quarters of 2024. The company, in all likelihood, will launch the new "Arrow Lake-S" Core Ultra 200 series toward late-Q3 or early-Q4 2024 (September-October). The first wave will include the overclocker-friendly K- and KF SKUs, alongside motherboards based on the top Intel Z890 chipset. 2025 will see the series ramp to more affordable processor models, and mainstream chipsets, such as the B860. These processors require a new motherboard, as Intel is introducing the new Socket LGA1851 with them.

Core configurations of the "Arrow Lake-S" chip surfaced on the web thanks to Jaykihn, a reliable source with Intel leaks. In its maximum configuration, the chip is confirmed to feature 8 P-cores, and 16 E-cores. There are no low-power island E-cores. Each of the 8 P-cores is a "Lion Cove" featuring 3 MB of dedicated L2 cache; while each the E-cores are "Skymont," arranged in 4-core modules that share 4 MB L2 caches among them. Intel claims that the "Lion Cove" P-core offers a 14% IPC increase over the "Redwood Cove" P-core powering "Meteor Lake," which in turn had either equal or a 1% IPC regression compared to "Raptor Cove." This would put "Lion Cove" at a 13-14% IPC advantage over the "Raptor Cove" cores. It's important to note here, that the "Lion Cove" P-cores lack HyperThreading, so Intel will be banking heavily on the "Skymont" E-cores to shore up generational multithreaded performance increase. "Skymont" was a show-stopper at Intel's Computex event, with a nearly 50% IPC gain over previous generations of Intel E-cores, which puts it at par with the "Raptor Cove" cores in single-thread performance.

An unnamed Intel Core Ultra "Arrow Lake-S" desktop processor engineering sample (ES) made it to the hands of someone willing to post its CPU-Z Bench screenshot. The processor allegedly scores a whopping 1143.2 points in the CPU-Bench single-thread benchmark; and 12922.4 points in the multithreaded benchmark. When compared with the internal Intel Core i9-13900K reference scores of CPU-Z, the single-thread benchmark score is a staggering 26.71% increase over that of the i9-13900K (902 points); while the multithreaded score is 22% lower.

Since we don't know which processor model this "Arrow Lake-S" ES is, we have no way of telling if it is the top SKU with its rumored 8P+16E core configuration, or a mid-tier Core i5 SKU with the expected 6P+8E configuration. The single-threaded test only loads one P-core, and here the IPC of one of the chip's "Lion Cove" P-cores is able to trounce one of the "Raptor Cove" P-cores of the i9-13900K reference score. You also have to understand that the Hyper-Threading plays no role in this thread. Where it could play a role is the multithreaded test. "Lion Cove" lacks HTT support unlike "Raptor Cove," and the i9-13900K is a 24-core/32-thread processor. It's important to note here, that "Arrow Lake" doesn't just have up to 8 "Lion Cove" P-cores, but also up to 16 "Skymont" E-cores that Intel claims to have achieved a massive IPC gain over its predecessor, bringing its IPC in the league of past-generation P-cores such as the "Raptor Cove" or "Golden Cove."

During Computex 2024, Intel announced the next-generation compute platform for the notebook segment in the form of the Core Ultra 200V series, codenamed Lunar Lake. Set for release in September 2024, these processors are generating excitement among tech enthusiasts and industry professionals alike. According to the latest leak by VideoCardz, Intel plans to unveil nine variants of Lunar Lake, including Core Ultra 7 and Core Ultra 5 models, with a single high-end Core Ultra 9 variant. While exact specifications remain under wraps, Intel's focus on artificial intelligence capabilities is clear. The company aims to secure a spot in Microsoft's Copilot+ lineup by integrating its fourth-generation Neural Processing Unit (NPU), boasting up to 48 TOPS of performance. All Lunar Lake variants are expected to feature a hybrid architecture with four Lion Cove performance cores and four Skymont efficiency cores.

This design targets low-power mobile devices, striking a balance between performance and energy efficiency. For graphics, Intel is incorporating its next-generation Arc technology, dubbed Battlemage GPU, which utilizes the Xe2-LPG architecture. The leaked information suggests that Lunar Lake processors will come with either 16 GB or 32 GB of non-upgradable LPDDR5-8533 memory. Graphics configurations are expected to include seven or eight Xe2 GPU cores, depending on the model. At the entry level, the Core Ultra 5 226V is rumored to offer a 17 W base power and 30 W maximum turbo power, with performance cores clocking up to 4.5 GHz. The top-tier Core Ultra 9 288V is expected to push the envelope with a 30 W base power, performance cores boosting to 5.1 GHz, and an NPU capable of 48 TOPS. You can check out the rest of the SKUs in the table below.

As Intel gears for the launch of Lunar Lake and Arrow Lake processors, the company appears to be preparing a new line of high-performance processors for gaming laptops. Recent developments suggest that the company is adapting its desktop-grade Arrow Lake-S chips for use in ultra-high-performance notebooks. The buzz began when X user @InstLatX64 spotted Intel testing a peculiar motherboard labeled "Arrow Lake Client Platform/ARL-S BGA SODIMM 2DPC." This discovery hints at the possibility of Intel packing up to 24 cores into laptop processors, eight more cores compared to the 16 cores expected in standard Arrow Lake-H mobile chips. By utilizing the full potential of Arrow Lake-S silicon in a mobile form factor, Intel aims to deliver desktop-class performance to high-end notebooks in a BGA laptop CPU.

The leaked chip would likely feature eight high-performance Lion Cove P-cores and 16 energy-efficient Skymont E-cores, along with an integrated Xe2 GPU. This configuration could provide the raw power needed for demanding games and professional applications in a portable package. However, implementing such powerful hardware in laptops presents challenges. The processors are expected to have a TDP of 45 W or 55 W, with actual power consumption potentially exceeding these figures to maintain high clock speeds. Success will depend not only on Intel's chip design but also on the cooling solutions and power delivery systems developed by laptop manufacturers. As of now, specific details about clock speeds and performance metrics remain under wraps. The test chip that surfaced showed a base frequency of 3.0 GHz, notably without AVX-512 support.

TSMC has commenced mass-production of chips for Intel on its 3 nm EUV FinFET foundry node, according to a report by Taiwan industry observer DigiTimes. Intel is using the TSMC 3 nm node for the compute tile of its upcoming Core Ultra 300 "Lunar Lake" processor. The company went into depth about "Lunar Lake" in its Computex 2024 presentation. While a disaggregated chiplet-based processor like "Meteor Lake," the new "Lunar Lake" chip sees the CPU cores, iGPU, NPU, and memory controllers sit on a single chiplet called the compute tile, built on the 3 nm node; while the SoC and I/O components are disaggregated the chip's only other chiplet, the SoC tile, which is built on the TSMC 6 nm node.

Intel hasn't gone into the nuts and bolts of "Arrow Lake," besides mentioning that the processor will feature the same "Lion Cove" P-cores and "Skymont" E-cores as "Lunar Lake," albeit arranged in a more familiar ringbus configuration, where the E-core clusters share L3 cache with the P-cores (something that doesn't happen on "Lunar Lake"). "Arrow Lake" also features a iGPU based on the same Xe2 graphics architecture as "Lunar Lake," and will feature an NPU that meets Microsoft Copilot+ AI PC requirements. What remains a mystery about "Arrow Lake" is the way Intel will go about organizing the various chiplets or tiles. Reports from February 2024 mentioned Intel tapping into TSMC 3 nm for just the disaggregated graphics tile of "Arrow Lake," but we now know from "Lunar Lake" that Intel doesn't shy away from letting TSMC fabricate its CPU cores. The first notebooks powered by "Lunar Lake" are expected to hit shelves within Q3-2024, with "Arrow Lake" following on in Q4.

Intel Socket LGA1851 will be the new infrastructure driving at least the next two generations of Intel desktop processors, and the new Core Ultra "Arrow Lake-S" will be the first processor generation to use it. These chips pack new "Lion Cove" P-cores, "Skymont" E-cores, an updated PCIe Gen 5 I/O, and new Xe2 "Battlemage" integrated graphics; with generational performance leaps to be had. At the ASUS Computex 2024 booth, we spotted some of the company's first high-end gaming PC motherboards for the platform, based on what could be the Intel Z890 chipset.

Our first find is the ROG Maximus Z890 Hero, or at least a variant of it featuring the ASUS BTF backside I/O connectivity. There will be a regular variant with conventional front-facing I/O, too. The LGA1851 socket looks almost identical to the LGA1700. In fact the two have the same physical dimensions, and are cooler compatible—your LGA1700-compatible coolers will work on LGA1851 motherboards. Intel added to the pin-count by tweaking the pin pitch, and reducing the size of the "courtyard" (the central void in the land grid meant for SMDs). LGA1851 is a pure-DDR5 platform, and has more PCIe Gen 5 connectivity than LGA1700, such as CPU-attached Gen 5 NVMe slots that don't subtract lanes from the x16 PEG slot. The ROG Maximus Hero appears to be a feature-packed motherboard geared for CPU overclocking, as well as connectivity galore. It also comes with Thunderbolt 4, Wi-Fi 7, USB4, 5 GbE, and next-generation SupremeFX onboard audio.

Amid all the attention the next-generation "Lion Cove" P-cores powering the upcoming "Lunar Lake" and "Arrow Lake" microarchitectures get as they compete with AMD's "Zen 5," it's easy to lose sight of the next-generation "Skymont" E-cores that will feature in both the upcoming Intel microarchitectures, and as standalone cores in the "Twin Lake" low-power processor. Pictures from an Intel presentation, possibly to PC OEMs, got leaked to the web. These are just thumbnails, we can't see the whole slides, but the person who took the pictures captioned them in a now-deleted social media post on the Chinese microblogging platform Weibo.

And now, the big reveal—the "Skymont" E-core is said to offer a double-digit IPC gain over the "Crestmont" E-core powering the current "Meteor Lake" processor, which in itself posted a roughly 4% IPC gain over the "Gracemont" E-cores found in the "Raptor Lake" and "Alder Lake" microarchitectures. Such an IPC gain over "Gracemont" should make the "Skymont" E-core match the IPC of the "Sunny Cove" or "Willow Cove" P-cores powering the "Ice Lake" and "Tiger Lake" microarchitectures, respectively, which were both within the 90th percentile of the AMD "Zen 3" core in IPC.

Intel has prepared the Core Ultra 5-238V, a Lunar Lake-MX CPU that integrates 32 GB of LPDDR5X memory into the CPU package. This new design represents a significant departure from the traditional approach of using separate memory modules, promising enhanced performance and efficiency, similar to what Apple is doing with its M series of processors. The Core Ultra 5-238V is the first of its kind for Intel to hit mass consumers. Previous attempt was with Lakefield, which didn't take off, but had advanced 3D stacked Foveros packaging. With 32 GB of high-bandwidth, low-power LPDDR5X memory directly integrated into the CPU package, the Core Ultra 5-238V eliminates the need for separate memory modules, reducing latency and improving overall system responsiveness. This seamless integration results in faster data transfer rates and lower power consumption with LPDDR5X memory running at 8533 MT.

Applications that demand intensive memory usage, such as video editing, 3D rendering, and high-end gaming, will be the first to experience performance gains. Users can expect smoother multitasking, quicker load times, and more efficient handling of memory-intensive tasks. The Core Ultra 5-238V is equipped with four big Lion Cove and four little Skymont cores, in combination with seven Xe2-LPG cores based on Battlemage GPU microarchitecture. The bigger siblings to Core Ultra 5, the Core Ultra 7 series, will feature eight Xe2-LPG cores instead of seven, with the same CPU core count, while all of them will run the fourth generation NPU.

Intel is readying the new N250 "Twin Lake" line of low-power processors that succeed the N200 series "Alder Lake-N" series. These are chips built on the latest process node Intel is using for its Core and Xeon processors, but only features E-cores (efficiency codes) from the latest microarchitecture. Chips from the N200 series are popular with low-cost notebooks, thin-clients, embedded systems, kiosks and point-of-sale terminals, NAS, and consumer electronics. "Twin Lake" is codename for the new processor series, these are likely monolithic processor dies that use a client ringbus layout, and one E-core cluster that makes up the compute muscle.

While "Alder Lake-N" is powered by "Gracemont" E-cores, the new "Twin Lake" chips are expected to feature "Skymont" E-core clusters. Intel is expected to debut "Skymont" E-cores with its upcoming Core Ultra 200V series "Lunar Lake-MX" mobile processors. "Skymont" is technically two generations ahead of "Gracemont," as Intel introduced the "Crestmont" cores with its current Core Ultra 100 "Meteor Lake" processor family. Not a lot is known about "Skymont" at this point, except that it's expected to feature IPC increases, and perform close to Intel's P-cores from 3-4 generations ago, such as the "Willow Cove" cores powering the 11th Gen Core "Tiger Lake" processors, looking at past trends of the "Gracemont" core performing similar to a "Skylake" core with HTT disabled.

Intel is giving its next-generation desktop processor lineup the Core Ultra 200 series processor model numbering. We detailed the processor numbering in our older report. The Core Ultra 200 series would be the company's first desktop processors with AI capabilities thanks to an integrated 50 TOPS-class NPU. At the heart of these processors is the "Arrow Lake" microarchitecture. Its development is the reason the company had to refresh "Raptor Lake" to cover its 2023-24 processor lineup. The company's "Meteor Lake" microarchitecture topped off at CPU core counts of 6P+8E, which would have proven to be a generational regression in multithreaded application performance over "Raptor Lake." The new "Arrow Lake-S" desktop processor has a maximum CPU core configuration of 8P+16E, which means consumers can expect at least the same core-counts at given price-points to carry over.

According to a report by Chinese tech publication Benchlife.info, the introduction of "Arrow Lake" would see Intel's desktop processor model numbering align with that of its mobile processor numbering, and incorporate the Core Ultra brand to denote the latest microarchitecture for a given processor generation. Since "Arrow Lake" is a generation ahead of "Meteor Lake," processor models in the series get numbered under Core Ultra 200 series.

Intel Core Ultra "Lunar Lake-MX" will be the company's bulwark against Apple's M-series Pro and Max chips, designed to power the next crop of performance ultraportables. The MX codename extension denotes MoP (memory-on-package), which sees stacked LPDDR5X memory chips share the package's fiberglass substrate with the chip, to conserve PCB footprint, and give Intel greater control over the right kind of memory speed, timings, and power-management features suited to its microarchitecture. This is essentially what Apple does with its M-series SoCs powering its MacBooks and iPad Pros. Igor's Lab scored the motherlode on the way Intel has restructured the various components across its chiplets, and the various I/O wired to the package.

When compared to "Meteor Lake," the "Lunar Lake" microarchitecture sees a small amount of "re-aggregation" of the various logic-heavy components of the processor. On "Meteor Lake," the CPU cores and the iGPU sat on separate tiles—Compute tile and Graphics tile, respectively, with a large SoC tile sitting between them, and a smaller I/O tile that serves as an extension of the SoC tile. All four tiles sat on top of a Foveros base tile, which is essentially an interposer—a silicon die that facilitates high-density microscopic wiring between the various tiles that are placed on top of it. With "Lunar Lake," there are only two tiles—the Compute tile, and the SoC tile.

There is some confidence behind removing HTT (Hyper-Threading technology) for the P-cores of its upcoming processor generations. Apparently "Lunar Lake" 17 W U-segment processors offer a substantial multithreaded performance gain of almost 50% over the current-generation "Meteor Lake," enabling Intel to do away with the power- or cache overheads that come with HTT. "Lunar Lake" will be Intel's third microarchitecture powering mobile processors under the Core Ultra brand; and its U-segment SKUs meant for ultraportables will come with processor base power values of 17 W. Intel will probably revise its platform specifications for the U-segment to denote 17 W, up from the current 15 W. Bionic Squash, a reliable source with Intel leaks, suggests so. The processors will come with a configurable base power of up to 30 W.

Intel "Lunar Lake" microarchitecture has a lot in common with the upcoming "Arrow Lake." For starters, both microarchitectures use the same combination of "Lion Cove" P-core architecture, and "Skymont" E-core architecture; however "Lunar Lake" comes with changes in the core-configuration, and the use of more advanced foundry nodes for some of its tiles. "Lunar Lake," much like "Meteor Lake," comes with a design priority for mobile platforms, which is why Intel is planning to launch this shortly after "Arrow Lake," with some reports even speaking of a late-2024 debut for the U-segment.

Intel is rumored to be preparing to tease its Core Ultra 2-series "Arrow Lake" processor at the 2024 Computex, which gets underway this June. The series itself isn't expected to launch before Q4-2024, but Computex is the only major global event between June and January for Intel to unveil or tease its next-generation processor, so here we are. At this point we don't know which exact platform of "Arrow Lake" Intel is planning to tease—whether these are the mobile variants, or the Socket LGA1851 desktop "Arrow Lake-S." An unveiling of the latter would almost definitely entail PC motherboard vendors being allowed to show off their first compatible motherboards at Computex—the perfect platform for them to do so.

The Core Ultra "Arrow Lake" retains a Foveros Tiled (chiplet) construction of "Meteor Lake," but with advancements to the chip's Compute tile, which is built on the Intel 20A foundry node, and rocks new "Lion Cove" P-cores and "Skymont" E-cores; an updated I/O tile, and an iGPU based on the updated Xe-LPG+ graphics architecture. Since the processor now serves practically all PCH functions, the mobile "Arrow Lake" is a single-chip solution, whereas the desktop "Arrow Lake-S" is expected to remain 2-chip. There will be more I/O from the CPU, though, which is why the socket has 151 more pins than the LGA1700.