Intel is slowly preparing to launch its 4th generation of Xeon Scalable processors, with it being the first arrival of the 10 nm designs to the server market. Codenamed Sapphire Rapids, these processors are expected to bring much-needed IPC and platform improvements so Intel can keep up with AMD's EPYC processors. Today, we are getting some first performance results as well as some information about a specific 20 core, 40 threaded Intel Xeon Sapphire Rapids SKU. In a leaked Geekbench 4 submission, the latest Xeon processor was tested and we get to see even more details about the processor.

Featuring 20 cores and 40 threads, the CPU has a base clock speed of 1.5 GHz. It features as much as 40 MB of L2 cache and 75 MB of L3 cache spread across the die. The system was tested on an Intel reference platform called VulcanCity, with this configuration carrying 32 GB of DDR5 memory. The reported results of the benchmarks that this processor went through are not very impressive. These numbers are easily beaten by AMD Ryzen 9 5950X, however, this is only an engineering sample with low clock speed and it could be possible that Geekbench is not optimized to run on this processor. You can check out some of the performance numbers below, and see the submitted results here.

Intel's Lisa Spelman, corporate vice president and general manager of the Xeon and Memory Group at Intel Corporation, has yesterday published a blog post talking about Intel's next-generation server platform codenamed Sapphire Rapids. The SPR platform is Intel's biggest step-up in the server processor space, and it is the exact CPU that will power the Aurora exascale supercomputer. Besides improvements to the CPU microarchitecture, the platform itself is bringing many benefits with it as well. It will use the latest industry protocols like DDR5 and PCIe 5.0. This is making a strong combination designed even for exascale supercomputers to be powered by this processor. However, the availability of this CPU was a bit of a mystery until yesterday. Below, you can see the quote from Ms. Lisa Spelman about the availability of said processors.

Lisa SpelmanDemand for Sapphire Rapids continues to grow as customers learn more about the benefits of the platform. Given the breadth of enhancements in Sapphire Rapids, we are incorporating additional validation time prior to the production release, which will streamline the deployment process for our customers and partners. Based on this, we now expect Sapphire Rapids to be in production in the first quarter of 2022, with ramp beginning in the second quarter of 2022.

Intel today, in its 2021 International Supercomputing Conference presentation, revealed that certain next-generation Xeon "Sapphire Rapids" SKUs come with on-package high-bandwidth memory (HBM). Given the context of its presentation, these could be special SKUs designed for high-density HPC setups, in which the processor package includes certain amount of "PMEM" (package memory), besides the processor's 8-channel DDR5 memory interface.

The size of the HBM PMEM, and its position in the memory hierarchy, were detailed, too. Given its high-density applications, PMEM may not serve as a victim cache for the processor, but rather be capable of serving as main memory, with none of the DDR5 DRAM channels populated with DIMMs. On machines with DIMMs, the PMEM will serve as a victim cache for the processor's on-die last-level cache, accelerating the memory I/O. "The next-generation of Intel Xeon Scalable processors (code-named "Sapphire Rapids) will offer integrated High Bandwidth Memory (HBM), providing a dramatic boost in memory bandwidth and a significant performance improvement for HPC applications that operate memory bandwidth-sensitive workloads. Users can power through workloads using just High Bandwidth Memory or in combination with DDR5," says Intel.

At the 2021 International Supercomputing Conference (ISC) Intel is showcasing how the company is extending its lead in high performance computing (HPC) with a range of technology disclosures, partnerships and customer adoptions. Intel processors are the most widely deployed compute architecture in the world's supercomputers, enabling global medical discoveries and scientific breakthroughs. Intel is announcing advances in its Xeon processor for HPC and AI as well as innovations in memory, software, exascale-class storage, and networking technologies for a range of HPC use cases.

"To maximize HPC performance we must leverage all the computer resources and technology advancements available to us," said Trish Damkroger, vice president and general manager of High Performance Computing at Intel. "Intel is the driving force behind the industry's move toward exascale computing, and the advancements we're delivering with our CPUs, XPUs, oneAPI Toolkits, exascale-class DAOS storage, and high-speed networking are pushing us closer toward that realization."

Intel CEO Pat Gelsinger announced the addition of two new technology leaders to its executive leadership team, as well as several changes to Intel business units. Current Intel executives Sandra Rivera and Raja Koduri will each take on new senior leadership roles, and technology industry veterans Nick McKeown and Greg Lavender will join the company.

"Since re-joining Intel, I have been impressed with the depth of talent and incredible innovation throughout the company, but we must move faster to fulfill our ambitions," said Gelsinger. "By putting Sandra, Raja, Nick and Greg - with their decades of technology expertise - at the forefront of some of our most essential work, we will sharpen our focus and execution, accelerate innovation, and unleash the deep well of talent across the company."

Today as part of its MWC 2021 virtual event, Intel showcased multiple groundbreaking network deployments powered by its technology and unveiled the Intel Network Platform. It also announced new additions to its leading product portfolio for 5G and edge, reaffirming its position as the leading network silicon provider. The company confirmed its leadership in virtual radio access network (vRAN), noting nearly all commercial vRAN deployments are running on Intel technology. In the years ahead, it sees global vRAN base station deployments scale, from hundreds to "hundreds of thousands," and eventually millions.

"Network transformation is critical to unleash the possibilities of 5G and maximize the rise of the edge to create new and better business outcomes for our customers across the globe. As the leading network silicon provider, we have been driving this shift to virtualizing the core to access to edge, and implementing edge computing capabilities with our decade of experience, to power our society's digital revolution," said Dan Rodriguez, Intel corporate vice president, Network Platforms Group.

Thanks to the information coming from Yuuki_Ans, a person which has been leaking information about Intel's upcoming 4th generation Xeon Scalable processors codenamed Sapphire Rapids, we have the first die shots of the Sapphire Rapids processor and its delidded internals to look at. After performing the delidding process and sanding down the metal layers of the dies, the leaker has been able to take a few pictures of the dies present on the processor. As the Sapphire Rapids processor uses multi-chip modules (MCM) approach to building CPUs, the design is supposed to provide better yields for Intel and give the 10 nm dies better usability if defects happen.

In the die shots, we see that there are four dies side by side, with each die featuring 15 cores. That would amount to 60 cores present in the system, however, not all of the 60 cores are enabled. The top SKU is supposed to feature 56 cores, meaning that there would be at least four cores disabled across the configuration. This gives Intel flexibility to deliver plenty of processors, whatever the yields look like. The leaked CPU is an early engineering sample design with a low frequency of 1.3 GHz, which should improve in the final design. Notably, as Sapphire Rapids has SKUs that use in-package HBM2E memory, we don't know if the die configuration will look different from the one pictured down below.

Marvell today announced its new Bravera SC5 controller family, bringing unprecedented performance, best-in-class efficiency, and leading security features to address ever-expanding workloads in the cloud. The massive amount of data to be processed in cloud data centers is driving demand for faster and higher bandwidth storage in these environments. Marvell's Bravera SC5 SSD controllers address the critical requirements for scalable, containerized cloud storage infrastructure. By enabling the highest performing flash storage solutions, Marvell's controllers are poised to be the foundation for data centers that offer ultra-low latency, real-time applications while also providing cost-optimized, cloud-scale capacity.

As the industry's first SSD controllers to support PCIe 5.0 and NVMe 1.4b, Marvell's Bravera SC5 doubles the performance compared to PCIe 4.0 SSDs. This contributes to accelerated workloads and reduced latency, dramatically improving the user experience. In order to meet cloud service providers' stringent security requirements to ensure users' data is safe and protected, the controllers offer FIPS-compliant root of trust (RoT), AES 256-bit encryption and multi-key revocation. The new controllers are the first with a hardware-based Elastic SLA Enforcer to assure quality of service (QoS) and provide metering capabilities per customer to increase overall storage efficiency and utilization while lowering total cost of ownership (TCO).

Intel's upcoming Xeon "Sapphire Rapids" processors which debut in the second half of 2021, will feature up to 80 "Golden Cove" CPU cores, and not the previously rumored "Willow Cove." This was clarified by an Intel developer in a Linux Kernel code e-mail chain. "Golden Cove" CPU cores are more advanced than the "Willow Cove" cores found in current-generation Intel products, such as the client "Tiger Lake" processors. Intel stated that "Golden Cove" introduces an IPC gain over "Willow Cove" (expressed as "ST perf"), increased AI inference performance from an updated GNI component, "network and 5G perf," which is possibly some form of network stack acceleration, and additional security features.

Over in the client segment, the 12th Gen Core "Alder Lake" processor debuts a client variant of "Golden Cove." The "Alder Lake-S" silicon features eight "Golden Cove" cores serving as the "big" performance cores, next to eight "little" low-power "Gracemont" cores. The client- and server implementations of "Golden Cove" could differ mainly in the ISA, with the client chip receiving a slightly skimmed AVX-512 and DLBoost instruction-sets, with only client-relevant instructions. The server variant, in addition being optimized for a high core-count multi-core topology; could feature a more substantial AVX-512 and DLBoost implementation relevant for HPC use-cases.

Intel will detail its 12th Gen Core "Alder Lake" client and "Sapphire Rapids" server CPU microarchitectures at the Hot Chips 33 conclave, this August. In fact, Intel's presentation leads the CPU sessions on the opening day of August 23. "Alder Lake" will be the session opener, followed by AMD's presentation of the already-launched "Zen 3," and IBM's 5 GHz Z processor powering its next-gen mainframes. A talk on Xeon "Sapphire Rapids" follows this. Hot Chips is predominantly an engineering conclave, where highly technical sessions are presented by engineers from major semiconductor firms; and so the sessions on "Alder Lake" and "Sapphire Rapids" are expected to be very juicy.

"Alder Lake" is Intel's attempt at changing the PC ecosystem by introducing hybrid CPU cores, a concept introduced to the x86 machine architecture with "Lakefield." The processor will also support next-generation I/O, such as DDR5 memory. The "Sapphire Rapids" server CPU microarchitecture will see an increase in CPU core counts, next-gen I/O such as PCI-Express 5.0, CXL 1.1, DDR5 memory, and more.

Intel has quietly let out details of its latest-generation Xeon W series workstation processors based on the 14 nm "Rocket Lake" silicon. These chips are built in the same Socket LGA1200 package as the 11th Gen Core desktop processors, but compatible with the W580 chipset. The lineup includes two 6-core/12-thread; and five 8-core/16-thread parts. Leading the pack is the Xeon W-1390P, with clock speeds of up to 5.30 GHz, followed by the W-1390, at 5.20 GHz. These two SKUs feature Thermal Velocity Boost, and are analogous with the 11th Gen Core i9 series.

Next up, are the Xeon W-1370P and W-1370, clocked at speeds of up to 5.20 GHz, and 5.10 GHz respectively, These parts lack Thermal Velocity Boost, and are comparable in many ways to the 11th Gen Core i7 SKUs. The slowest of these 8-core parts is the energy-efficient W-1390T, ticking at nominal clocks of just 1.50 GHz, with 4.90 GHz maximum boost, but a TDP of just 35 W. Among the other SKUs, the "P" SKUs have rated TDP of 125 W, while the non-P ones have 80 W. The 6-core/12-thread SKUs include the W-1350P and W-1350, clocked up to 5.10 GHz and 5.00 GHz, respectively. All Xeon W processors support up to 128 GB of dual-channel DDR4-3200 memory with ECC support.

AMD has registered the steepest single-quarter growth in server CPU sales in 15 years, for Q1-2021, according to Mercury Research data accessed by Tom's Hardware. "While we don't often discuss average selling prices, we note that this quarter saw unusually strong price moves for AMD -- as AMD shipped fewer low-end parts and more high-end parts, as well as shipping many more server parts, the company's average selling price increased significantly," said Dean McCarron of Mercury Research. Unfortunately, the growth in its EPYC server CPU sales also coincides with a drop in notebook CPU sales. It's also interesting to note here that AMD's Q1-2021 performance with server CPUs also coincides with a 20% drop in revenue for its Data Center Group, the business unit responsible for sales of its Xeon server processors.

As AI technology becomes ubiquitous, the impact of unusual weather also gains more attention. The most impressive case was the sudden weather change in Denver, the US, last September that the temperature dropped from 37°C to minus overnight. Faced with such fluctuation, the devices which maintained the daily life of the city in order, like the facilities for traffic flow analysis, surveillance, and AI visual analytics, could no longer operate normally, or even damaged, due to the lack of endurance to the extreme weathers.

Inspired by the situation, DFI brought an innovative design into the newly-released CS551, the "World's First 3.5" desktop SBC with auto heat-up". This breakthrough gives devices high performance with smaller footprint for image analysis or heavy workloads, no matter at subzero temperatures or under heat waves.

Intel's upcoming Xeon "Sapphire Rapids" enterprise processor come come with CPU core-counts as high as 80, according to the latest round of photo-leaks. An earlier article predicted the chip cram up to 56 cores alongside on-package HBM. The processor reportedly features up to 80 cores, spread across four 20-core chiplets. Unlike on the latest AMD EPYC processor, there doesn't appear to be a centralized I/O controller die. This particular processor is based in the LGA4189 package, which features additional pins compared to the LGA4577-X socket from the 56-core leak. The newer socket has additional pins that enable next-gen I/O, which include PCI-Express Gen 5.0, and CXL 1.1 interface.

AAEON, an industry leader of AI and IOT solutions, is excited to celebrate the launch of Intel's latest scalable platform, the 3rd Generation Intel Xeon Scalable Processors (formerly Ice Lake-SP). As an associate member of the Intel IoT Solutions Alliance, AAEON is excited to bring this new technology to market with the ARES-WHI0 industrial ATX server board and other future products.

The 3rd Generation Intel Xeon Scalable Processors deliver the next generation of high-end computing performance and support for vital data integrity and security technologies. This new generation of Xeon SP brings higher processing speeds and Intel's Deep Learning Boost technology, allowing for greater acceleration and more efficient processing for AI server applications.

AMD via its official YouTube channel shared a video of two of its Epyc chips destroying Cinebench's R23 benchmark, setting a new world record in the process. The record-setting feat was achieved with two off-the shelf Epyc 7763 CPUs - the ones with 64 physical CPUs and 128 threads of Zen 3 IPC. The system, which was built on top of a reference server motherboard and paired with server-grade aircooling, reached a grand total of 113,631 points - completing the benchmark run is around ten (10) measly seconds and soaring through the previous record-holder, a heavily overclocked Ryzen Threadripper 3990X (105,170 points).

The AMD system crushes the closest-priced Intel Xeon CPUs in performance - a dual Intel Xeon Platinum 8380 (Ice Lake-SP generation) configuration reached a comparably paltry 74,630 points - and AMD wins in the price-performance ratio again, with each of its Epyc 7763 CPUs costing $7,890 compared to $8,100 for each of the Intel Xeon platinum 8380. AMD's name of choice for their server-grade CPUs offering up a justification for its admittedly 15-year-old naming scheme. Catch the AMD video after the break.

Intel has just launched its Ice Lake-SP lineup of Xeon Scalable processors, featuring the new Sunny Cove CPU core design. Built on the 10 nm node, these processors represent Intel's first 10 nm shipping product designed for enterprise. However, there is another 10 nm product going to be released for enterprise users. Intel is already preparing the Sapphire Rapids generation of Xeon processors and today we get to see more details about it. Thanks to the anonymous tip that VideoCardz received, we have a bit more details like core count, memory configurations, and connectivity options. And Sapphire Rapids is shaping up to be a very competitive platform. Do note that the slide is a bit older, however, it contains useful information.

The lineup will top at 56 cores with 112 threads, where this processor will carry a TDP of 350 Watts, notably higher than its predecessors. Perhaps one of the most interesting notes from the slide is the department of memory. The new platform will make a debut of DDR5 standard and bring higher capacities with higher speeds. Along with the new protocol, the chiplet design of Sapphire Rapids will bring HBM2E memory to CPUs, with up to 64 GBs of it per socket/processor. The PCIe 5.0 standard will also be present with 80 lanes, accompanying four Intel UPI 2.0 links. Intel is also supposed to extend the x86_64 configuration here with AMX/TMUL extensions for better INT8 and BFloat16 processing.

Intel today launched its most advanced, highest performance data center platform optimized to power the industry's broadest range of workloads—from the cloud to the network to the intelligent edge. New 3rd Gen Intel Xeon Scalable processors (code-named "Ice Lake") are the foundation of Intel's data center platform, enabling customers to capitalize on some of the most significant business opportunities today by leveraging the power of AI.

New 3rd Gen Intel Xeon Scalable processors deliver a significant performance increase compared with the prior generation, with an average 46% improvement on popular data center workloads. The processors also add new and enhanced platform capabilities including Intel SGX for built-in security, and Intel Crypto Acceleration and Intel DL Boost for AI acceleration. These new capabilities, combined with Intel's broad portfolio of Intel Select Solutions and Intel Market Ready Solutions, enable customers to accelerate deployments across cloud, AI, enterprise, HPC, networking, security and edge applications.

Intel today is launching its 3rd Generation Xeon Scalable processor bringing its first major IPC uplift to the enterprise space in five years. The Xeon Scalable processors are built on the 10 nm SuperFin process, and the "Ice Lake-SP" microarchitecture that bring new "Sunny Cove" CPU cores to the server space, including support for PCI-Express 4.0 I/O capabilities, a wider memory interface, and a more feature-rich AVX-512 instruction-set, along with DLBoost for HPC. join us for its launch live-blog.14:59 UTC: CEO Pat Gelsinger and Data Platforms group head Navin Shenoy are expected to take centerstage. Xeon and memory group head Lisa Spelman could announce relevant platform products. This is Gelsinger's first major launch since taking office.

15:01 UTC: What will you solve for?

Intel is reportedly giving final touches to the Xeon W-1300 line of enterprise processors targeting workstations, according to an ASRock CPU support list dug up by Komachi Ensaka. The processors are based on the same 14 nm "Rocket Lake" silicon as the company's 11th Gen Core desktop processors, and come in core counts of up to 8-core/16-thread. The lineup is expected to debut with five SKUs, three of which are 8-core/16-thread, and two 6-core/12-thread.

The lineup is led by the W-1370, with base frequency of 2.90 GHz, 16 MB of shared L3 cache, and 80 W TDP. Next up, is the slightly slower W-1390, clocked at 2.80 GHz, and 80 W TDP. The third 8-core part is the W-1390T, which is clocked at just 1.50 GHz (base), and comes with aggressive power-management that gives it a TDP rating of 35 W. The 6-core/12-thread W-1350P has the highest clock speeds, with a base frequency of 4.00 GHz, 12 MB of shared L3 cache, and 125 W TDP. The W-1350 is its slower sibling, clocked at 3.30 GHz, and 80 W TDP. The processors will be compatible with Intel Z490, W480, and H470 chipsets, besides their 500-series successors.

Intel today revealed that it will launch its 3rd Generation Xeon Scalable processor series at an online event titled "How Wonderful Gets Done 2021," on April 6, 2021. This will be one of the first major media events headed by Intel's new CEO, Pat Gelsinger. Besides the processor launch, Intel is expected to detail many of its advances in the enterprise space, particularly in the areas of 5G infrastructure rollout, edge computing, and AI/HPC. The 3rd Gen Xeon Scalable processors are based on the new 10 nm "Ice Lake-SP" silicon, heralding the company's first CPU core IPC gain in the server space since 2015. The processors also introduce new I/O capabilities, such as PCI-Express 4.0.

Hewlett Packard Enterprise, the company focused on making enterprise hardware and software, has today mistakenly listed some of Intel's upcoming 3rd generation Xeon Scalable processors. Called Ice Lake-SP, the latest server processor generation is expected to launch sometime in the coming days, with a possible launch date being the March 23rd "Intel Unleashed" webcast. The next generation of processors will finally bring a new vector of technologies Intel needs in server space. That means the support for PCIe 4.0 protocol for higher speed I/O and octa-channel DDR4 memory controller for much greater bandwidth. The CPU lineup will for the first time use Intel's advanced 10 nm node called 10 nm SuperFin.

Today, in the leaked HPE listing, we get to see some of the Xeon models Intel plans to launch. Starting from 32-core models, all the way to 40-core models, all SKUs above 28 cores are supposed to use dual die configuration to achieve high core counts. The limit of a single die is 28 cores. HPE listed a few models, with the highest-end one being the Intel Xeon Platinum XCC 8380 processor. It features 40 cores with 80 threads and a running frequency of 2.3 GHz. If you are wondering about TDP, it looks like the 10 nm SuperFin process is giving good results, as the CPU is rated only for 270 Watts of power.

AMD today announced its 3rd generation EPYC (7003 series) enterprise processors, codenamed "Milan." These processors combine up to 64 of the company's latest "Zen 3" CPU cores, with an updated I/O controller die, and promise significant performance uplifts and new security capabilities over the previous generation EPYC 7002 "Rome." The "Zen 3" CPU cores, AMD claims, introduce an IPC uplift of up to 19% over the previous generation, which when combined by generational increases in CPU clock speeds, bring about significant single-threaded performance increases. The processor also comes with large multi-threaded performance gains thanks to a redesigned CCD.

The new "Zen 3" CPU complex die (CCD) comes with a radical redesign in the arrangement of CPU cores, putting all eight CPU cores of the CCD in a single CCX, sharing a large 32 MB L3 cache. This the total amount of L3 cache addressable by a CPU core, and significantly reduces latencies for multi-threaded workloads. The "Milan" multi-chip module has up to eight such CCDs talking to a centralized server I/O controller die (sIOD) over the Infinity Fabric interconnect.

According to the official company website, Apple will no longer manufacture its iMac Pro computers based on Intel processors. Instead, the company will carry these models in its store, only while the supplies last. Apple will be replacing these models with next-generation iMac Pro devices that will be home to the custom Apple Silicon processors, combining Arm CPU cores with custom GPU design. Having a starting price of 4990 USD, the Apple iMac Pro was able to max out at 15000 USD. The most expensive part was exactly the Intel Xeon processor inside it, among the AMD GPU with HBM. Configuration pricing was also driven by storage/RAM options. However, even the most expensive iMac Pro with its 2017 hardware had no chance against the regular 2020 iMac, so the product was set to be discontinued sooner or later.

When the stock of the iMac Pro runs out, Apple will replace this model with its Apple Silicon equipped variant. According to the current rumor mill, Apple is set to hold a keynote on March 16th that will be an announcement for new iMac Pro devices with custom processors. What happens is only up to Apple, so we have to wait and see.

Cincoze, a professional manufacturer of embedded systems, has announced its new flagship GPU edge computing system, the GP-3000. Its crowning feature is an exclusive GPU Expansion Box that provides expansion for up to two high-end GPU graphics cards and creating a high-performance industrial-grade GPU computer. Brandon Chien, General Manager of Cincoze, stated that "We already know AI will drive innovation and expansion for industrial applications. The GP-3000 is Cincoze's answer for intensive image processing and complex calculations, such as deep machine learning, autonomous driving, automated visual inspection, and mobile monitoring. As our latest flagship model, the GP-3000 multiplies edge computing efficiency, amplifies productivity and reliability, and accelerates AIoT automation."

The GP-3000's extreme computing power starts with an 8th or 9th generation Intel Xeon or Core i3/i5/i7 (Coffee Lake and Coffee Lake-R) CPU, Intel C246 chipset, and supports two sets of DDR4-2666 ECC/non-ECC SO-DIMM up to 64 GB and can support up to two 250 W high-end GPU graphics cards. With a total system power consumption of 720 W, it's easy to meet and exceed high-efficiency application requirements. A precision heat dissipation and cooling design quickly wick away heat, keeping the focus squarely on the breathtaking performance of the GP-3000.