"The Earth is Blue," said Yuri Gagarin, the first human to journey into space. With two-thirds of its surface covered in water, Earth is a planet that exuberates its blue radiance in the dark space. However, today, the scarcity of water is a challenge that planet Earth is confronted with. For some, this may be hard to understand. What happened to our blue planet Earth? To put in numbers, more than 97% of the water on Earth consists of seawater, with another 2% locked in ice caps. That only leaves a mere 1% of water available for our daily use. The problem lies in the fact that this 1% of water is gradually becoming scarcer due to reasons such as climate change, environmental pollution, and population growth, leading to increased water stress. 'Water stress' is quantified by the proportion of water demand to the available water resources on an annual basis, indicating the severity of water scarcity as the stress index rises. Higher stress indexes signify experiencing severe water scarcity.

The semiconductor ecosystem, unsustainable without water
Because water stress issues transcend national boundaries, various stakeholders including international organizations and governments work to negotiate water resource management strategies and promote collaboration. UN designates March 22nd as an annual "World Water Day" to raise awareness about the severity of water scarcity running various campaigns. Now, it's imperative for companies to also take responsibility for the water resources given and pursue sustainable management.

According to Bloomberg's latest investigation, Huawei and Semiconductor Manufacturing International Corporation (SMIC) have submitted patents on the self-aligned quadruple patterning (SAQP) pattern etching technique to enable SMIC to achieve 5 nm semiconductor production. The two Chinese giants have been working with the Deep Ultra Violet (DUV) machinery to develop a pattern etching technique allowing SMIC to produce a node compliant with the US exporting rules while maintaining the density improvements from the previously announced 7 nm node. In the 7 nm process, SMIC most likely used self-aligned dual patterning (SADP) with DUV tools, but for the increased density of the 5 nm node, a doubling to SAQP is required. In semiconductor manufacturing, lithography tools take multiple turns to etch the design of the silicon wafer.

Especially with smaller nodes getting ever-increasing density requirements, it is becoming challenging to etch sub-10 nm designs using DUV tools. That is where Extreme Ultra Violet (EUV) tools from ASML come into play. With EUV, the wavelengths of the lithography printers are 14 times smaller than DUV, at only 13.5 nm, compared to 193 nm of ArF immersion DUV systems. This means that without EUV, SMIC has to look into alternatives like SAQP to increase the density of its nodes and, as a result, include more complications and possibly lower yields. As an example, Intel tried to use SAQP in its first 10 nm nodes to reduce reliance on EUV, which resulted in a series of delays and complications, eventually pushing Intel into EUV. While Huawei and SMIC may develop a more efficient solution for SAQP, the use of EUV is imminent as the regular DUV can not keep up with the increasing density of semiconductor nodes. Given that ASML can't ship its EUV machinery to China, Huawei is supposedly developing its own EUV machines, but will likely take a few more years to show.

During its 55th annual shareholders' meeting, Samsung Electronics announced its entry into the AI processor market with the upcoming launch of its Mach-1 AI accelerator chips in early 2025. The South Korean tech giant revealed its plans to compete with established players like NVIDIA in the rapidly growing AI hardware sector. The Mach-1 generation of chips is an application-specific integrated circuit (ASIC) design equipped with LPDDR memory that is envisioned to excel in edge computing applications. While Samsung does not aim to directly rival NVIDIA's ultra-high-end AI solutions like the H100, B100, or B200, the company's strategy focuses on carving out a niche in the market by offering unique features and performance enhancements at the edge, where low power and efficient computing is what matters the most.

According to SeDaily, the Mach-1 chips boast a groundbreaking feature that significantly reduces memory bandwidth requirements for inference to approximately 0.125x compared to existing designs, which is an 87.5% reduction. This innovation could give Samsung a competitive edge in terms of efficiency and cost-effectiveness. As the demand for AI-powered devices and services continues to soar, Samsung's foray into the AI chip market is expected to intensify competition and drive innovation in the industry. While NVIDIA currently holds a dominant position, Samsung's cutting-edge technology and access to advanced semiconductor manufacturing nodes could make it a formidable contender. The Mach-1 has been field-verified on an FPGA, while the final design is currently going through a physical design for SoC, which includes placement, routing, and other layout optimizations.

The Biden-Harris Administration announced today that Intel and the U.S. Department of Commerce have signed a non-binding preliminary memorandum of terms (PMT) for up to $8.5 billion in direct funding to Intel for commercial semiconductor projects under the CHIPS and Science Act. CHIPS Act funding aims to increase U.S. semiconductor manufacturing and research and development capabilities, especially in leading-edge semiconductors. Intel is the only American company that both designs and manufactures leading-edge logic chips. The proposed funding would help advance Intel's critical semiconductor manufacturing and research and development projects at its sites in Arizona, New Mexico, Ohio and Oregon, where the company develops and produces many of the world's most advanced chips and semiconductor packaging technologies.

"Today is a defining moment for the U.S. and Intel as we work to power the next great chapter of American semiconductor innovation," said Intel CEO Pat Gelsinger. "AI is supercharging the digital revolution and everything digital needs semiconductors. CHIPS Act support will help to ensure that Intel and the U.S. stay at the forefront of the AI era as we build a resilient and sustainable semiconductor supply chain to power our nation's future."

Arizona State University (ASU) and Deca Technologies (Deca), a premier provider of advanced wafer- and panel-level packaging technology, today announced a groundbreaking collaboration to create North America's first fan-out wafer-level packaging (FOWLP) research and development center.

The new Center for Advanced Wafer-Level Packaging Applications and Development is set to catalyze innovation in the United States, expanding domestic semiconductor manufacturing capabilities and driving advancements in cutting-edge fields such as artificial intelligence, machine learning, automotive electronics and high-performance computing.

According to the latest report by Reuters, the US government is preparing to announce a multi-billion dollar grant for Intel's chip manufacturing operations in Arizona next week, possibly worth more than $10 billion. US President Joe Biden and Commerce Secretary Gina Raimondo will make the announcement, which is part of the 2022 CHIPS and Science Act aimed at expanding US chip production and reducing dependence on China and Taiwan manufacturing. The exact amount of the grant has yet to be confirmed, but rumors suggest it could exceed $10 billion, making it the most significant award yet under the CHIPS Act. The funding will include grants and loans to bolster Intel's competitive position and support the company's US semiconductor manufacturing expansion plans. This comes as a surprise just a day after the Pentagon reportedly refused to invest $2.5 billion in Intel as a part of a secret defense grant.

Intel has been investing significantly in its US expansion, recently opening a $3.5 billion advanced packaging facility in New Mexico, supposed to create extravagant packaging technology like Foveros and EMIB. The chipmaker is also expanding its semiconductor manufacturing capacity in Arizona, with plans to build new fabs in the state. Arizona is quickly becoming a significant hub for semiconductor manufacturing in the United States. In addition to Intel's expansion, Taiwan Semiconductor Manufacturing Company (TSMC) is also building new fabs in the state, attracting supply partners to the region. CHIPS Act has a total funding capacity of $39 billion allocated for semiconductor production and $11 billion for research and development. The Intel grant will likely cover the production part, as Team Blue has been reshaping its business units with the Intel Product and Intel Foundry segments.

Intel CEO Pat Gelsinger, speaking at the Intel Foundry Services (IFS) Direct Connect event, confirmed to Tom's Hardware that he hopes to turn IFS into the West's premier foundry company, and a direct technological and volume rival to TSMC. He said that there is a clear line of distinction between Intel Products and Intel Foundry, and that later this year, IFS will be more legally distinct from Intel, becoming its own entity. The only way Gelsinger sees IFS being competitive to TSMC, is by making its most advanced semiconductor manufacturing nodes and 3D chip packaging innovations available to foundry customers other than itself (Intel Products), even if it means providing them to companies that directly compete with Intel products, such as AMD and Qualcomm.

Paul Alcorn of Tom's Hardware asked CEO Gelsinger "Intel will now offer its process nodes to some of its competitors, and there may be situations wherein your product teams are competing directly with competitors that are enabled by your crown jewels. How do you plan to navigate those types of situations and maybe soothe ruffled feathers on your product teams?" To this, Gelsinger responded "Well, if you go back to the picture I showed today, Paul, there are Intel products and Intel foundry, There's a clean line between those, and as I said on the last earnings call, we'll have a setup separate legal entity for Intel foundry this year," Gelsinger responded. "We'll start posting separate financials associated with that going forward. And the foundry team's objective is simple: Fill. The. Fabs. Deliver to the broadest set of customers on the planet."

The U.S. Department of Commerce today announced $1.5 billion in planned direct funding for GlobalFoundries (Nasdaq: GFS) (GF) as part of the U.S. CHIPS and Science Act. This investment will enable GF to expand and create new manufacturing capacity and capabilities to securely produce more essential chips for automotive, IoT, aerospace, defense, and other vital markets.

New York-headquartered GF, celebrating its 15th year of operations, is the only U.S.-based pure play foundry with a global manufacturing footprint including facilities in the U.S., Europe, and Singapore. GF is the first semiconductor pure play foundry to receive a major award (over $1.5 billion) from the CHIPS and Science Act, designed to strengthen American semiconductor manufacturing, supply chains and national security. The proposed funding will support three GF projects:

Dylan Patel, of SemiAnalysis, has highlighted worrying industry trends from an October 2021 published report—the Center for Security and Emerging Technology (CSET) document explored and "(outlined) infrastructure investments and regulatory reforms that could make the United States a more attractive place to build new chipmaking capacity and ensure continued U.S. access to key inputs for semiconductor manufacturing." Citing CSET/World Fab Forecast findings, Patel expressed his dissatisfaction with the apparent lack of progress in the region: "The United States is the slowest relevant country in the world to build a fab thanks to NIMBY assholes and the garbage regulatory/permitting system." The SemiAnalysis staffer likely believes that unsuitable conditions remain in place, and continue to hinder any forward momentum—for greenfield fabrications projects, at least.

The CSET 2021 report posited that the proposed $52 billion CHIPS Act fund would not solve all USA chip industry problems—throwing a large sum of money into the pot is not always a surefire solution: "The United States' ability to expeditiously construct fabs has declined at the same time as the total number of fab projects in the United States has declined. Some of this is due to changes in the global semiconductor value chain, which has concentrated resources in Asia as foundries have risen in prominence, and countries like Taiwan, South Korea, and China have established significant market share in the industry from 1990 to 2020. However, during this same 30-year period, the time required to build a new fab in the United States increased 38 percent, rising from an average of 665 days (1.8 years) during the 1990 to 2000 time period to 918 days (2.5 years) during the 2010-2020 time period (Figure 2). At the same time, the total number of new fab projects in the United States was halved, decreasing from 55 greenfield fab projects in the 1990-2000 time period to 22 greenfield fab projects between 2010 and 2020." Intel's work-in-progress Ohio fabrication site has suffered numerous setbacks (including delayed CHIPS Act payments)—the latest news articles suggest that an opening ceremony could occur in late 2026 or early 2027. Reportedly, TSMC's Arizona facility is a frequently runs into bureaucratic and logistical headaches—putting pressure on company leadership at their Hsinchu (Taiwan) headquarters.

Intel is aiming to get its $20 billion fabrication location—in New Albany, Ohio—up and running by 2025, but the advanced manufacturing facility is facing another round of setbacks. According to a WCMH NBC4 local news report (covering the Colombus, Ohio area), a planned "oversized equipment" reshuffle has been delayed—the shifting of heavy machinery was supposed to start last weekend. Extreme weather conditions (flooding) have been cited as major factor, as well as the complicated nature of transporting "overweight and oversized" loads to Team Blue's 1000-acre site. Workers are set to resume efforts this weekend—starting no later than February 17. Tom's Hardware has kept tabs on the Ohio fab's progress: "The project to move the equipment is expected to last over nine months, meaning this phase of Intel's construction could be done near the end of 2024. There isn't a firm indication of how much work remains to be done at the site after the equipment is delivered." TPU previously covered the leading-edge location's indefinitely postponed groundbreaking ceremony—CHIPS Act subsidies were not delivered in an expected timely manner back in 2022.

A couple of media outlets (Tom's Hardware, Network World, etc.) have received an official statement regarding the slippage of events in New Albany: "While we will not meet the aggressive 2025 production goal that we anticipated when we first announced the selection of Ohio in January, 2022, construction has been underway since breaking ground in late 2022 and our construction has been proceeding on schedule. Typical construction timelines for semiconductor manufacturing facilities are 3-5 years from groundbreaking, depending on a range of factors...We remain fully committed to the project and are continuing to make progress on the construction of the factory and supporting facilities this year. As we said in our January 2022 site-selection announcement, the scope and pace of Intel's expansion in Ohio may depend on various conditions." Industry insiders believe that an "opening ceremony" could occur around late 2026, or even early 2027.

Japanese tech giant Canon hopes to shake up the semiconductor manufacturing industry by shipping new low-cost nanoimprint lithography (NIL) machines as early as this year. The technology, which stamps chip designs onto silicon wafers rather than using more complex light-based etching like market leader ASML's systems, could allow Canon to undercut rivals and democratize leading-edge chip production. "We would like to start shipping this year or next year...while the market is hot. It is a very unique technology that will enable cutting-edge chips to be made simply and at a low cost," said Hiroaki Takeishi, head of Canon's industrial group overseeing nanoimprint lithography technological advancement. Nanoimprint machines target a semiconductor node width of 5 nanometers, aiming to reach 2 nm eventually. Takeishi said the technology has primarily resolved previous defect rate issues, but success will depend on convincing customers that integration into existing fabrication plants is worthwhile.

There is skepticism about Canon's ability to significantly disrupt the market led by ASML's expensive but sophisticated extreme ultraviolet (EUV) lithography tools. However, if nanoimprint can increase yields to nearly 90% at lower costs, it could carve out a niche, especially with EUV supply struggling to meet surging demand. Canon's NIL machines are supposedly 40% the cost of ASML machinery, while operating with up to 90% lower power draw. Initially focusing on 3D NAND memory chips rather than complex processors, Canon must contend with export controls limiting sales to China. But with few options left, Takeishi said Canon will "pay careful attention" to sanctions risks. If successfully deployed commercially after 15+ years in development, Canon's nanoimprint technology could shift the competitive landscape by enabling new players to manufacture leading-edge semiconductors at dramatically lower costs. But it remains to be seen whether the new machines' defect rates, integration challenges, and geopolitical headwinds will allow Canon to disrupt the chipmaking giants it aims to compete with significantly.

Global semiconductor capacity is expected to increase 6.4% in 2024 to top the 30 million *wafers per month (wpm) mark for the first time after rising 5.5% to 29.6 wpm in 2023, SEMI announced today in its latest quarterly World Fab Forecast report.

The 2024 growth will be driven by capacity increases in leading-edge logic and foundry, applications including generative AI and high-performance computing (HPC), and the recovery in end-demand for chips. The capacity expansion slowed in 2023 due to softening semiconductor market demand and the resulting inventory correction.

Dai Nippon Printing Co., Ltd. (DNP) has successfully developed a photomask manufacturing process capable of accommodating the 3-nanometer (10-9 meter) lithography process that supports Extreme Ultra-Violet (EUV) lithography, the cutting-edge process for semiconductor manufacturing.

Background
DNP has continually responded to the demands of semiconductor manufacturers in terms of performance and quality. In 2016, we became the world's first merchant photomask manufacturer to introduce the multi-beam mask writing tool (MBMW). In 2020, we developed a photomask manufacturing process for 5 nm EUV lithography processes, and have been supplying masks that meet the needs of the semiconductor market. In this latest development, in order to meet the needs of further miniaturization, we have developed a photomask for EUV lithography capable of supporting 3 nm processes.

Thanks to the TMTPost interview with the Global Vice President and China President of ASML, Shen Bo, the Dutch semiconductor equipment manufacturer has revealed that around 1,400 of its deep ultraviolet (DUV) lithography and metrology machines are currently installed in China. The company is expected to achieve a global output of 600 DUV equipment units by the end of 2025. Shen Bo stated that the company aims to install 500-600 units of DUV machinery in China by late 2025 or early 2026. The growth in ASML's Chinese revenues was notably high, with China contributing 46% of the company's system sales in 3Q 2023, representing an 82% revenue increase from the previous quarter.

China plans to build 25 12-inch wafer fabs in the next five years, covering logic wafers, DRAM, and MEMS production. ASML currently has a substantial presence in China, with 16 offices, 12 warehouses, distribution centers, development centers, training centers, and maintenance centers. The company employs over 1,600 people for its China operations. Despite the export restrictions imposed by the US government, ASML anticipates that the new measures will have little impact on its financial outlook for 2023 as it strives to meet the growing demand for semiconductor manufacturing equipment in the global market.

Texas Instruments (TI) today broke ground on its new 300-mm semiconductor wafer fabrication plant (or "fab") in Lehi, Utah. Joined by Utah Governor Spencer Cox, state and local elected officials, as well as community leaders, TI President and Chief Executive Officer Haviv Ilan celebrated the first steps toward construction of the new fab, LFAB2, which will connect to the company's existing 300-mm wafer fab in Lehi. Once completed, TI's two Utah fabs will manufacture tens of millions of analog and embedded processing chips every day at full production.

"Today we take an important step in our company's journey to expand our manufacturing footprint in Utah. This new fab is part of our long-term, 300-mm manufacturing roadmap to build the capacity our customers will need for decades to come," said Ilan. "At TI, our passion is to create a better world by making electronics more affordable through semiconductors. We are proud to be a growing member of the Utah community, and to manufacture analog and embedded processing semiconductors that are vital for nearly every type of electronic system today."

According to a news post by Reuters, Vietnam is the latest nation that is trying to become a semiconductor manufacturing nation, albeit its plans are nothing like what China is doing, instead the nation is trying to woo existing semiconductor companies to build fabs in Vietnam. The nation has been building its high-tech industry over a few years now and although it's nowhere near some of its neighbouring nations, Vietnam is likely to become an important player when it comes to assembly in the not too distant future, alongside India. However, fabricating semiconductors is a big leap from assembling smartphones, computers and EVs and requires a highly skilled workforce, something which is already becoming an issue in nations like Taiwan and Singapore.

Reuters reports that Vietnam has approached both GlobalFoundries and Taiwanese Powerchip Semiconductor Manufacturing Corporation, or PSMC for short. PSMC is among the top 10 foundries in the world, despite only having a mere five fabs, all of which are located in Taiwan. PSMC's main focus is the automotive industry and might be the more likely candidate to consider Vietnam of the two. Neither company has made any kind of commitment to invest in Vietnam. However, building a fab in a nation that doesn't have a semiconductor industry brings with it several challenges, least not supply chain related ones. Reuters mentioned a speech by Synopsys VP Robert Li which he held at the Vietnam Semiconductor Summit, where he mentions that building a foundry in Vietnam might cost as much as US$50 billion, which doesn't seem like a very appealing proposal to any company considering opening up a foundry in the nation.

The Chinese semiconductor industry is advancing, and interestingly, it is growing rapidly under sanctions, even with the blacklisting of companies by the US government. China's semiconductor industry is mainly represented by companies like Semiconductor Manufacturing International Corp (SMIC) and Huawei Technologies, who are leading the investment and progress in both chip manufacturing and chip design. According to the latest interview with Bloomberg, former TSMC Vice President Burn J. Lin said that the US government and its sanctions can not stop the advancement of Chinese semiconductor companies. Currently, Lin notes that SMIC and Huawei can use older machinery to produce more advanced chips.

Even so, SMIC could progress to 5 nm technology using existing equipment, particularly with scanners and other machinery from ASML. Development under sanctions would also force China to experiment with new materials and other chip packaging techniques that yield higher performance targets. SMIC has already developed a 7 nm semiconductor manufacturing node, which Huawei used for its latest Mate 60 Pro smartphone, based on Huawei's custom HiSilicon Kirin 9000S chip. Similarly, the transition is expected to happen to the 5 nm node as well, and it is only a matter of time before we see other nodes appear. "It is just not possible for the US to completely prevent China from improving its chip technology," noted Burn J. Lin.

Today, the US authorities published the updated version of the advanced computing and semiconductor manufacturing equipment rule, imposing additional restrictions on export of advanced chip manufacturing technology. These regulations will become effective after a period of 30 days. Given the length and complexity of the regulations, ASML will need to carefully assess any potential implications. However, as to our business, from the information we received, it is our understanding that the new regulations will be applicable to a limited number of fabs in China related to advanced semiconductor manufacturing.

These export control measures will likely have an impact on the regional split of our systems sales in the medium to long term. However, we do not expect these measures to have a material impact on our financial outlook for 2023 and for our longer-term scenarios for 2025 and 2030, as communicated during our Investor Day in November 2022. ASML will seek further clarification from the US authorities on the scope of these new regulations. ASML is fully committed to comply with all applicable laws and regulations including export control legislation in the countries in which we operate.

Micron Technology, Inc., one of the world's largest semiconductor companies, today marked a historic day with the opening of its new cutting-edge assembly and test facility in Batu Kawan, Penang, alongside the celebration of Micron's 45th anniversary. A ceremony officiated by Chief Minister of Penang, Yang Amat Berhormat Tuan Chow Kon Yeow, underscored the regional significance of Micron's expansion, highlighting the company's four and a half decades of innovation and excellence.

Micron previously invested $1 billion and will add up to another billion including construction and full equipping of this new facility over the next few years in Penang to increase factory space to a total of 1.5 million square feet. This expansion enables Micron Malaysia to boost production output and further strengthen its assembly and test capabilities, allowing it to supply leading-edge NAND, PCDRAM and SSD modules to meet the growing demand for transformative technologies such as artificial intelligence and autonomous or electric vehicles.

Ever since the creation of A64FX for the Fugaku supercomputer, Fujitsu has been plotting the development of next-generation CPU design for accelerating AI and general-purpose HPC workloads in the data center. Codenamed Monaka, the CPU is the latest creation for TSMC's 2 nm semiconductor manufacturing node. Based on Armv9-A ISA, the CPU will feature up to 150 cores with Scalable Vector Extensions 2 (SVE2), so it can process a wide variety of vector data sets in parallel. Using a 3D chiplet design, the 150 cores will be split into different dies and placed alongside SRAM and I/O controller. The current width of the SVE2 implementation is unknown.

The CPU is designed to support DDR5 memory and PCIe 6.0 connection for attaching storage and other accelerators. To bring cache coherency among application-specific accelerators, CXL 3.0 is present as well. Interestingly, Monaka is planned to arrive in FY2027, which starts in 2026 on January 1st. The CPU will supposedly use air cooling, meaning the design aims for power efficiency. Additionally, it is essential to note that Monaka is not a processor that will power the post-Fugaku supercomputer. The post-Fugaku supercomputer will use post-Monaka design, likely iterating on the design principles that Monaka uses and refining them for the launch of the post-Fugaku supercomputer scheduled for 2030. Below are the slides from Fujitsu's presentation, in Japenese, which highlight the design goals of the CPU.

Tenstorrent, a company that sells AI processors and licenses AI and RISC-V IP, announced today that it selected Samsung Foundry to bring Tenstorrent's next generation of AI chiplets to market. Tenstorrent builds powerful RISC-V CPU and AI acceleration chiplets, aiming to push the boundaries of compute in multiple industries such as data center, automotive and robotics. These chiplets are designed to deliver scalable power from milliwatts to megawatts, catering to a wide range of applications from edge devices to data centers.

To ensure the highest quality and cutting-edge manufacturing capabilities for its chiplet, Tenstorrent has selected Samsung's Foundry Design Service team, known for their expertise in silicon manufacturing. The chiplets will be manufactured using Samsung's state-of-the-art SF4X process, which boasts an impressive 4 nm architecture.

The Chinese government introduced restrictions on the export of gallium and germanium (plus their chemical compounds)—both crucial materials in the computer chip manufacturing process—a couple of months ago. Big players within the semiconductor industry shrugged this off as a minor inconvenience, and simply shifted to more expensive sources. Prior to an August 1 implementation of new rulings, according to Reuters, China exported 36.48 metric tons of germanium, and 22.72 tons of gallium (starting January 2023). Customers were in a rush to acquire as much material as possible, before the "cut off" date—so 8.63 tons of germanium and 5.15 tons of gallium got shifted overseas throughout July.

Reuters has kept a watchful eye on the situation since then—its latest report states that "China's exports of germanium and gallium items plunged in August, the first month of the export controls, customs data showed on Wednesday (September 20)." A Ministry of Commerce spokesman, He Yadong, last week revealed that his department will be granting a limited number of export licenses to interested parties, on the condition that these local companies "meet relevant requirements." An undisclosed percentage of submitted applications have already received government approval. Signed paperwork reportedly gives the thumbs up to "dual use" purposes, implying that potential customers are in the military and civilian fields.

According to TechNews.tw, TSMC could postpone its 2 nm semiconductor manufacturing node for 2026. If the rumors about TSMC's delayed 2 nm production schedule are accurate, the implications could reverberate throughout the semiconductor industry. TSMC's alleged hesitancy could be driven by multiple factors, including the architectural shift from FinFET to Gate-All-Around (GAA) and potential challenges related to scaling down to 2 nm. The company is a crucial player in this space, and a delay could offer opportunities for competitors like Samsung, which has already transitioned to GAA transistor architecture for its 3 nm chips. Given the massive demand for advanced nodes due to the rise of AI, IoT, and other next-gen technologies, it is surprising to hear "sluggish" demand reports.

However, it's also possible that it's too early for customers to make firm commitments for 2025 and beyond. TSMC has dismissed these rumors, stating that construction is progressing according to plan, which includes having 2 nm pilot run in 2024, and mass production in the second half of 2025.. Despite this, any delay in TSMC's roadmap could serve as a catalyst for shifts in market dynamics. Companies that rely heavily on TSMC's advanced nodes might need to reassess their timelines and strategies. Moreover, if Samsung can capitalize on this opportunity, it could somewhat level the playing field. As of now, though, it's essential to approach these rumors with caution until more concrete information becomes available.

The introduction of Generative AI (GAI) has significantly increased the demand for advanced semiconductor chips, drawing increased attention to the development of complex calculations for large-scale AI models and high-speed transmission interfaces. To assist the industry in grasping the key to high-end semiconductor manufacturing and integration capabilities, the Heterogeneous Integrated Chiplet System Package (Hi-CHIP) Alliance brings together leading semiconductor companies from Taiwan and around the world to provide comprehensive services, spanning from packaging design, testing and verification, to pilot production. Since its establishment in 2021, the alliance has accumulated important industry players as its members, including EVG, Kulicke and Soffa (K&S), USI, Raytek Semiconductor, Unimicron, DuPont, and Brewer Science. Looking forward, the alliance is set to actively explore its global market potential.

Dr. Shih-Chieh Chang, General Director of Electronic and Optoelectronic System Research Laboratories at ITRI and Chairman of the Hi-CHIP Alliance, indicated that advanced manufacturing processes have led to a considerable increase in IC design cycles and costs. Multi-dimensional chip design and heterogeneous integrated packaging architecture are key tools to tackle this demand in semiconductors. On top of that, the advent of GAI such as ChatGPT, which demands substantial computing power and transmission speed, requires even higher levels of integration capacity in chip manufacturing. ITRI has been committed to developing manufacturing technologies and upgrading materials and equipment to enhance heterogeneous integration technologies. Achievements include the fan-out wafer level packaging (FOWLP), 2.5 and 3D chips, embedded interposer connections (EIC), and programmable packages. With both local and foreign semiconductor manufacturer members, the Hi-CHIP Alliance is establishing an advanced packaging process production line to provide an integrated one-stop service platform.

China has sharply increased imports of semiconductor manufacturing equipment in recent months, customs data reveals. The country's purchases of chip production tools surged to record highs of nearly $5 billion in June and July, a 70% increase versus the same period last year, which amounted to $2.9 billion. The spike comes right before export restrictions on advanced chipmaking equipment are implemented by the U.S. and its allies. The moves aim to slow China's technological advancement, but Chinese chipmakers are stockpiling to avoid disruptions. Much of the equipment comes from the Netherlands and Japan, which have imposed licensing requirements on certain tool exports. While it's unclear how many are affected, the rush suggests China wants to expand production capacity and buffer against supply chain issues.

Chinese firms like SMIC and YMTC rely heavily on U.S., Dutch, and Japanese suppliers for cutting-edge manufacturing equipment. They are utilizing imported tools to boost the output of mature chips not subject to controls, particularly for electric vehicles, renewable energy, and industrial applications. Significantly, imports from the Netherlands doubled as lithography machines were delivered to Chinese foundries. Purchases from Japan also rose as companies procured etching tools and wafer coaters after 2020 U.S. restrictions. Newly established foundries backed by local governments contributed as Beijing pushed chip production expansions. Despite export control challenges, China aims to keep advancing its semiconductor capabilities. The import spike highlights intensified efforts to build self-sufficiency using older technology not covered by current limits.