Friday, November 6th 2015
AMD Dragged to Court over Core Count on "Bulldozer"
This had to happen eventually. AMD has been dragged to court over misrepresentation of its CPU core count in its "Bulldozer" architecture. Tony Dickey, representing himself in the U.S. District Court for the Northern District of California, accused AMD of falsely advertising the core count in its latest CPUs, and contended that because of they way they're physically structured, AMD's 8-core "Bulldozer" chips really only have four cores.
The lawsuit alleges that Bulldozer processors were designed by stripping away components from two cores and combining what was left to make a single "module." In doing so, however, the cores no longer work independently. Due to this, AMD Bulldozer cannot perform eight instructions simultaneously and independently as claimed, or the way a true 8-core CPU would. Dickey is suing for damages, including statutory and punitive damages, litigation expenses, pre- and post-judgment interest, as well as other injunctive and declaratory relief as is deemed reasonable.
Source:
LegalNewsOnline
The lawsuit alleges that Bulldozer processors were designed by stripping away components from two cores and combining what was left to make a single "module." In doing so, however, the cores no longer work independently. Due to this, AMD Bulldozer cannot perform eight instructions simultaneously and independently as claimed, or the way a true 8-core CPU would. Dickey is suing for damages, including statutory and punitive damages, litigation expenses, pre- and post-judgment interest, as well as other injunctive and declaratory relief as is deemed reasonable.
511 Comments on AMD Dragged to Court over Core Count on "Bulldozer"
Now that I think about it, looking at your performance tab, Vulkan, maybe AMD just markets it's CPUs as having X amount of Logical Processors, but they call it "Core Processors. Intel market CPUs based on y-amount of Cores which are really 2 Logical Processors to 1 Core. I think that's one part of where the problem occurs between FordGT90Concept and others having their disagreements.
If we go back to the original Topic of Discussion, the Lawsuit is probably dead on arrival. I don't believe the court is going to award damages. At best, it's a marketing blunder on AMD's end.
And that's the problem. Only AMD does that and only for the Bulldozer/Piledriver/Steamroller series of processors; hence, sued.
What I don't like is the strawman approach of referencing materialto validate a point without specifying the actual content which supposedly validates the point
The strawman doesn't know if there is any supported evidence in the article, but he's hoping there is and other guy will find it and be disproven.
I don't have time for this shit.
AMD FX-9590
2mins on Google and look what I found - Intel whitepapers with a crystal clear explanation of HT, just for you.
"A single processor appear as 2 logical processors". APPEAR. How does SMT work when there is only one physical core? Because it's using software, obviously.
See where it says OS can SCHEDULE a thread. Note SCHEDULE. Not excecute. SCHEDULE.
If u don't get that then u never will.
I don't think the addition hardware (if any) is for computing though. Can't be an additional core at all.
Bulldozer is unique in that they put more hardware resources in it to improve SMT performance which is a good thing; AMD's mistake was calling it an "8-core" when it clearly is not. There is zero software involved beyond the usual when dealing with a multiprocessor. All threads need to be scheduled before they can execute. For HTT to be of any use, a thread has to be scheduled for two logical processors of the same core at the same time. Yeah, Hyperthreading performance, depending on task, can be something like -2.5% to 30%. 5% average sounds fair.
It does take some extra transistors (I don't think Intel ever said how many) to add SMT to a core but the goal is to utilize far more transistors that would otherwise not be used down the pipeline.
In the early members of the family (Bulldozer and Piledriver), the instruction decoder (capable of decoding four instructions per cycle) is shared. It decodes instructions for one core each cycle, switching to the other core (if it's active) on the next cycle. In later members of the family (Steamroller and Excavator), a separate decoder is provided for each core, eliminating this bottleneck.
In all members of the family, the L1 I-cache and D-cache are shared. Since these caches are quite small (compared to Phenom II), this causes cache thrashing at a higher level when both cores are active than when only one is. The L1 caches are larger in Excavator than in previous members of the family, which contributes to its better efficiency.
The FPU is also shared in all members of the family. Most FPU instructions are multiplies or adds, so they use the FMAC pipelines, of which there are two per module. When both cores are running FPU-heavy code, effectively only one FMAC pipeline is available to each core. This is however no worse than in Phenom II, which had one multiplier and one adder in its FPU, in separate pipelines.
This is a diagram for one module, which has 2 cores. It has 2 integer units, 1 FPU, and shares an L2 cache. Conceptually, it is twice as fast at integer math in a thread, and half as fast in floating point math.
Since most server/rendering workloads are integer based, CMT scales well in multi-threading - AS LONG AS the threads are being run correctly on modules, and not split between multiple modules unnecessarily.
Windows 7 has an issue with how Bulldozer-based processors get processor threads scheduled. W7 treats them like fully independent cores, and will willy-nilly schedule threads wherever. This can cause tasks that otherwise should share FPU resources, to split across multiple modules and will cause performance degradation.
This was changed in Windows 8/8.1/10, by treating the processor as a 4 core, 8 thread chip (instead of 8 core, 8 thread) in order to properly schedule threads. On a high level, this actually emulates SMT (Hyperthreading) and results in a decent performance boost in W8/W10 for AMD processors.
There is a patch (manual install) for windows 7 that makes it schedule in the same manner, though doesn't change the appearance of task manager. You still see all 8 cores.
I don't know who pissed in your tea Ford. You also keep stating your opinion as fact.
The 5% figure here isn't for performance but I agree you claim for -2.5% ~ 30% performance increment though.
By the way, the fact the order matters is proof they aren't cores. Legitimate cores have no preference; operating systems can park and unpark them as much as it wants as well as schedule whatever it wants wherever it wants. I don't drink tea. :laugh: My bad; thanks for the clarification.
And yeah from the whitepaper OOE (out of order execuction) has to do with it, and some extra transistors....
They even say (on page 8 I think) the primary differnce between HT and True is true cores never switch between threads, the HT cores halt the execution and switch threads constantly.
And of course all resources are shared, lol
Nothing to see here .....nothing new at least.
The cores don't exist except in Windows Task Manager. The kernel schedular assigns threads to cores which in turn get scheduled, not executed...
You're detracting from the main debate anyway which is SMT. SMT is not here, as Intel said, - it's a concept.
Nothing else to say really,.
In fact, the HT of Xeon Phi (which is a rare case) can't be disabled. By all means the extra thread is a hardware implementation other than software implementation.
In that Intyel doc it states Xenon whitepaper HT threads canot SMT iover it's there in tyhe article plain it staesXenon has a limit of 6 threads I'm not stupid mate, troll harder.... you sound ridiculous.
Anyway back to why SMT came up to begin with. It's to illustrate to u Ford if u even care, why BD does have 8 real cores.
In that intel whitepaper it says a 12 core Xenon with HT is capable of sending up to 6 commands per clock cycle,. Naturally because it has only 6 cores to execute them on. SMT on 6 cores, not 12. = 6 real cores.
An 8 core Vishera send 8 commands per clock cycle because it executes 8 threads on 8 cores. That's 8 threads similtanesly= SMT = real cores.
Time to vacate the thread ......
Why? Take the case of a Bulldozer CPU with just one module enabled. Execute a thread on one integer unit and it gives a certain performance. Now execute a second thread on the other core and the performance of each thread is less than one thread on one core and there's no way that this performance hit can be alleviated by better support hardware either. It's even worse with the FPU as there's only one of them, giving truly crap performance. This only happens because of the siamesed nature of the cores. It doesn't happen on AMD's older multicore CPUs nor on Intel's, potential memory bus bottlenecks aside.
Note that a similar performance hit happens on Intel too when HT is engaged and you don't see Intel calling that second virtual core a full CPU like AMD does. I remember seeing this graphically illustrated when I used to run the SETI@Home project on my single core Pentium 4 with HT more than a decade ago, before they went BOINC. Running two threads would case each individual thread to have something like 75-85% of the performance of just one, but overall performance was higher as two were being worked on at once.
Oh yeah, AMD pulled a number on us all right by making such a hybrid processor and confusing the definition of what a core is. :rolleyes: I remember the real "wtf?!" feeling I had when I first looked at that Bulldozer architecture diagram and it turns out I was right from its lack of performance. AMD tried to save a few pennies with this strategy and it bit them in the ass with poor performance, poor sales and now a lawsuit. Someone over there was very stupid.
The topic was discussed at length when the chip got released. Seems like a bad case of dejavu..... sorry if I don't feel like revisiting the past....
I don't think he will win in court. Either way I'm happy with my choice. I didn't have money for anything better at the time.
Yeah, go on, just get off this thread like you were gonna. :nutkick:
Until then it's just an utterly futile piss take of a discussion with two distinct camps, smashing their heads against walls.
You say potato, I say potato core.
"Cores" is "kerner" in Danish.