Thursday, November 21st 2019
Intel "Tiger Lake" Microarchitecture Features HEDT-like Cache Rebalancing?
With its "Skylake" microarchitecture, Intel significantly re-balanced the cache hierarchy of its HEDT and enterprise multi-core processors to equip CPU cores with larger amounts of faster L2 caches, and lesser amounts on slower shared L3 cache. The company retained its traditional cache balance for its mobile and desktop processor derivatives. This could change with the company's "Tiger Lake" microarchitecture, particularly the "Willow Cove" CPU cores they use, according to a Geekbench online database listing for a prototype quad-core "Tiger Lake-Y" mobile processor.
According to this listing, assuming Geekbench is reading the platform correctly; the "Tiger Lake-Y" processor features a 4-core/8-thread CPU, with a massive 1,280 KB (1.25 MB) of L2 cache per core, and 12 MB of L3 cache. Intel also enlarged the L1D (data) cache to be 48 KB in size, while the L1I (instruction) cache remains 32 KB. This amounts to a 400% increase in L2 cache size, and a 50% increase in L3 cache size. Unlike with "Skylake-X," the increase in L2 cache size doesn't come with a decrease in shared L3 cache size (per core). The "Tiger Lake-Y" processor is being tested on a "Corktown" prototyping platform (a specialized motherboard that has all possible I/O connectivity available with the platform, for testing. "Tiger Lake" is expected to make its debut some time in 2020-21 as a successor to "Ice Lake," and will be built on Intel's refined 10 nm++ silicon fabrication node. Find the Geekbench entry in the source link below.
Source:
Geekbench Online Database
According to this listing, assuming Geekbench is reading the platform correctly; the "Tiger Lake-Y" processor features a 4-core/8-thread CPU, with a massive 1,280 KB (1.25 MB) of L2 cache per core, and 12 MB of L3 cache. Intel also enlarged the L1D (data) cache to be 48 KB in size, while the L1I (instruction) cache remains 32 KB. This amounts to a 400% increase in L2 cache size, and a 50% increase in L3 cache size. Unlike with "Skylake-X," the increase in L2 cache size doesn't come with a decrease in shared L3 cache size (per core). The "Tiger Lake-Y" processor is being tested on a "Corktown" prototyping platform (a specialized motherboard that has all possible I/O connectivity available with the platform, for testing. "Tiger Lake" is expected to make its debut some time in 2020-21 as a successor to "Ice Lake," and will be built on Intel's refined 10 nm++ silicon fabrication node. Find the Geekbench entry in the source link below.
25 Comments on Intel "Tiger Lake" Microarchitecture Features HEDT-like Cache Rebalancing?
Id go for a 5ghz CPU with ddr4 edram even if it was 4c/8t
intel is now slowly shifting its future-marketing away from 10nm to 7nm, because 10nm and 10++ etc. is unfixable, from what i´ve heard.
So icelake-SP will be in very low numbers and will co-exist with the cascadelake-sp successor
It can turn out that by mid 2020 Intel will be doing almost all of their mobile series (up to 25W) using 10nm.
Only some of the larger chips will remain on 14nm.
You trade cpu performance for gpu performance today so Tiger lake will be what will push mobile to 10nm unless they do a refresh of icelake in the meantime ?
For a while these CPUs were only available in "showcase" convertibles. That isn't true anymore.
This month Ice Lake U started shipping in mainstream consumer laptops: Dell Inspiron and Lenovo IdeaPad.
Sure, 14nm 10th gen is still ubiquitous, but 10nm is not "very limited" anymore if Dell and Lenovo were able to secure chips for their best selling lineups.
Some series haven't been updated yet - including workhorses like Dell Latitude and IBM ThinkPad T/L.
IMO they're waiting for Ice Lake U with vPro and 6 cores instead of Iris.
In my opinion, L4 wouldn't make much sense unless the cache hierarchy is changed even more by splitting data and instructions beyond L1, except for certain edge cases of course. Well, I guess more unique names could be useful, but does it really matter, or are you trying to find faults here? ;) Intel have recently added driver support for Tiger Lake, including mainstream desktop and entry workstation models up to 95W.
Intel have also recently stated that desktop is on the roadmap, and that yields are "ahead of expectations for client and data-center products".
It's not a question of if, but when and how many 10nm products we'll see on the desktop. Intel will not skip 10nm, 7nm will be ready in small volumes in 2021, and not mainstream volumes until 2022/2023. For 2020, it will be interesting to see if Intel will launch a platform consisting of both 10nm and 14nm parts, and if so, how it will be segmented.
Original 10nm is the process that didn't work. Intel only used it for a single i3 and a few development products.
www.techpowerup.com/forums/threads/what-i-found-about-5775c-edrams-impact-on-gaming-performance.236514/
www.anandtech.com/show/11722/intel-reveals-ice-lake-core-architecture-10nm-plus
images.anandtech.com/doci/14312/2019-Intel-Investor-Meeting-Renduchintala_12.jpg
en.wikichip.org/wiki/intel/microarchitectures/ice_lake_(client)
But do we at least agree on this being the second generation of their 10nm? :)
Icelake = 10nm
Tigerlake = 10nm++
10nm+ is slotted only for SunnycoveX in the Icelake-SP product.
Goldencove and WillowcoveX are both 7nm products, as well as Gracemont.
When Intel originally intended to release 10nm+ and 10nm++ is irrelevant to the classification of their current node which is still 1st generation 10nm. The facts are that Cannon Lake and Ice Lake (-U/-Y) are made on the same first generation of the 10nm node.
Intel themselves knows best what distinguishes the revisions of the node, and they add + or ++ to mark a major revision of the node which changes the base features; like gate pitch, materials etc.
Just because Intel originally intended 10nm(1st gen) to arrive ~2016 and 10nm+(2nd gen) ~2017, doesn't make the current iteration "10nm+"(2nd gen). Intel have continuously postponed 10nm+(2nd gen) until they have resolved the issues they faced on 10nm (1st gen), which they seem to indicate is resolved now, but time will tell.
Intel's 10nm+ node (2nd gen) will debut Q2 next year with Ice Lake-SP/-X, and followed by Tiger Lake.
Gotta have something to put them out with.
Makes me wonder about stuff like just how hot will these chips run once released and other things too.
We already know some of their chips are literal heaters, they'd best hope these won't be the same which is a similar thing to whats been happening with AMD's 7nm chips. Hotter than we're used to seeing but still works, as long as they can get that part right they'll have something working for them.
I have a suspicion "lake" denotes the node, 14nm.
Were Sandy/Ivy Bridge on the same nm level node? Or not? I forget...
EDIT: Nope. Ivy bridge was a die shrink.
Intel just went land o' lakes on us.
Gpu better, 15W vs 15W.
watch reviews of ice lake in 15W configurations and not 25W and it's obvious that while the architecture improvements give hope the node holds it back.
Ice lake U wins in all benchmarks when compared to similar 4-core 14nm CPUs.
The only 15W SoC that beats these (in multi thread) is the 6-core Comet Lake U.