Wednesday, May 27th 2020
PSA: There are Two Steppings of Non-K 10th Gen Core i5 in Circulation, Only One Comes with STIM
There are apparently two steppings of the 10th generation Intel Core i5 desktop processor in circulation, and the two have major physical differences, even if their specifications are identical per SKU. These are Q0 and G1. The Q0 stepping of the 10th gen Core i5 is based on the 10-core variant of "Comet Lake-S" silicon, the 200-odd mm² die, which comes with Intel's die-thinning innovation, and more importantly, soldered thermal interface material (STIM). For these chips, four cores on the 10-core die are disabled by Intel to carve out the 6-core/12-thread Core i5 SKU. The G1 stepping, on the other hand, is based on the 6-core variant of "Comet Lake-S," which is similar in design to the 6-core "Coffee Lake" die. The G1-stepping chips lack STIM, and use a thermal paste.
What's more, Q0 and G1 steppings have different SPEC codes. For the Core i5-10400F, the Q0 stepping variant's SPEC code is "SRH79" and the G1 stepping variant's code is "SRH3D." The underside of the processor's package looks different between the two steppings (pictured below). You won't be able to tell the underside of the package through the little window in your processor's retail package, but the SPEC code is printed on the IHS. There's no geographic marker as to which stepping is found in what particular market. Both steppings appear to be distributed uniformly, wherever available. Since Intel is using this stepping-level differentiation only among non-K SKUs, we don't expect the two to have any different performance, but possibly different thermals.
What's more, Q0 and G1 steppings have different SPEC codes. For the Core i5-10400F, the Q0 stepping variant's SPEC code is "SRH79" and the G1 stepping variant's code is "SRH3D." The underside of the processor's package looks different between the two steppings (pictured below). You won't be able to tell the underside of the package through the little window in your processor's retail package, but the SPEC code is printed on the IHS. There's no geographic marker as to which stepping is found in what particular market. Both steppings appear to be distributed uniformly, wherever available. Since Intel is using this stepping-level differentiation only among non-K SKUs, we don't expect the two to have any different performance, but possibly different thermals.
20 Comments on PSA: There are Two Steppings of Non-K 10th Gen Core i5 in Circulation, Only One Comes with STIM
badum tss
When these eventually come onto the used CPU market, every seller is going to be asked which stepping they have and it will mean the difference between sale or no sale, or sale at a much reduced price.
The 6-core isn't desperately in need of STIM to stay alive unlike the 10-core, so this makes for a very interesting comparison. I suppose it's clear to see why the 10600K and 10700K took after the 10-core die instead; Intel obviously didn't want to put in the extra effort on a blatant stopgap generation to R&D anything other than a single piece of silicon (the 10-core), so one of the highlight features, STIM + thin die, only made it to the 10-core and everything higher end in the lineup is based off of one product.
If based off mobile dies, it would be a very peculiar binning proposition: shitty? but fully enabled 6-cores vs shitty? cut down 10s.
Placement of caps on the bottom of G1 look similar to Coffee Lake 6-core, but also not quite the same. Comet Lake has 1 or 2 extra hardware mitigations, but they otherwise are identical, and it's not like any 10400 or 10400F will be able to test the frequency potential of the 6C anyways.
"Marines on stims benefit from greatly increased speed and reflexes, but are subject to long-term side effects including and not limited to insomnia, weight loss, mania/hypomania, seizures, paranoiac hallucinations, internal hemorrhaging, and cerebral deterioration. Nonetheless, both commanders and the marines themselves stand by the use of stims as essential to their continued survival and effectiveness on the battlefield."
- The uses and risks of stimpacks
starcraft.fandom.com/wiki/Stimpack
Another fun one. In the original vanilla Starcraft (paper) manual it says Stims lengthen the battlefield lifetime of Marines by as much as "10 seconds"
Brood War marine best marine
docs.google.com/spreadsheets/d/1c-UyYACl4_bmsBb4CFp1RI0A1lkA2GJUjpwM7E9zbAE/edit?usp=sharing
Head over to the LGA1200 tab and you will find all the information :)Not true, two different dies. G1 and Q0 are unique to 10th gen while B0 stepping, which the i3-9100F has a variant for (other one is U0), is actually the Kaby Lake quad core die. Ever wondered why 8th/9th gen was able to work on 100 and 200 series motherboards and vice versa? Dies were the same. Naturally, they should have worked on LGA1151 without mods. Though, LGA1200 is a bit different, but I think someone will still find a way to make it work.My assumption is, Intel used the lower binned Q0 dies for the 10400/F as well as G1 dies for the sole purpose of yields. Because they know a lot of people will be going for the 10400F, 10600K/F, 10700F, and 10900K/F.
Oh also, aside from the 10400/F, the 10600K/F are Q0 dies and NO G1 variants. So they come from the lower binned Q0 dies, which is why if you remember that chart MSI posted about overclockability being higher on the i7/i9s, well, that's why. The 10600K/F is the lowest bin Q0 dies, and the chances of getting a good one is next to none (good as in I think 5.2 GHz)