Susquehanna is a global trading firm which has various interests in silicon manufacturing - and part of that interest is naturally materialized in Intel. In a recent group call from the firm, some details on Intel's manufacturing and product design woes came to light, which point towards even more execution slips than we've already seen. During the call, a number of points were broached, including dismal yields for Intel's 10 nm manufacturing process as of its introduction in late 2018 (which is why it never saw mainstream adoption from the company). News that Intel is looking for a new CEO also don't instill confidence on current CEO Bob Swan's capacity to steer the Intel behemoth.

Improved yields on 10 nm are being reported due to deployment of Intel's SuperFin technology, which improved yields to upwards of 50%, but still keeps them under the ones achieved in Intel's 14 nm process; an eye-opening tidbit in that Cannon Lake on 10 nm originally saw yields of only 25% usable chips per wafer; and that backporting Rocket Lake meant Intel had to deal with unfathomably large chips and high power consumption characteristics. And to add insult to injury, there is still not a definite timetable for 7 nm deployment, with delays being expected to be worse than the previously reported 6-12 months. This all paints a somewhat grim picture for Intel's capacity to compete with TSMC-powered AMD in many of its most important markets; the blue giant won't topple, of course, but it's expected that five years from now, we'll be looking at a very different outlook in the market between AMD and Intel. You can check the talked-about points in the call via the transcript after the break. You should still take the transcript with a grain of salt.

• 10 nm in "full production" and "shipping for revenue" since late 2018. Charlie still doesn't think it's viable. Much more real than it once was though, but not good enough.
• Superfin is unquestionably far better than base 10 nm. Better in just about every way. Yields are better, but still on the low side.
• CNL had a yield of <25% even with iGPU disabled (seems a bit high to me but huh).
• 10 nm SF yields are far better but not as good as 14 (no surprises there). Past 50%.
• Not enough 10 nm capacity to handle the entire product stack yet. Charlie doesn't like Rocket Lake, considers the backport "painfully stupid". Will be huge and a power hog.
• 14 nm shortage caused by the fact that Intel had to bloat up die sizes.
• OEMs told they were to get a "small fraction" of orders of TGL. Improvements to yield won't fully help because no. of wafer starts is still low.
• He doesn't think 10 nm will ever exceed 14 nm capacity-wise.
• Ice Lake delayed again due to a bug, but this is a good thing. Looking like it'll come mid-late Q2 to early Q3 (although Charlie originally said March + 1.5-2 month delay?).
• Performance looks pretty poor. Akin to CL-SP actually - performance per socket remains the same but power rises. Core count for shipping parts dropped from 38 -> 36.
• Ice Lake is disappointing. Sapphire Rapids is way better. Comes in Q2 22.
• SPR was originally supposed to launch in Q2 21 to ship for Aurora but... yeah. Even then it was basically going to be a broken, alpha product which would be refined over multiple tapeouts.
• Once SPR fully rolls out and is fully sorted out it'll actually be pretty solid.
• The problem with SPR is timeline. ICL-SP was supposed to compete with Rome (and it would still lose even with the on-paper and significantly better specs than reality). Milan is going to likely beat SPR... over a year earlier and before ICL-SP rolls out. By the time SPR releases, Genoa will be here or right around the corner. Genoa was supposed to compete with GNR which is late 2023 now.
• If both companies iterate perfectly on their roadmaps as planned (much easier on AMD's side right now), Intel can not catch up to AMD until late 2024 or early 2025.
• AMD's biggest problem? Unsurprisingly - capacity.
• 7nm is significantly more delayed than the 6-12 months first claimed. PVC is in-hands basically now and it was the first 7nm product. Now it's on TSMC. Sometime December this year anyway.
• Intel may not know how much of a delay we're looking at with 7.
• Charlie thinks there are several problems with 7, not just 1. However, Charlie hasn't heard anything absolutely solid on the specifics here.
• Doesn't think Intel could sell fabs. Too many things problems involved. Fabs would need to be evaluated for the buyers needs etc etc.
• Foveros is more suited to low-power chips than servers/high power.
• Question about why ARM is more competitive in recent attempts vs previous attempts - Answer: more developed eco-system, lack of real glass-jaws compared to previous designs. Amazon is a bit more of a special case because they can design chips to exactly what they need with all the strengths and benefits that suit them best.
• Intel are going to out-source CPUs, but what and where is still being debated internally. Decision will be made in Q1 between SS and TSMC for different products. Nothing is set in stone yet.
• Intel are looking for a new CEO. There are multiple candidates, one has been shot down, 3 potential left. They are hoping to make the decision in Q1, probably after the Jan call. Does seem like Bob's going either way.
• Question: Will Intel do anything else with the backported core? A: I hope not.
• Intel won't outsource everything to TSMC because TSMC doesn't have the capacity. Intel grabbing capacity shouldn't take capacity away from AMD - TSMC should prioritise customers with long-term plans to stay with them.
• There is a 10 nm desktop product coming (Alder Lake-S) but Charlie doubts there will be much capacity for it due to it being needed elsewhere.