Tuesday, May 31st 2022
AMD Zen 4 & Socket AM5 Explained: PCIe Lanes, Chipsets, Connectivity
There has been a fair bit of confusion about AMD's upcoming AM5 platform when it comes to connectivity and we're going to break things down and explain what the difference is between the B650 and X670 boards. We're also going to cover the processor connectivity, since that's an integral part of any motherboard these days. All the information in this article is based on what we've been told by various sources during Computex.
Connectivity from the Processor
Starting with the Zen 4 processor's lanes, all of its PCIe lanes are PCIe 5.0 and there are a total of 28 lanes. The first 16 PCI Express lanes will be used for a single x16 PCIe slot, or they can be split into two x8 slots. AMD's requirements only enforce PCIe 5.0 on the X670E boards, which means PCIe 4.0 will be applicable to lower cost motherboards.
The new Zen 4 Ryzen processors will have eight general purpose lanes, of which at least four will be required to be dedicated to an M.2 storage slot (always Gen 5). The other four lanes are up to the motherboard manufacturers. Some boards will use these to implement Thunderbolt 4 (Intel Maple Ridge JHL8540) or USB4 (ASMedia ASM4242). If none of these options are used, these lanes can go towards an additional M.2 slot.
With integrated graphics becoming standard on Zen 4, the first generation of AM5 processors will offer four dedicated display outputs, with HDMI 2.1 and DisplayPort 2.0 being supported, but neither being required as far as we understand. There are also four USB 3.2 Gen 2 (10 Gbps) ports and at least one USB 2.0 port coming from the processor. Three of the USB 3.2 ports also support DP Alt Mode, something we've seen several announced boards supporting on at least one USB-C port. This seems to be up to the motherboard manufacturers to implement once again.
The remaining four PCIe lanes are used for connecting to the chipset. Just to clarify, on the processor side these do support PCI-Express 5.0, the chipset only supports PCIe 4.0, so the link negotiation mechanism will downgrade the link to Gen 4.
Chipset Connectivity
The way AMD presented their AM5 chipset options at Computex, it seemed that these each is an independent designs, based on its own silicon. In reality AMD has partnered with ASMedia to create a single chipset, called "Promontory 21," which is used in various configurations. For the X670 and X670E they are daisy-chaining a pair of B650 chipsets together, for additional connectivity options.
Promontory 21 offers a total of 16 PCI-Express lanes. Four of these are used to connect to the CPU, over a Gen 4 interface, as mentioned before. In the X670/X670E daisy-chained configuration the secondary chipset connects to the primary chipset, it has no direct link to the processor. This means that on the primary chipset another four lanes are used up, leaving eight usable PCIe lanes, whereas the secondary chipset has 12 usable PCIe lanes. Four of the lanes are PCIe 3.0, although these are muxed interfaces with SATA 6 Gbps. This allows the motherboard manufacturers to choose how they want to implement those interfaces and as we've seen, ASRock has gone for eight SATA ports, whereas most other board makers appear to be going for six on their X670 and X670E motherboards.
In other words, B650 motherboards will have a total of eight usable PCIe 4.0 lanes and four PCIe 3.0 or SATA 6 Gbps interfaces. X670 and X670E motherboards will have 12 PCIe 4.0 lanes and up to eight PCIe 3.0 or SATA 6 Gbps interfaces. In addition to this, each chipset will have six USB 3.2 Gen 2 (10 Gbps) interfaces, where the first two can be combined into a single USB 3.2 Gen 2x2 (20 Gbps) interface. This means X670 and X670E boards can have a total of 16 USB 3.2 Gen 2 (10 Gbps) ports, or two USB 3.2 Gen 2x2 (20 Gbps) ports and 12 USB 3.2 Gen 2 (10 Gbps) ports, including the USB 3.2 Gen 2 (10 Gbps) ports from the processor. Finally there's support for up to six USB 2.0 ports from the chipset. As a side note, any motherboard with more than two USB 3.2 Gen 2x2 (20 Gbps) ports, will be using a third party host controller or a hub.
Compared to Intel Alder Lake
Compared to Intel's Z690 chipset, which has support for a total of 28 PCIe lanes, AMD has clearly decided to scale things back a little bit. In all fairness, Intel doesn't support more than 12 PCIe 4.0 lanes from the Z690 chipset and four of those lanes are shared with SATA 6 Gbps ports. Intel wins by having support for an additional 12 PCIe 3.0 lanes though, but two of those are shared with an Ethernet MAC, something AMD doesn't do, as the company relies on PCIe based Ethernet controllers. It's worth noting that Intel has a wider bus to some of its chipsets, as their CPUs support eight DMI 4.0 lanes. Comparing AMD's B650 chipset with Intel's B660, AMD comes out slightly ahead if high-speed interfaces matter, as the B660 chipset only supports six PCIe 4.0 lanes and eight PCIe 3.0 lanes, although none of its four SATA 6 Gbps ports are shared with PCIe.
The Z690 chipset supports a total of 10 USB 3.2 Gen 2 (10 Gbps) interfaces, but as with AMD, two interfaces are combined to create a single 20 Gbps interface, which means up to four USB 3.2 Gen 2x2 (20 Gbps) ports are supported. The B660 chipset supports two USB 3.2 Gen 2x2 (20 Gbps) plus two USB 3.2 Gen 1 (10 Gbps) ports, or six 10 Gbps ports. That said, Intel doesn't have any USB ports inside the CPU, which makes this something of a draw, depending on how the motherboard makers implement the connectivity options on their motherboards.
What we obviously don't know at this point is how much of a performance penalty there will be for AMD having two chipsets, especially when it comes to high-speed storage devices. We've seen some concerns about this implementation in virtualized environments and how these devices will appear to the OS in such a case, but we don't share those concerns. We expect the primary chipset to appear as PCIe bridge to the host system, a mechanism that is part of the specification and has been supported and used for many years. These are things we're going to have to wait and see how they play out, but AMD clearly deemed the tradeoffs reasonable enough versus the cost of developing multiple different chipsets.
Starting with the Zen 4 processor's lanes, all of its PCIe lanes are PCIe 5.0 and there are a total of 28 lanes. The first 16 PCI Express lanes will be used for a single x16 PCIe slot, or they can be split into two x8 slots. AMD's requirements only enforce PCIe 5.0 on the X670E boards, which means PCIe 4.0 will be applicable to lower cost motherboards.
With integrated graphics becoming standard on Zen 4, the first generation of AM5 processors will offer four dedicated display outputs, with HDMI 2.1 and DisplayPort 2.0 being supported, but neither being required as far as we understand. There are also four USB 3.2 Gen 2 (10 Gbps) ports and at least one USB 2.0 port coming from the processor. Three of the USB 3.2 ports also support DP Alt Mode, something we've seen several announced boards supporting on at least one USB-C port. This seems to be up to the motherboard manufacturers to implement once again.
The remaining four PCIe lanes are used for connecting to the chipset. Just to clarify, on the processor side these do support PCI-Express 5.0, the chipset only supports PCIe 4.0, so the link negotiation mechanism will downgrade the link to Gen 4.
Chipset Connectivity
The way AMD presented their AM5 chipset options at Computex, it seemed that these each is an independent designs, based on its own silicon. In reality AMD has partnered with ASMedia to create a single chipset, called "Promontory 21," which is used in various configurations. For the X670 and X670E they are daisy-chaining a pair of B650 chipsets together, for additional connectivity options.
In other words, B650 motherboards will have a total of eight usable PCIe 4.0 lanes and four PCIe 3.0 or SATA 6 Gbps interfaces. X670 and X670E motherboards will have 12 PCIe 4.0 lanes and up to eight PCIe 3.0 or SATA 6 Gbps interfaces. In addition to this, each chipset will have six USB 3.2 Gen 2 (10 Gbps) interfaces, where the first two can be combined into a single USB 3.2 Gen 2x2 (20 Gbps) interface. This means X670 and X670E boards can have a total of 16 USB 3.2 Gen 2 (10 Gbps) ports, or two USB 3.2 Gen 2x2 (20 Gbps) ports and 12 USB 3.2 Gen 2 (10 Gbps) ports, including the USB 3.2 Gen 2 (10 Gbps) ports from the processor. Finally there's support for up to six USB 2.0 ports from the chipset. As a side note, any motherboard with more than two USB 3.2 Gen 2x2 (20 Gbps) ports, will be using a third party host controller or a hub.
Compared to Intel Alder Lake
The Z690 chipset supports a total of 10 USB 3.2 Gen 2 (10 Gbps) interfaces, but as with AMD, two interfaces are combined to create a single 20 Gbps interface, which means up to four USB 3.2 Gen 2x2 (20 Gbps) ports are supported. The B660 chipset supports two USB 3.2 Gen 2x2 (20 Gbps) plus two USB 3.2 Gen 1 (10 Gbps) ports, or six 10 Gbps ports. That said, Intel doesn't have any USB ports inside the CPU, which makes this something of a draw, depending on how the motherboard makers implement the connectivity options on their motherboards.
What we obviously don't know at this point is how much of a performance penalty there will be for AMD having two chipsets, especially when it comes to high-speed storage devices. We've seen some concerns about this implementation in virtualized environments and how these devices will appear to the OS in such a case, but we don't share those concerns. We expect the primary chipset to appear as PCIe bridge to the host system, a mechanism that is part of the specification and has been supported and used for many years. These are things we're going to have to wait and see how they play out, but AMD clearly deemed the tradeoffs reasonable enough versus the cost of developing multiple different chipsets.
86 Comments on AMD Zen 4 & Socket AM5 Explained: PCIe Lanes, Chipsets, Connectivity
I thought Goshen Ridge was for docks (all the new TB4 docks have goshen ridge inside) and Maple Ridge was for hosts (z690 motherboards with TB4 have Maple Ridge).
Typo or is AMD implementing something cool ?
What I could see coming is AMD being a lot more careful with what they promise to not repeat what happen when they launched zen3 (at first they wanted to support only x570/b550 and were quickly "forced" to support b450/x470 as well, and through market competition now even b350/x370 is supported as was always promised). But then again, companies are always repeating the same mistakes over and over again so who knows
I've updated the story regardless.
The foot bone’s connected to the leg bone.
The leg bone’s connected to the knee bone.
The knee bone’s connected to the thigh bone.
…….
edit. Can I get a pci slot to use my old school sound card?? :)
I very much doubt this will ever be the case for a full-size ATX motherboard, although AMD's A300/X300 boards were pretty much this, but none of them were bigger than mATX.
See www.angstronomics.com/p/site-launch-exclusive-all-the-juicy
And to some others, IMHO, you're stressing too much.
If I'm not mistaken this could be possible as B650 "E" ITX board:
HDMI+DP
1x x16 PCIe 5.0 (for GPU)
1x M.2 via x4 PCIe 5.0 (from CPU)
1x USB 2.0 (from CPU)
3x USB 3.2 Gen 2 with DP mode (from CPU)
1x USB 3.2 Gen 2 (from CPU)
2x USB 4 (from CPU via x4 PCIe 5.0)
2x SATA (from B650)
1x M.2 via x4 PCIe 4.0 (from B650)
1x 2.5 GbE (via PCIe 3.0 from B650)
1x WiFi (via PCIe 3.0 from B650)
6x USB 2.0 (from B650)
4x USB 3.2 Gen 2 (from B650)
1x USB 3.2 2x2 type C (from B650)
Does that sound like low end ITX board? That's what CPU with single chipset can give you. And all can be used at once (as in, nothing will be blocked if you plug in something else). Full PCIe x16 5.0, two M.2 drives, 2 SATA drives, 18 USB ports, Ethernet, WiFi, and up to 4 displays. (That's just example, I'm sure there will also be something like "home server" ITX boards with 2 network ports and 8 SATA ports instead USB 4 and WiFi such)
Now to expand on that, a full ATX X670E board (2 chipsets) can do something like:
HDMI+DP
1x x16 PCIe 5.0 (for GPU, or 2x x8)
1x M.2 via x4 PCIe 5.0 (from CPU)
1x USB 2.0 (from CPU)
3x USB 3.2 Gen 2 with DP mode (from CPU)
1x USB 3.2 Gen 2 (from CPU)
2x USB 4 (from CPU via x4 PCIe 5.0)
6x SATA (from chipsets)
2x M.2 via x4 PCIe 4.0 (from chipsets)
1x 2.5 GbE (via PCIe 3.0 from chipsets)
1x WiFi (or x1 PCIe 3.0, from chipsets)
1x x4 PCIe 4.0 (from chipsets)
12x USB 2.0 (from chipsets)
8x USB 3.2 Gen 2 (from chipsets)
2x USB 3.2 2x2 type C (from chipsets)
That's again a crazy total, like full PCIe 5.0 x16 slot (or two x8), x4 PCIe slot (or a few x1 slots), three M.2 slots (!), Ethernet+WiFi (or dual LAN), 6 SATA and up to 29 (?!) USB ports, and again no small print like "using M.2 disables 4 SATA". (And again that's just example)
I could live with that ITX "B650E" board actually, I have been thinking past several days, and I can't remember when I used anything in PCIe slot except GPU (ages ago a satellite card), always juggled 5-6 SATA drives but I can do with 2 M.2 + 2 SATA with current capacities, my days of needing 2nd LAN are gone, and WiFi can be a backup interface, and everything else can just go to USB, specially with USB4. I honestly think I can move away from ATX and E-ATX boards with this generation, and move from tower to SFF PC.
IDK, to each their own, choosing MBO is always a personal choice for tech enthusiasts, but I see no negatives with this AMD setup. Those few people that will somehow see it as flawed can always go for something like HEDT / workstation PC, be it Threadripper or Xeon or whatever.
P.S. And I loved that "no chipset" idea, I'm sure OEMs would be all over it with SFF office PCs and the like. Are we sure it's not an option? Did anyone actually say so (from AMD or MBO makers)? :)
Edit: typos if there's more pls excuse me
With singular B650 having enough I/O to exceed capabilities of chipset link, it just seems weird to cram almost double the I/O through that already congested link. Intel went for DMI 4.0 x8 on H670/Z690 for a reason.
Parallel connection looks like a more versatile option, and there doesn't seem to be any technical reason not to choose that topology (or leave both options open for board designers).
I hope you understand my skepticism now :)
In all fairness, none of this information comes directly from AMD as mentioned, so it's possible things will changed, but as you saw, there's at least one other site, who also posted several days before us, that is saying the same thing about the chipset being daisy chained. They made some flawed assumptions though, as they followed a board design, when in reality there's more flexibility than they display in their layout. Hence the somewhat awkward diagrams here, following Intel's HSIO layout to a degree, as it makes it easier to explain muxed interfaces.