oh.. so now they want to sell these "not meant for DIY PCs" is now available for purchase for DIY builders? right. Too late. Those who have the non PRO 5xxx CPUs are either gonna keep their rigs as-is or moving up to the 7xxx series once it's released out into the wild.

Not at all what any of us wanted or needed. Where's my 5600X3D?

I'm thinking that Readies = Shipped for reviews.

hmm.

BlaezaNot at all what any of us wanted or needed. Where's my 5600X3D?

5900x3d kplz


(To be honest i could see myself getting a 5600x3d anyway, and the 5800x goes to the VR system - the cores dont help gaming, only the clocks)

Mussels7900x3d kplz


(To be honest i could see myself getting a 5600x3d anyway, and the 5800x goes to the VR system - the cores dont help gaming, only the clocks)

FTFY. :laugh::D I do hope AMD will make an X3D for 7000 series eventually, but my guess is if it happens, it wont be until 2024.

I dont understand whats the point of releasing these babies in this timeline ?

aQiI dont understand whats the point of releasing these babies in this timeline ?

They're more like afterbirth....

aQiI dont understand whats the point of releasing these babies in this timeline ?

Enterprise/Business channel and its specific requirements.

It completely sucks that AMD are still pushing shitty old VEGA graphics in their APUs, over three years after its replacement architecture arrived. Not only has the replacement RDNA been superceded, it's replacement is just about to be superceded too.

Mussels5900x3d kplz

This! Yes, yes!

lexluthermiesterThis! Yes, yes and the 5600X3D just as much!!!

FTFY!

BlaezaFTFY!

Screw that! 5900X3D is what they demo'd last year and that's what I want. Keep your 6 cores. I want 12.

A 10 core 20 thread Zen 4 7850X would be a good answer to to the 13700K. I would buy a 10 core cpu if the price was in the right spot vs the 8 and 12 core parts.

Minus InfinityA 10 core 20 thread Zen 4 7850X would be a good answer to to the 13700K. I would buy a 10 core cpu if the price was in the right spot vs the 8 and 12 core parts.

There are technical reasons to do with pairs of cores using a symmetrical layout in Zen CCDs which is why you will never see an odd number of active cores on a Ryzen CCD any more. 10 cores would need 5 per CCD which isn't happening.

It's possible (but highly unlikely) that AMD could put mismatched dies on a CPU that have 6 active cores in one CCD and 4 active cores in the other, but I'm not even sure if that works from a shared L3 cache or Infinity Fabric perspective.

Either way, what I'm saying is that it's incredibly unlikely to ever happen; We get 8 core parts (8/8 cores active in a single die) and we get 12 core parts (6/8 cores active in each of two dies). Even if they did do something weird like that, the harvested 4-core dies that are 50% disabled are usually poor yields that aren't efficient and don't clock very high - not something you want in a 6+4 10-core processor that's supposed to be superior to an 8-core/single CCD processor that likely has fantastic clock speeds with high-yield silicon from the centre of the wafer.

Chrispy_10 cores would need 5 per CCD which isn't happening.

It wouldnt be the first time AMD disable cores or used binned chips. It's been said that production has improved in recent years to have such things happen, although much less likely. It wouldnt surprise me if AMD did use mismatched CCDs and not reveal that to consumers, that would be some deep binning.

DeathtoGnomesIt wouldnt be the first time AMD disable cores or used binned chips. It's been said that production has improved in recent years to have such things happen, although much less likely. It wouldnt surprise me if AMD did use mismatched CCDs and not reveal that to consumers, that would be some deep binning.

I'm not even sure mismatched CCDs is even possible. There are A LOT of variables that would need to be accounted for, and off the top of my head you'd have problems caused by NUMA access to L3 cache, scheduler and boost algorithm problems, and of course, potential problems thread-juggling because not all cores are equal any more.

Without having someone from AMD's engineering department come on here and say "oh, that's fine, those are all trivial problems that we've already solved internally" I'll assume that these are not trivial problems and either cannot be solved without changes in the silicon, or aren't worth the effort of solving.

If a 10C part was easy to do, you can be sure AMD would have made a limited run of them back in the day to upset Intel's 10900K launch. AMD did in fact do this with the one-off EPYC 7663 but that was actually just a fully-functioning 8-core part with firmware/microcode limiting it to 56 cores used at once. It still had all 8 cores active per CCD and thus no weird NUMA, infinity fabric, or scheduler madness to deal with - the core limit was entirely software for TDP reasons (and poking Intel in the eye, of course).

Chrispy_If a 10C part was easy to do, you can be sure AMD would have made a limited run of them back in the day to upset Intel's 10900K launch.

I didnt think of this at first, but could AMD not do 5x2? or would there not be enough die space for that? I recall (I retain the images easier than words :cool:) they've done 4 CCD with 2 disabled, but that was a long while ago

DeathtoGnomesI didnt think of this at first, but could AMD not do 5x2? or would there not be enough die space for that? I recall (I retain the images easier than words :cool:) they've done 4 CCD with 2 disabled, but that was a long while ago

5 dies with 2 cores active each? The AM4 package isn't large enough for that - you'd need TRX4 socket just to fit 5 CCDs and the IO die.
As for 2 dies with 5 cores each? No - That's what I'm talking about; Within each CCD there is symmetry that requires cores to be fused off in pairs.

Perhaps someone else can explain it better but my understanding is that although each core has its own L2 and sits next to it's own chunk of L3 (which other cores can access), the Infinity Fabric runs down the middle like a tree trunk and pairs of cores branch off it, one each side. AMD can't fuse off a core or its chunk of L2 and L3 without also fusing off the Infinity Fabric for that core, killing the core on the opposite side of the IF tree trunk (in yellow) at the same time.


So, they can disable one of those two cores in software if it's 100% working, and they've done that to spite Intel in the EPYC 7663 (actually, their "official reason" was to reduce the TDP without affecting base clocks) but for consumer CPUs that would just be a 12-core product that was artificially limited to 10-core in software. Why do that when you can get more money and a better product for that silicon by making it a 5900 or 5900X instead.

I hope these arent the final AM4 CPU's we heard rumours of, and that we actually get more 3D cache/Zen 4 options

MusselsI hope these arent the final AM4 CPU's we heard rumours of, and that we actually get more 3D cache/Zen 4 options

If these are the final ones, AMD could be guilty of disappointment of the year!