Saturday, January 20th 2024
Detailed Intel Arrow Lake-S Platform Specifications Leaked, Confirms Native Thunderbolt 4 Support
Courtesy of X/Twitter user @yuuki_ans, we now have what should be very detailed information on Intel's next generation consumer desktop platform, assuming the leaked information is real. The leaker not only provided confirmation on the CPU specs of the Arrow Lake-S desktop CPUs, which will feature up to an 8+16+1 core configuration. However, it appears that it's not all smooth sailing for Intel to get Arrow Lake-S up and running, as a note points out that the pre-alpha hardware has the performance cores disabled due to a hardware bug that is expected to be fixed in a future hardware revision. We can also see that the official memory support is DDR5-6400 from the block diagram, which is quite a jump from DDR5-5600 which is what the current 14th gen CPUs officially support.
That said, the rest of the documentation shared is very detailed and provides us with a ton of details in terms of the various platform interfaces we can expect. For starters, the Arrow Lake-S CPUs will feature native Thunderbolt 4/USB4 support (once again an odd mistake here stating USB4.0), as well as DisplayPort 2.0 (UHBR20 only) and HDMI 2.1 support. The CPU is said to deliver 24 PCIe lanes, of which 16 are PCIe 5.0 lanes for the GPU and the remaining eight are for NVMe SSDs, with half being PCIe 5.0 and half PCIe 4.0.The chipset which is expected to carry the 800-series naming will connect via a DMI Gen 4 interface with up to eight lanes to the CPU. Here we can apparently expect a further 24 PCIe 4.0 lanes, up to 10 USB 3.2 Gen 2 (10 Gbps) ports, of which eight can be combined to offer USB 3.2 Gen 2x2 (20 Gbps) ports instead. That said, there are some oddities in this leaked information that puts up some red flags. The above mentioned IA Cores and USB4.0 mistakes are odd and there's also a suggestion that the CPU should feature eight SATA 3.0 ports (muxed with PCIe) and the chipset featuring a further eight (also muxed). Furthermore WiFi support is only listed at 802.11ax R2 or WiFi 6E as it's now better known as, but that there will be Bluetooth 6 support in the same module.
Now keep in mind that we're looking at the specs for an Intel test platform here, so we might just be looking at a sloppy engineer that threw this document together to be able to send along some specs to Intel's partners that are getting boards to start to work on their UEFI implementations and board designs. That said, there are a few too many oddities in this leak to be able to say that the features are set in stone or even that it's a real leak, but it does reflect what is already known about Arrow Lake-S. As such, take this for what it is, namely an interesting look into what might be.
Sources:
@yuuki_ans, via VideoCardz
That said, the rest of the documentation shared is very detailed and provides us with a ton of details in terms of the various platform interfaces we can expect. For starters, the Arrow Lake-S CPUs will feature native Thunderbolt 4/USB4 support (once again an odd mistake here stating USB4.0), as well as DisplayPort 2.0 (UHBR20 only) and HDMI 2.1 support. The CPU is said to deliver 24 PCIe lanes, of which 16 are PCIe 5.0 lanes for the GPU and the remaining eight are for NVMe SSDs, with half being PCIe 5.0 and half PCIe 4.0.The chipset which is expected to carry the 800-series naming will connect via a DMI Gen 4 interface with up to eight lanes to the CPU. Here we can apparently expect a further 24 PCIe 4.0 lanes, up to 10 USB 3.2 Gen 2 (10 Gbps) ports, of which eight can be combined to offer USB 3.2 Gen 2x2 (20 Gbps) ports instead. That said, there are some oddities in this leaked information that puts up some red flags. The above mentioned IA Cores and USB4.0 mistakes are odd and there's also a suggestion that the CPU should feature eight SATA 3.0 ports (muxed with PCIe) and the chipset featuring a further eight (also muxed). Furthermore WiFi support is only listed at 802.11ax R2 or WiFi 6E as it's now better known as, but that there will be Bluetooth 6 support in the same module.
Now keep in mind that we're looking at the specs for an Intel test platform here, so we might just be looking at a sloppy engineer that threw this document together to be able to send along some specs to Intel's partners that are getting boards to start to work on their UEFI implementations and board designs. That said, there are a few too many oddities in this leak to be able to say that the features are set in stone or even that it's a real leak, but it does reflect what is already known about Arrow Lake-S. As such, take this for what it is, namely an interesting look into what might be.
35 Comments on Detailed Intel Arrow Lake-S Platform Specifications Leaked, Confirms Native Thunderbolt 4 Support
Several AMD boards have x2 electrically connected x16 slots for example, so it's very much doable to implement x2 interfaces on AMD and I presume Intel these days.
I also think you've misunderstood how PCIe and bifurcation works. Just because you go from PCIe 5.0 to PCIe 4.0 from a PCIe 5.0 interface, doesn't mean the eight lanes you split off, magically turns into 16 lanes without some kind of bridge chip in the middle. If this is what you want, then PCIe and/or bifurcation isn't going to do it, since neither was designed to do this.
www.gigabyte.com/Motherboard/B650-GAMING-X-AX-rev-15/sp#sp
This is unrealistic expectation. If anyone wants "workstation-like connectivity", they need to buy a workstation system. Simple.
When X670E or Z790 chipsets are creatively implemented on a board, those allow for HEDT-like connectivity.
Top chipset consumer desktop system does not need to offer anything else.
Still want more connectivity? Pay for it.
The PCH DMI link says DMI 3 x 8
thats weird Z690/Z790 is DMI 4 x 8
At the average Motherboard they are probably the same though as Intel middle range chipsests (e.g. B-class) tend to only have DMI x4, so it will be 24 PCIe lanes direct from CPU + 4 PCH lanes, which is the same as AM5. The generations of the lanes are also the same with 20 Gen 5(if implemented as that) and 4 Gen 4.
The PCHs might have some variations in what lanes they provide but for peak performance in the end, they can only effectively provide bandwidth in total equal to x4 Gen 4 for both cases so it does not matter that much.
Intel however gets the advantage in I/O if TB4/USB4 are implemented, as since it's native to the CPU, it does not need to use any of the PCIe lanes from the CPU but AM5 does need(and that was one of the reasons why AMD gave an additional x4 lanes over AM4, to facilitate a discrete USB4 controller) a discrete USB4 controller connected to x4 lanes.
And then you have the PCH bandwidth advantage as with with x8 lanes using a H or Z chipset gives more leg for the downstream ports to stretch really. which will make a difference to those who are abusing their PCH connectivity to the max.
For the average person or gamer, it does not matter at all though, since this will really only pop up at super expensive boards that only people with real needs will buy.
(Intel says that Lunar Lake has a different tile configuration from Meteor Lake and Arrow Lake. The rumor mill says that a 4p+4e CPU will be on the same tile as an Xe2 GPU, and that tile will be built on TSMC N3. Maybe Intel is trying to avoid criticism about Lunar Lake being built by TSMC until they have Arrow Lake ready to show off on their own node.)