AMD's next generation Ryzen mobile processor family is undergoing a significant re-positioning of IP within its product stack, as the company introduces the new "elite experience" segment. The "Fire Range" mobile processor is a direct successor to "Dragon Range" MCM, with two 8-core "Zen 5" chiplets. It is essentially a BGA package of the desktop "Granite Ridge" processor, and comes with up to 16 "Zen 5" cores, for flagship gaming notebooks and mobile workstations. A segment below the current "Dragon Range" is the current "Hawk Point" silicon, driving premium experiences. There is a rather large CPU performance gap between the two, as would be the case between the upcoming "Fire Range" and "Kraken Point," which is why AMD is creating the "elite experience" segment, and filling it with "Strix Halo" and "Strix Point," which will square off against Core Ultra 7 and Core Ultra 9 processors, as well as certain HX-segment 14th Gen Core mobile processors. "Strix Point" has a significant core-count increase to 12, along with a large iGPU. We've extensively covered "Strix Point" in our older article, but now we have more information on the elusive "Kraken Point."

"Kraken Point" is codename for AMD's next-generation monolithic mobile processor silicon being designed to power Ryzen processor SKUs competing against the bulk of Intel Core Ultra 5 and Core Ultra 7 SKUs. This chip will be built on a refined 4 nm EUV node by TSMC, and will be monolithic. Its most interesting aspect is the CPU complex. It reportedly features a combination of four regular "Zen 5" cores, and four "Zen 5c" low power cores. All eight cores will likely share a single CCX, which means they share a common L3 cache, which enables easy movement of threads between the two kinds of cores, without having to make round-trips to the DRAM."Zen 5" and "Zen 5c," much like their predecessors, should feature an identical IPC, as well as instruction sets, as well as support for SMT. The "Zen 5c" core is expected to be physically compacted. It will operate at lower core voltages than regular "Zen 5" cores, which limits its boost frequencies. AMD doesn't need elaborate hardware-based schedulers such as Intel's Thread Director; and will instead use software based OS scheduler extensions to ensure priority to the "Zen 5" cores. AMD already built such a "hybrid" processor with the low cost "Phoenix 2," which combines two regular "Zen 4" cores with four "Zen 4c" cores.

As for integrated graphics, it's being rumored that AMD has decided to give its big iGPU only to "Strix Point," and that "Kraken Point" will get a slightly smaller iGPU, though nowhere near as small as the "Phoenix 2." The iGPU of "Kraken Point" will be based on the RDNA 3.5 graphics architecture, just like the one on "Strix Point," but will consist of 4 WGPs (workgroup processors); worth 8 CU, or 512 stream processors. The CU count of "Strix Point"" remains unknown, but the "Strix Halo" promises to be a great disruptor, with its iGPU featuring a massive 20 WGPs, worth 40 CU, or 2,560 stream processors—something that could put most mid-range and performance segment mobile discrete GPUs in trouble.