Wednesday, May 22nd 2024

AMD Zen 6 to Cram Up to 32 CPU Cores Per CCD

AMD's future "Zen 6" CPU microarchitecture is rumored to cram up to 32 cores per CCD (CPU complex die), or the common client/server chiplet with the CPU cores, according to Kepler_L2, a reliable source with hardware leaks. At this point it's not clear if they are referring to the regular "Zen 6" CPU core, or the physically compacted "Zen 6c" core meant for high core-count cloud server processors. The current pure "Zen 4c" CCD found in EPYC "Bergamo" processor packs 16 cores across two 8-core CCX (CPU core complexes) that share a 16 MB L3 cache among the 8 cores within the CCX. The upcoming "Zen 5c" CCD will pack 16 cores, but in a single 16-core CCX that shares 32 MB of L3 cache among the 16 cores for improved per-core cache access. "Zen 6" is expected to double this to 32 cores per CCD.

The 32-core CCD powered by "Zen 6" (likely Zen 6c), might take advantage of process improvements to double the core-count. At this point, it's not clear if this jumbo CCD features a single large CCX with all 32 cores sharing a large L3 cache; or if it's using two 16-core CCX that shares, say, 32 MB of L3 cache among the 16 cores. What's clear with this leak, though, is that AMD is looking to continue ramping up CPU core counts per socket. Data-centers and cloud customers seem to love this, and AMD is the only x86 processor maker in a serious competition with Arm-based server processor manufacturers such as Ampere, to increase significantly increase core counts per socket with each generation.
Sources: InstLatX64 (Twitter), Kepler_L2 (Twitter), harukaze5719 (Twitter)
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51 Comments on AMD Zen 6 to Cram Up to 32 CPU Cores Per CCD

#26
Shtb
according to Kepler_L2, a reliable source with hardware leaks.
Yeah, sure.
Not a good joke.
Posted on Reply
#27
SL2
kondaminbut we're talking about soc's that come with a gpu and very likely an npu that will all be competing for memory bandwidth.
You're the only one talking about it, tho. We're talking about EPYC CPU's, or desktop CPU's made of chiplets and with a 2CU GPU, not laptop APU's.
kondaminplenty of space on the AM5 pcb
No.


The exception is if they're going 3D. That silly thick lid must be a placeholder for something..
Posted on Reply
#28
kondamin
SL2You're the only one talking about it, tho. We're talking about EPYC CPU's, or desktop CPU's made of chiplets and with a 2CU GPU, not laptop APU's.

No.


The exception is if they're going 3D. That silly thick lid must be a placeholder for something..
is there a reason those smd's need to be in that configuration and can't be moved further to the edges
Posted on Reply
#29
b1k3rdude
SL2Yeah, server CPU's usually are.
Indeed, but I just had a thought if we to have a single 32c CCD with 3D V-cache (so no I-fabric latency issues to contend with), I dont think I would say no to that. Sure gaming would only use 6-8 cores, but ALL my other multi thread tasks would fly...
Posted on Reply
#30
TechLurker
Assuming this comes to consumer boards, I want to also see more PCIe Lanes. Especially now that AI is coming to mainstream whether we like it or not anyway, and being able to add in a second card running at a full x16 dedicated to localized AI could be a selling point for the masses.

Although personally, I just want a second full x16 to run an NVMe x16 card without having to pay extra for built-in bifurcation. Bonus if they could also squeeze another x8 just so I can run a legacy ASUS sound card with my existing setup.

And go back to either triple channel DDR or bring quad channel DDR to mainstream too.
Posted on Reply
#31
Random_User
Something tells me, that these 32 cores single CCD are going to be Zen6c cores, instead "full-scale" ones. And only for Enterprise/server Epyc.
I doubt these gonna come to consumer market, even in shape of Threadripper. AMD felt the taste of artificial fragmentation margins, and won't allow it to happen on consumer market, no matter what. I even think they might intentionally fuse off the "extra cores" from the binned dies, that no longer usable for Epyc/Threadripper. Much like desktop Ryzen never had, and will never even four, let alone eight channel RAM, nor lanes, that easilly could be "given" to at least top X*70 chipset series. And how Hawk Point 8000G APUs have less lanes, than previous 5000G ones.
But that's my guess, and I do not force this upon anybody.
Posted on Reply
#32
FoulOnWhite
SL2You're the only one talking about it, tho. We're talking about EPYC CPU's, or desktop CPU's made of chiplets and with a 2CU GPU, not laptop APU's.

No.


The exception is if they're going 3D. That silly thick lid must be a placeholder for something..
It's a place holder for a tower block of cores and cache mem. /s

Can't really see the point of a 32 core CPU for desktop, might as well just buy a TR if you need that many. Fast 16 core with no HT is the way to go imo. I think Intel have the right idea ditching HT, theough it does seem they are sticking with E cores and even got AMD to cobble up C cores for their CPUs
Posted on Reply
#33
SL2
kondaminis there a reason those smd's need to be in that configuration and can't be moved further to the edges
They can't be where the lid is glued (black), that's a given. AMD has already mimimized that area with the cutouts of the lid. Currently there seems to be a bit of space at the lower end (green), but that's not much.
FoulOnWhiteeven got AMD to cobble up C cores for their CPUs
How are those even related? One is consumer only AFAIK and used even in 14900K, and the other is server only up until low end Phoenix 2 and never used in high end Ryzens.


This is clickbait. The text is all about EPYC, and Ryzen is never mentioned, especially not AM4.

No wonder readers start dreaming up products that will never exist lol
Posted on Reply
#34
csendesmark
demuThey won't have. They would require a different kind of motherboard than other Ryzens.
Buy a Threadripper if you need more memory channels.
I know, actually I am actively planning to get the 7960X, encoding really needs the extra cores and the 4 channel memory controller!
Posted on Reply
#35
SL2
kondaminas far as i know amd never promised they were going to keep am5 around all that long, they said they were going to keep it around for 3 years
those 3 years will be up at the end of 2025
No one knows at this point besides AMD, but AMD would shoot themselves in the foot if they had only two generations for one socket. That's the Intel standard, and people expect more from AMD. I think part of the reason for AM4's success is its longevity, and I'd expect AMD wanting to repeat that.

It's not the first time AMD said three years. Maybe they want to say four, but it's just that they can't know for certain.

In 2017:

Regardless of chipset, AMD intends to use the same socket, Socket 1331, and the same platform, AM4, until 2020, unless some new technology (such as PCIe 4.0 or DDR5) forces it to change the package pinout.

arstechnica.com/gadgets/2017/03/amds-moment-of-zen-finally-an-architecture-that-can-compete/4/

As we all know, the 5800X3D came not three but five years later, and models have been launched even this year, seven years later.

AMD will have to tell us this year if Zen5 or Zen6 is the last one for AM5.
Posted on Reply
#36
Minus Infinity
b1k3rdudeIndeed, but I just had a thought if we to have a single 32c CCD with 3D V-cache (so no I-fabric latency issues to contend with), I dont think I would say no to that. Sure gaming would only use 6-8 cores, but ALL my other multi thread tasks would fly...
Zen 6 is all about fixing these issues with the current ccd design. We should indeed be able to have our 3D v-cache cake and eat it all. I think IO die is also in for major changes unlike Zen 5 which just carries over Zen 4 IO die with tweaks

I think 32 cores will definitely be Zen 6c cores, not regular Zen 6 cores which will be limited to 16 cores.
Posted on Reply
#37
FoulOnWhite
SL2They can't be where the lid is glued (black), that's a given. AMD has already mimimized that area with the cutouts of the lid. Currently there seems to be a bit of space at the lower end (green), but that's not much.


How are those even related? One is consumer only AFAIK and used even in 14900K, and the other is server only up until low end Phoenix 2 and never used in high end Ryzens.


This is clickbait. The text is all about EPYC, and Ryzen is never mentioned, especially not AM4.

No wonder readers start dreaming up products that will never exist lol
C cores are coming to ryzen, bet on it. Strange don't you think how they never used anything like E cores, and now C core which imo is their answer to E cores will be coming to desktop Ryzen. So yes they are related, even if not "exactly" the same. So both Intel and AMD will have normal or P cores and C or E cores. Not that i think it is a bad thing, as i still think E cores have their place.
Posted on Reply
#38
kondamin
SL2They can't be where the lid is glued (black), that's a given. AMD has already mimimized that area with the cutouts of the lid. Currently there seems to be a bit of space at the lower end (green), but that's not much.
thats reasonable, there wouldn’t be a reason for glue if they went the solder route though.

leaving out alterations that would probably not be feasible for am5, that does leave why bother with ryzen 7 and 9 if the base ccd is 16 core anyway.

So am5 for the low end something new with more memory channels and it’s not going to be thread ripper because those prices are just to high and would leave a serious gap in the product line
Posted on Reply
#39
SL2
FoulOnWhiteC cores are coming to ryzen, bet on it. Strange don't you think how they never used anything like E cores, and now C core which imo is their answer to E cores will be coming to desktop Ryzen.
You can't bet on things that have already happended lol.
www.techpowerup.com/313471/die-shot-suggests-phoenix-2-is-amds-first-hybrid-processor
www.techpowerup.com/317448/amd-announces-ryzen-8000g-series-desktop-apus-select-models-feature-ryzen-ai

Strange how you can't understand what I'm saying. All I said was that C cores didn't start as a direct response to E cores, because they both originated in different markets. That doesn't mean that they wouldn't compete with each other in the end.
kondaminthats reasonable, there wouldn’t be a reason for glue if they went the solder route though.
IDK if it's glue or whatever, I'm simply talking about the contact area between the lid and the base. It needs to be there in order to have that surface on top of the lid for the mechanism to hold on to. It can't look like AM4 CPU's around the edges. However, it's of course possible that AMD will use a new lid for AM5 at some point,.

They use solder.
Posted on Reply
#40
close
demuThey won't have. They would require a different kind of motherboard than other Ryzens.
Buy a Threadripper if you need more memory channels.
TR has more channels because at that number of cores and target audience you're starting to feel the memory limitation. If AMD wants to sell you a super duper CPU stuffed to the gills with cores for people who need them but then it's hobbled by the memory access and you're left with bragging rights in Task Manager, then it's a huge waste.
Posted on Reply
#41
kapone32
SL2No one knows at this point besides AMD, but AMD would shoot themselves in the foot if they had only two generations for one socket. That's the Intel standard, and people expect more from AMD. I think part of the reason for AM4's success is its longevity, and I'd expect AMD wanting to repeat that.

It's not the first time AMD said three years. Maybe they want to say four, but it's just that they can't know for certain.

In 2017:

Regardless of chipset, AMD intends to use the same socket, Socket 1331, and the same platform, AM4, until 2020, unless some new technology (such as PCIe 4.0 or DDR5) forces it to change the package pinout.

arstechnica.com/gadgets/2017/03/amds-moment-of-zen-finally-an-architecture-that-can-compete/4/

As we all know, the 5800X3D came not three but five years later, and models have been launched even this year, seven years later.

AMD will have to tell us this year if Zen5 or Zen6 is the last one for AM5.
It crazy that it is 2024 and we are still getting new AM4 CPUs. No one can say AMD does not care about it's socket longevity.
Posted on Reply
#42
x4it3n
To be fair 16c/32t is more than enough for Gaming! But for Productivity a 32c/64t CPU would be great! Even though I think it will be ZEN 5c cores and not ZEN 5 cores!
kapone32It crazy that it is 2024 and we are still getting new AM4 CPUs. No one can say AMD does not care about it's socket longevity.
ZEN 3 was a great architecture and is still a good architecture today. It's just not the best, but good enough for most people.
Posted on Reply
#43
SL2
x4it3nTo be fair 16c/32t is more than enough for Gaming! But for Productivity a 32c/64t CPU would be great! Even though I think it will be ZEN 5c cores and not ZEN 5 cores!
Not sure AMD will jump to 32 first, I'd guess 24, and maybe not on Zen 5. Also, I don't think we'll see C cores on high end, just yet.
Posted on Reply
#44
ghazi
Super XPI have to agree cold hardily, its about time AMD moves to Quad-Channel memory over its Dual-Channel they've been using for ages now.


Exactly,
I think triple channel is the sweet spot but I really strongly doubt it'll ever happen. 58 had that right, it's perfect for enthusiasts. Quad channel is excessive since 4 dimms is the minimum and 8 slots are really tough to fit on the motherboard. Triple channel gives you 3 slots with 1dpc or 6 slots for some nice extra capacity without too much cost or complexity. 32 cores is gonna be really constrained in the kinds of memory sensitive workloads that use that many cores with dual channel, but I'd wager quad channel offers very little return over triple channel.

Given how big and unique of a market the Xx70 platforms are, it would be really cool if AMD found some extra pins and made X770 triple channel and B750 dual channel or something similar. But major doubt.
Posted on Reply
#45
Super XP
SL2Do you know what neither means lol
YeS lol
Posted on Reply
#46
Rabit
Zen 6 most interesting leak is about adding 2 Zen6c core to IOD
6+2 configuration can be refreshing for budget option, also idle power will improve when you can turn off entire CCD.
Posted on Reply
#47
unwind-protect
RabitZen 6 most interesting leak is about adding 2 Zen6c core to IOD
6+2 configuration can be refreshing for budget option, also idle power will improve when you can turn off entire CCD.
... if your OS' scheduler can correctly decide when to use the c cores.
Posted on Reply
#48
ARF
unwind-protect... if your OS' scheduler can correctly decide when to use the c cores.
The "c" letter stands of "compact", and means that the lithography manufacturing process and libraries allow for a denser layout. It's simply a die area saving measure, IPC stays the same. It's the same core, but in less area.
RabitZen 6 most interesting leak is about adding 2 Zen6c core to IOD
6+2 configuration can be refreshing for budget option, also idle power will improve when you can turn off entire CCD.
Idle power is high not because of the CCD, but because of the cIOd. You need to turn the entire cIOd off :D



Speaking of a 32-core CCD. AMD went in full retard mode lately.
Why not simply 12-core Zen 4 CCD, 16-core Zen 5 CCD, and 24-core Zen 6 CCD?! WTH :kookoo::banghead:
Posted on Reply
#49
unwind-protect
ARFThe "c" letter stands of "compact", and means that the lithography manufacturing process and libraries allow for a denser layout. It's simply a die area saving measure, IPC stays the same. It's the same core, but in less area.
I know, but that doesn't change my point. It is slower after all (due to lower clockspeed).

There is some random process coming in asking for CPU time. How does the scheduler know whether to put it on full cores or c cores? It can't predict what the process will do. Or what the user's expectation is in that moment.
Posted on Reply
#50
ARF
unwind-protectI know, but that doesn't change my point. It is slower after all (due to lower clockspeed).

There is some random process coming in asking for CPU time. How does the scheduler know whether to put it on full cores or c cores? It can't predict what the process will do. Or what the user's expectation is in that moment.
Err, the c-cores can be marked with lower clocks, and avoided by the pointers, unless needed otherwise.
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