Thursday, December 26th 2024
AMD Ryzen 9 9950X3D Carries 3D V-Cache on a Single CCD, 5.6 GHz Clock Speed, and 170 Watt TDP
Recent engineering samples of AMD's upcoming Ryzen 9 9950X3D reveal what appear to be the finalized specifications of the top-tier AM5 chip. The 16-core, 32-thread processor builds upon the gaming success of the Ryzen 7 9800X3D while addressing its core count limitations. The flagship processor features AMD's refined cache design, combining 96 MB of 3D V-Cache with 32 MB of standard L3 cache. Unlike its predecessor, the 7950X3D, the new Zen 5 architecture incorporates a redesigned CCD stacking method. The CCD now sits above the cache, directly interfacing with the STIM and IHS, eliminating thermal constraints that previously required frequency limitations. The processor features asymmetric cache distribution across its dual CCDs—one die combines 32 MB of base L3 cache with a 64 MB stacked V-Cache layer, while its companion die utilizes a standard 32 MB L3 cache configuration. In total, there is a 128 MB of L3 cache, with 16 MB of L2.
This architectural advancement enables the 9950X3D to achieve a 5.65 GHz boost clock across both CCDs, matching non-X3D variants. The processor maintains a 170 W TDP, suggesting improved thermal efficiency despite the additional cache. AMD's software-based OS scheduler will continue to optimize gaming workloads by directing them to the CCD with 3D V-Cache. Early leaks indicate the 9950X3D matches the base 9950X in Cinebench R23 scores, both in single and multi-threaded tests—a significant improvement over the 7950X3D, which lagged behind its non-X3D counterpart due to frequency limitations. AMD plans to expand the Zen 5 X3D lineup in Q1-2025 with both the 9950X3D and 9900X3D models. Full performance benchmarks and pricing details are expected at CES 2025, where AMD will officially unveil these processors alongside their RDNA 4 GPUs.
Sources:
@94G8LA, via VideoCardz
This architectural advancement enables the 9950X3D to achieve a 5.65 GHz boost clock across both CCDs, matching non-X3D variants. The processor maintains a 170 W TDP, suggesting improved thermal efficiency despite the additional cache. AMD's software-based OS scheduler will continue to optimize gaming workloads by directing them to the CCD with 3D V-Cache. Early leaks indicate the 9950X3D matches the base 9950X in Cinebench R23 scores, both in single and multi-threaded tests—a significant improvement over the 7950X3D, which lagged behind its non-X3D counterpart due to frequency limitations. AMD plans to expand the Zen 5 X3D lineup in Q1-2025 with both the 9950X3D and 9900X3D models. Full performance benchmarks and pricing details are expected at CES 2025, where AMD will officially unveil these processors alongside their RDNA 4 GPUs.
91 Comments on AMD Ryzen 9 9950X3D Carries 3D V-Cache on a Single CCD, 5.6 GHz Clock Speed, and 170 Watt TDP
I mean, expecting a 10950HS chip in late 2025 and 10900G in late 2026 would be somewhat realistic. Not earlier. APUs are always for notebooks and mini PCs primarily, AMD struggles to rent enough capacity at TSMC, so desktop versions come much later.
With an awesome 7800X3D in my system, I can't be asked to spend a penny on yet another 8-core CPU.
I wonder if we will see AMD use the stacking technology and be able to overlay parts of the CCDs onto the IO Die to save physical space on the Substrate AND increase the IF bandwidth and speed?
Nearly everyone who's invested thousands in a 4090 and a top AM5 rig will be using 1440p at minimum. In which case gaming increases will be minimal as on 9800x3d.
Similar for productivity, few use cases do enough intensive crunching that they'll even notice the difference between the last couple of generations. In the course of your day, saving 20 seconds on a compile or encode don't mean jack.
For this purpose, I think it would be best to put the IOD and CCDs next to each other, with no space between, and connect them with LSI (which is TSMC's take on EMIB).
8 cores vs 12 or 16 is pretty weak. My 5900X looks down at my 58X3D in everything except some games.
IMHO Multi X3D dies only benefit very niche workloads such as databases and productivity (I would suspect video encoding etc may get a slight uplift) but for the majority of people the single X3D die when utilised properly will be the best solution till IF gets a major rework/upgrade or move to a higher density CCD design.
Primarily, the caches. As we all know, games love cache so I'm not surprised that splitting the cache has a detrimental effect.
But even if a thread isn't loaded, the register files, reorder buffers, decoders and branch predictors remain shared. So SMT will have slightly worse single threaded performance.
SMT is ideal when a 5%ish drop in single threaded is an acceptable tradeoff for +40% multi threaded performance. Games do not work like this.
Intel has changed their design to P-Cores which specialize in singlethread, and E-cores which specialize in multi thread. But this seems like a poor strategy to me for other reasons....I expect that video is bad for x3d.
The name of the game is fitting in the cache. Video games have lots of stuff that is larger than 32MB but less than 96MB, and the CPU automatically discovers the hot data to share.
Video is not like that. You watch (or encode) one frame and then move into the next one. Nothing will fit in cache. Or at least, nothing extra really fits in the 33rd MB that's worthwhile.
Video and 3D modeling (Blender) usually prefer more cores... While dealing with so much data that the caches are blown over and useless.
A 12 core Zen 5c would be the same size of 8 core Zen 5, but even with less level 3 cache, the 64MB x3d cache would make up, so no real disadvantage.
AMD explicitly has been going chiplets with all of its associated downsides. Intel is actually going chiplets today and I'd expect more chiplets in the future.
3nm and 2nm are too expensive to run monolithic designs anymore. You need to cut up the dies and split them off to increase the yields and efficiency of manufacturing.
Expect more 'split computer' designs out of AMD, Intel, and even NVidia, moving forward.