Tuesday, June 17th 2008

Intel Announces Floating Body Cell Memory.

Intel announced today that it has made scaled Floating Body Cell (FBC) memory with its High-k and Metal Gate 45nm technology that could mean a new era of super dense cache cells in CPUs and other applications. FBC memory will allow three to four times greater memory density than standard SRAM cache. FBC uses just one capacitor while SRAM uses six transistors further decreasing the needed size. The FBC is on a single 45nm Metal Gate on a thin 22nm, ultra low voltage Silicon On Insulator (SOI) substrate. The device is two generations ahead of the one Intel showcased in 2006.
Source: bit-tech
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3 Comments on Intel Announces Floating Body Cell Memory.

#1
WarEagleAU
Bird of Prey
sounds like a winner. Probably will lower costs a tad bit. I wonder if AMD will be able to "license" this architecture?
Posted on Reply
#2
PVTCaboose1337
Graphical Hacker
Neat concept... I just need to understand how it works.... To wikipedia!
Posted on Reply
#3
Mussels
Freshwater Moderator
3x to 4x the cache... from 8MB to 32MB, weeeeee.
Posted on Reply
Dec 12th, 2024 02:41 EST change timezone

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