Here's the first picture of the Crucial P2, the company's second M.2 NVMe client SSD series based on QLC NAND flash memory, and successor to the Crucial P1. The drive sticks to PCI-Express gen 3.0 x4 as its host interface, but increases sequential read speeds over the P1. Available in 250 GB and 500 GB models to begin with, the P2 offers sequential transfer rates of up to 2100 MB/s reads with up to 1150 MB/s writes for the 250 GB variant; and up to 2300 MB/s reads with up to 940 MB/s writes on the 500 GB variant. There's no word on whether the P2 uses the same QLC NAND chips as the P1, but we do spy a DRAM cache chip. Endurance of the P2 is rated at 150 TBW, and Crucial is backing them with 5-year warranties when they come out in the near future. Pricing in Europe is expected to be about 59€ for the 250 GB model, and 70€ for the 500 GB one.

Update 15:54 UTC: Crucial launched the drive Stateside at $54.99 for the 250 GB model, and $64.99 for the 500 GB model. We've added more images.

NVIDIA has enabled its AIB partners to design a to ship a GeForce GTX 1650 GPU with a twist - a GDDR6 DRAM instead of the regular GDDR5 DRAM. And GIGABYTE is the first to update its GPU offerings. Today, GIGABYTE has launched... exactly all the models it had it already offered? Both of the models, like the GIGABYTE GTX 1650 OC and GTX 1650 Windforce OC, are carrying the same name again, just with a newer memory. The only difference is the box it ships in, which you can see below, that shows a GDDR6 marking and the GPU has a bit different cooler shroud. The amount of memory is still static, remaining at 4 GB, while the speed is now bumped to 12 Gbps. Base clocks of the GTX 1650 OC models are unknown, while the boost is 1635 MHz. For GTX 1650 Windforce OC model, base clock is still unknown, while the boost is 1710 MHz.

Cadence, a fabless semiconductor company focusing on the development of IP solutions and IC design and verification tools, today posted an update regarding their development efforts for the 5th generation of DDR memory which is giving us some insights into the development of a new standard. The new DDR5 standard is supposed to bring better speeds and lower voltages while being more power-efficient. In the Cadence's blog called Breakfast Bytes, one of Cadence's memory experts talked about developments of the new standards and how they are developing the IP for the upcoming SoC solutions. Even though JEDEC, a company developing memory standards, hasn't officially published DDR5 standard specifications, Cadence is working closely with them to ensure that they stay on track and be the first on the market to deliver IP for the new standard.

Marc Greenberg, a Cadence expert for memory solutions was sharing his thoughts in the blog about the DDR5 and how it is progressing. Firstly, he notes that DDR5 is going to feature 4800 MT/s speeds at first. The initial speeds will improve throughout the 12 months when the data transfer rate will increase in the same fashion we have seen with previous generation DDR standards. Mr. Greenberg also shared that the goals of DDR5 are to have larger memory dies while managing latency challenges, same speed DRAM core as DDR4 with a higher speed I/O. He also noted that the goal of the new standard is not the bandwidth, but rather capacity - there should be 24Gb of memory per die initially, while later it should go up to 32Gb. That will allow for 256 GB DIMMs, where each byte can be accessed under 100 ns, making for a very responsive system. Mr. Greenberg also added that this is the year of DDR5, as Cadence is receiving a lot of orders for their 7 nm IP which should go in production systems this year.

Micron Technologies, in the latest earnings report, announced that they will start shipping High-Bandwidth Memory 2 (HBM2) DRAM. Used for high-performance graphics cards, server processors and all kinds of processors, HBM2 memory is wanted and relatively expensive solution, however, when Micron enters the market of its manufacturing, prices, and the market should adjust for the new player. Previously, only SK-Hynix and Samsung were manufacturing the HBM2 DRAM, however, Micron will join them and they will again form a "big-three" pact that dominates the memory market.

Up until now, Micron used to lay all hopes on its proprietary Hybrid Memory Cube (HMC) DRAM type, which didn't gain much traction from customers and it never really took off. Only a few rare products used it, as Fujitsu SPARC64 XIfx CPU used in Fujitsu PRIMEHPC FX100 supercomputer introduced in 2015. Micron announced to suspend works on HMC in 2018 and decided to devote their efforts to GDDR6 and HBM development. So, as a result, we are seeing that they will launch HBM2 DRAM products sometime this year.

Samsung Electronics Co., Ltd., the world leader in advanced memory technology, today announced that it has successfully shipped one million of the industry's first 10 nm-class (D1x) DDR4 (Double Date Rate 4) DRAM modules based on extreme ultraviolet (EUV) technology. The new EUV-based DRAM modules have completed global customer evaluations, and will open the door to more cutting-edge EUV process nodes for use in premium PC, mobile, enterprise server and datacenter applications.

"With the production of our new EUV-based DRAM, we are demonstrating our full commitment toward providing revolutionary DRAM solutions in support of our global IT customers," said Jung-bae Lee, executive vice president of DRAM Product & Technology at Samsung Electronics. "This major advancement underscores how we will continue contributing to global IT innovation through timely development of leading-edge process technologies and next-generation memory products for the premium memory market."

Micron Technology, Inc., today announced it began sampling the industry's first universal flash storage (UFS) multichip package (uMCP) with low-power DDR5 (LPDDR5) DRAM. The uMCP provides high-density and low-power storage designed to fit on slim and compact midrange smartphone designs.

Micron's new uMCP5 packaging builds on the company's innovation and leadership in multichip form factors. Micron uMCPs combine low-power DRAM with NAND and an onboard controller, using 40% less space compared to a two-chip solution. This optimized configuration saves power, reduces memory footprint and enables smaller and more agile smartphone designs.

Rambus, a maker of various Interface IP solutions, today announced the latest addition to its high-speed memory interface IP product portfolio in form of High Bandwidth Memory 2E (HBM2E) controller and physical layer (PHY) IP solution. The two IPs are enabling customers to completely integrate the HBM2E memory into their products, given that Rambus provides a complete solution for controlling and interfacing the memory. The design that Ramus offers can support for 12-high DRAM stacks of up to 24 Gb devices, making for up to 36 GB of memory per 3D stack. This single 3D stack is capable of delivering 3.2 Gbps over a 1024-bit wide interface, delivering 410 GB/s of bandwidth per stack.

The HBM2E controller core is DFI 3.1 compatible and has support for logic interfaces like AXI, OCP, or a custom one, so the customer can choose a way to integrate this core in their design. With a purchase of their HBM2E IP, Rambus will provide source code written in Hardware Description Language (HDL) and GDSII file containing the layout of the interface.

Samsung Electronics, a world leader in advanced memory technology, today announced that it has begun mass producing the industry's first 16-gigabyte (GB) LPDDR5 mobile DRAM package for next-generation premium smartphones. Following mass production of the industry-first 12 GB LPDDR5 in July, 2019, the new 16 GB advancement will lead the premium mobile memory market with added capacity that enables enhanced 5G and AI features including graphic-rich gaming and smart photography.

"Samsung has been committed to bringing memory technologies to the cutting edge in allowing consumers to enjoy amazing experiences through their mobile devices. We are excited to stay true to that commitment with our new, top-of-the-line mobile solution for global device manufacturers," said Cheol Choi, senior vice president of memory sales & marketing, Samsung Electronics. "With the introduction of a new product lineup based on our next-generation process technology later this year, Samsung will be able to fully address future memory demands from global customers."

With a 2.4-liter volume, a conventional black plastic body, and essential connectivity, the Ruijie RG-CT7800 may come across as a run-of-the-mill mini-PCs for small businesses or those who do precious little offline, except what's under the hood. This humble compact desktop is among the first design wins of China's ambitious effort at having an x86 processor built entirely on Chinese soil, the Zhaoxin KaiXian. This processor is making its way to products, and was recently pictured on an embedded motherboard. The KaiXian, along with the notebooks, motherboards, micro-servers, and mini-PCs that implement it, form the tip of China's 3-5-2 policy, an ambitious plan to rid all state- and state-owned institutions of "foreign hardware."

The numerals in "3-5-2" are supposed to correspond to foreign hardware replacement targets set by the country's Central Government - 30% by the end of 2020, an additional 50% by the end of 2021, and the remaining 20% by the end of 2022. To support this plan, the Chinese electronics industry, flush with state investment, has indigenized several key components of the modern PC, including DRAM, NAND flash, and now CPU. The country already dominates the global electronic components market. The RG-CT7800 implements The KaiXian KX-U6780A SoC that sports eight x64 CPU cores running at 2.70 GHz. Interestingly, the chip is manufactured on TSMC's 16 nm FinFET node (a de facto "foreign" source, but one that's de jure China from Beijing's perspective). Ruijie is equipping the RG-CT7800 with 8 GB of DDR4 memory, and 256 GB of SSD-based storage. One can make out industry-standard USB, Ethernet, 3.5 mm audio jacks, etc., from the pictures. The box will be compatible with UOS and NeoKylin (Linux distros built under scrutiny of the Chinese Government). With state institutions being on the clock to implement their 3-5-2 targets, it's possible that the first volumes of RG-CT7800 will be sold exclusively to state customers.

Golden Emperor International Ltd. - one of the world's leading PC components and peripheral manufacturers, is pleased to announce the EVO SPEAR Phantom Gaming Edition DDR4 Memory, GeIL and ASRock's co-branded DRAM, is now available at Newegg.com and select retailers in the Americas.

GeIL memory has joined forces with leading motherboard brand, ASRock, and its top-of-the-line Phantom Gaming Alliance. Through this partnership, GeIL and ASRock dedicated to building a strong foundation for compatibility and reliability between DRAM and motherboard. The EVO SPEAR Phantom Gaming Edition Memory is tested under the strict criteria and validation of the ASRock Phantom Gaming series motherboards. As an excellent result of the cooperation, exceptional stability has benefited. It's available in frequencies from 2400 MHz to 3200 MHz, capacity for 4 GB to 32 GB kit, and runs as low as 1.2 V and at max 1.35 V.

Micron Technology, Inc., today announced it has shipped the world's first low-power DDR5 DRAM in mass production to be used in the soon-to-be-released Xiaomi Mi 10 smartphone. As Xiaomi's memory technology partner, Micron provides LPDDR5 DRAM with superior power efficiency and faster data access speeds to meet growing consumer demand for artificial intelligence (AI) and 5G functionality in smartphones.

"Micron's leadership in delivering the industry's first low-power DDR5 DRAM for use in a smartphone will accelerate enablement of 5G and AI applications," said Dr. Raj Talluri, senior vice president and general manager of the Mobile Business Unit at Micron. "Our customers and partners require next-generation memory solutions, based on the latest process technology, that drive unmatched power and performance to support 5G and AI systems. Micron's LPDDR5 DRAM addresses those requirements with a 50% increase in data access speeds and more than 20% power efficiency compared to previous generations."

"We value Micron's long-standing leadership and innovation in memory," said Chang Cheng, vice president at Xiaomi Group. "Micron's LPDDR5 DRAM market-leading features ensure our Xiaomi Mi 10 smartphone will remain power-efficient while still offering incredible performance and greater stability. We believe LPDDR5 will be the standard configuration for all flagship devices in 2020."

Samsung Electronics, the world leader in advanced memory technology, today announced the market launch of 'Flashbolt', its third-generation High Bandwidth Memory 2E (HBM2E). The new 16-gigabyte (GB) HBM2E is uniquely suited to maximize high performance computing (HPC) systems and help system manufacturers to advance their supercomputers, AI-driven data analytics and state-of-the-art graphics systems in a timely manner.

"With the introduction of the highest performing DRAM available today, we are taking a critical step to enhance our role as the leading innovator in the fast-growing premium memory market," said Cheol Choi, executive vice president of Memory Sales & Marketing at Samsung Electronics. "Samsung will continue to deliver on its commitment to bring truly differentiated solutions as we reinforce our edge in the global memory marketplace."

DRAM Calculator for Ryzen by 1usmus is the definitive utility to demystify memory overclocking and optimization on AMD Ryzen-powered PCs. It lets you feed in settings you know, and calculates the most optimal related settings (such as latencies), so you get the most from your memory overclock. Version 1.7.0 adds certain memory benchmarks to the utility, including a benchmark for memory bandwidth (reads and writes), and AMD processor inter-core latency tests. The new version also spares you of having to manually input certain current values, by adding the ability to read current memory timings for machines powered by Ryzen 3000-series "Matisse" processors. The new version also adds support for Ryzen Threadripper 3000 "Castle Peak" processor series. Support is also added for SK hynix DJR memory modules. Grab DRAM Calculator for Ryzen from the link below.

DOWNLOAD: DRAM Calculator for Ryzen by 1usmus v1.7.0

Phison Electronics, the industry's leader in flash controller and NAND storage solutions, is demonstrating mainstream performance using 4-bits per cell QLC NAND flash controllers and SSDs at the Consumer Electronics Show 2020 (CES) in Las Vegas, Nevada. In its private suite, Phison is showcasing the addition of support for QLC NAND to its already shipping E16 PCIe Gen 4x4, E12 PCIe Gen 3x4, and S12 SATA controllers that use TLC NAND. Phison's industry leading approach leverages highly successful controllers that were qualified by tier-1 OEMs, are in mass production now, and extends new SSD designs to utilize either TLC or QLC NAND. Phison's proprietary QLC NAND controller technology enables higher SSD capacities in industry standard form factors while meeting the performance demands of mainstream applications.

Phison's flagship E16 series controller for PCIe Gen 4x4 NVMe SSDs can achieve up to 4 TB in capacity with QLC NAND and reaches speeds of 4.9 GB/s for sequential reads and 3.8 GB/s for sequential writes. The E12 series controller enables PCIe Gen 3x4 NVMe SSDs and has a capacity of up to 8 TB and speeds of 3.4 GB/s sequential reads, 3.0 GB/s sequential writes with QLC NAND. For the SATA interface, Phison is also demonstrating the S12 controller series SSDs with up to 16 TB using QLC NAND and performance at 550 MB/s sequential reads and 530 MB/s sequential writes. Phison's DRAM-less S13T controllers enable smaller form factors, have a capacity of up to 2 TB, and operate at 550 MB/s sequential reads and 500 MB/s sequential writes.

One of the big hardware industry changes of 2019 was the formal spin-off of Toshiba Memory as an entirely independent firm called Kioxia. This is big, because Toshiba is regarded as the inventor of NAND flash as we know it; and a pioneering firm with DRAM, NAND flash, and other forms of solid-state storage. Toshiba retains the hard disk business. Having formally begun operations only in Q4-2019, much of Kioxia's upcoming products are in development, but we still caught some of their latest SSDs that implement PCIe gen 4.0 and NVMe 1.4 protocol, besides some former-Toshiba products under new Kioxia branding. Kioxia is planning to make a big splash in the near future as its pioneering Twin BiCS Flash tech hits the market, besides scoring design wins with the automotive and data-center industries.

The CD6 and CM6 SSDs are star-attractions. The CD6 is designed for data-centers, and comes in capacities ranging all the way from 800 GB to 15 TB, with 1 to 3 DWPD endurance. It uses the next-generation U.3 (SFF-TA-1001) connector with PCI-Express 4.0 x4 physical-layer and NVMe 1.4 protocol. Among its security features are SIE, FIPS140-2, and SED Opal/Ruby. The drive is built in the 15 mm-thick 2.5-inch form-factor. The CM6 is its cousin, targeted at enterprise environments with higher mission-criticality. With capacities ranging from 800 GB to a staggering 30 TB, the drive offers sequential transfer-rates of up to 6,400 MB/s by leveraging PCI-Express 4.0 x4 and NVMe 1.4. Much like the CD6, the CM6 uses the new U.3 connector, and is built in the 15 mm form-factor. Endurance and security feature-set are identical to the CD6. We also spotted the 2+ year old rebranded XD5-series and PM5-series in fresh Kioxia colors. Lastly, there are the XG6 and XG6-P SSDs from 2019 transitioned to the Kioxia brand.

Korean DRAM and NAND flash giant SK Hynix brought its latest memory innovations to the 2020 International CES. The star attraction at their booth was the "4D NAND" technology, and some of the first client-segment SSDs based on it. As a concept, 4D NAND surfaced way back in August 2018, and no, it doesn't involve the 4th dimension. Traditional 3D NAND chips use charge-trap flash (CTF) stacks spatially located next to a peripheral block that's responsible for wiring out all of those CTF stacks. In 4D NAND, the peripheral block is stacked along with the CTF stack itself, conserving real-estate on the 2-D plane (which can then be spent on increasing density). We caught two 128-layer 4D NAND-based client-segment drives inbound for 2020, the Platinum P31 M.2 NVMe, and Gold P31 M.2 NVMe. The already launched Gold S31 SATA drive was also there.

Micron has today announced that it started sampling RDIMMs based on DDR5 technology to its industry partners. Designed for server operations, these DDR5 modules come in RDIMM form-factor and feature Error-Correcting Code (ECC) technology for removing any error that occurs inside electronic circuits. The new DDR5 standard offers a massive performance uplift compared to the previous generation of DDR4 memory. For starters, DDR5 will double the MT/s transfer rate to 6400 MT/s, double the speed of the original 3200 MT/s speed for DDR4 that was established by JEDEC. The bandwidth of the new DDR memory is supposed to be 32 GB/s, which is 25% faster than the original 25.6 GB/s bandwidth of DDR4.

With DDR5, the SDRAM prefetch buffer data size is being doubled to 16 data words per memory access, making for a 16n prefetching throughput. Another improvement is that the highest possible density for DDR5 chips is now being up to 64 Gb per chip. Additionally, DDR5 is supposed to bring the power needed for chip operation down to 1.1 volts, which is around 8% lower than what DDR4 achieved. There are also features like MIR (Mirror Pin) which provides better DIMM signaling, and more options for PRECHARGE and REFRESH commands that can now operate on a per bank basis, so specific banks can be refreshed in bank group. It is also worth pointing out that DDR5 chips are manufactured using 1znm memory manufacturing process.

A tiny minute-long power-outage halted production at a Samsung Electronics plant in Hwaseong, South Korea, according to a Reuters report citing Korean news agency Yonhap. This stopped some production lines of DRAM and NAND flash memory. A source with "direct knowledge of the matter" told Reuters that the outage likely caused millions of Dollars in losses to Samsung. Semiconductor manufacturing in general is a very power-sensitive process, and a stoppage at any of its manufacturing stages can result in wasted batches; not to mention the time lost to recovery. For instance, a 30-minute power outage in 2018 inflicted a $43.32 million loss to Samsung.

The cause of the power outage on Tuesday afternoon (31st December), is said to be a fault with a regional transmission cable. It will take Samsung up to two days (mid-Thursday) to get the production line rolling again. On the flipside, the resulting drop in output could help Samsung push out its swelling NAND flash and DRAM inventory, reports Yonhap, citing an analyst.

ADATA Technology, a leading manufacturer of high-performance DRAM modules, NAND Flash products, and mobile accessories today announces the launch of the XPG Hunter DDR4 memory module. Geared toward PC enthusiasts and gamers, the XPG Hunter delivers all the benefits of DDR4 with remarkable performance and efficiency. It supports XMP 2.0 for easy overclocking and offers great stability, making it ideal for performance seekers - gaming to competitive benchmarking. It comes in U-DIMM and SO-DIMM variants to meet the needs of desktop and notebook users alike.

The XPG Hunter modules are made with high-quality chips selected through a strict filtering process. They are equipped with the finest PCBs and pass rigid reliability and compatibility tests to ensure longevity and rugged durability, which are vital for overclocking, gaming, and extreme benchmarking. The modules deliver high-speed performance of up to 3200 MHz and comes with capacities of 4 GB, 8 GB, 16 GB, or 32 GB to meet the needs of diverse users and budgets.

ChangXin Memory Technologies, a Chinese startup founded in 2016 that was formerly known as "Innotron Memory", now claims that it has become China's first and only domestic DRAM supplier. Following the announcement that it started production of domestic DRAM chips, ChangXin is now reportedly shipping its first DRAM wafers. With an output of around 20000 wafers per month, the company is currently building LPDDR4, DDR4 8Gbit chips using the "10-nanometer class" node, which is supposed to be 18 or 19 nm size in reality.

The company expects to double its wafer output to 40000 wafers per month sometime around Q2 of 2020 when additional expansion facilities will start production. ChangXin plans to soon open two more manufacturing facilities to start manufacturing even more wafers, in addition to its Fab 1. So far ChangXin has laid-out plans to start manufacturing DRAM technology based on stack capacitor, which is different from the usual trench capacitor technology few companies are pursuing.

CORSAIR, a world leader in PC gaming peripherals and enthusiast components, today announced a range of products including liquid CPU coolers, high-frequency DRAM, and efficient power supplies fully tested and validated for compatibility with the new 3rd Generation AMD Ryzen Threadripper high-end desktop processors. With the highest core and thread count on the HEDT market, combined with the lightning-fast PCI-Express 4.0 platform, AMD's most powerful desktop processor can create, composite, render, encode, and deliver with unprecedented multitasking power - and CORSAIR is ready with the widest range of guaranteed-compatible products to help get the best performance out of a new Ryzen Threadripper-based PC.

Today, Samsung's foundry division, dedicated to the manufacturing of DRAM chips, is facing challenges from mistakes that happened a few weeks ago. Those mistakes are in the form of contamination of the clean rooms, where all the tools necessary for the manufacturing of DRAM chips on 200 mm wafers got infected, and now Samsung is taking a multi-million dollar loss because the new wafers have to be scrapped.

Clean rooms are essential for the semiconductor manufacturing process, because they keep all the pollutants away from silicon, keeping silicon clean and ready for use. However, Samsung has not managed to keep a clean room for its DRAM manufacturing facility working with 200 mm wafers for 1x nm-class DRAM chips. The tools used for wafer processing have been contaminated and, therefore, the wafers themselves because of their interactions. Samsung has admitted that they have lost around "several billion South Korean won," resulting in millions of US dollars. The re-assuring thing that this will not significantly impact the DRAM market is that production is now going as planned, and the issue is sorted out, so we can hope this doesn't have any big impact on the DRAM prices.

Micron Technology, Inc., today announced a breakthrough in nonvolatile memory technology with the introduction of the world's fastest SSD, the Micron X100 SSD. The Micron X100 SSD is the first solution in a family of products from Micron targeting storage- and memory-intensive applications for the data center. These solutions will leverage the strengths of 3D XPoint technology and usher in a new tier in the memory-to-storage hierarchy with higher capacity and persistence than DRAM, along with higher endurance and performance than NAND.

"Micron's innovative X100 product brings the disruptive potential of 3D XPoint technology to the data center, driving breakthrough performance improvements for applications and enabling entirely new use cases," said Micron Executive Vice President and Chief Business Officer Sumit Sadana. "Micron is the only vertically-integrated provider of DRAM, NAND and 3D XPoint solutions in the world, and this product continues the evolution of our portfolio towards higher value solutions that accelerate artificial intelligence capabilities, drive faster data analytics and create new insights for our customers."

Samsung Electronics, a world leader in advanced memory technology, today announced that it has begun mass producing the industry's first 12-gigabyte (GB) low-power double data rate 4X (LPDDR4X) UFS-based multichip package (uMCP). The announcement was made as part of the company's annual Samsung Tech Day at its Device Solutions' America headquarters in San Jose, California.

"Leveraging our leading-edge 24-gigabit (Gb) LPDDR4X chips, we can offer the highest mobile DRAM capacity of 12 GB not only for high-end smartphones but also for mid-range devices," said Sewon Chun, executive vice president of Memory Marketing at Samsung Electronics. "Samsung will continue to support our smartphone-manufacturing customers with on-time development of next-generation mobile memory solutions, bringing enhanced smartphone experiences to many more users around the globe."

Team Group launched its first 32 GB memory module, the Team Elite TED432G2400C1601. This is a dual-rank DIMM with eight 32 Gbit DRAM chips, with a rated clock-speed of DDR4-2400, and timings of 16-16-16-39, and module voltage of 1.20 V. The module features a simple black PCB of standard height (32 mm), and comes without any heatspreader or heatsink.

Team Group is also selling a 64 GB (2x 32 GB) dual-channel kit with two of these DIMMs, which bears the SKU TED464G2400C16DC01. To use these modules, you'll need either a 9th generation or 10th generation Intel Core processor, or 3rd generation AMD Ryzen, as 32 GB dual-rank DIMMs are unlikely to be supported by older processors. Team Group is backing these modules with lifetime warranty, and is likely to price the 32 GB single-module at USD $150, and the dual-channel kit at $300.