Intel 13th Gen and 14th Gen Processor RMA Didn't Go Through? Reach Out to Intel
Intel on Monday (08/05) provided additional information on its recently announced 2-year worldwide warranty extension for select models within its 13th Gen and 14th Gen Core desktop processors based on the "Raptor Lake" silicon. It mentioned that those who made unsuccessful RMA claims for their processors can reach out to Intel Customer Support for further assistance and remediation. This should prove especially useful for all those that tried to make RMA claims for their processors when these instability issues first came to light, but were met with RMA claim rejections.
Intel also listed out the exact processor model numbers affected by the instability issues, which are eligible not just for the warranty extensions, but also RMA claim assistance. These include every processor model within the 13th- and 14th Gen that are based on the larger "Raptor Lake" or "Raptor Lake Refresh" silicon, which has eight "Raptor Cove" CPU cores, four "Gracemont" E-core clusters, 2 MB of L2 cache per P-core, and 4 MB of L2 cache per E-core cluster. Several processor models within the 13th and 14th Gen are based on the older "Alder Lake" silicon with 1.25 MB of L2 cache per P-core, and 2 MB of L2 cache per E-core cluster. These chips are unaffected by the issue, as are entry-level processors based on the H0 die that only has up to six P-cores, and no E-core clusters.
Intel also listed out the exact processor model numbers affected by the instability issues, which are eligible not just for the warranty extensions, but also RMA claim assistance. These include every processor model within the 13th- and 14th Gen that are based on the larger "Raptor Lake" or "Raptor Lake Refresh" silicon, which has eight "Raptor Cove" CPU cores, four "Gracemont" E-core clusters, 2 MB of L2 cache per P-core, and 4 MB of L2 cache per E-core cluster. Several processor models within the 13th and 14th Gen are based on the older "Alder Lake" silicon with 1.25 MB of L2 cache per P-core, and 2 MB of L2 cache per E-core cluster. These chips are unaffected by the issue, as are entry-level processors based on the H0 die that only has up to six P-cores, and no E-core clusters.