AMD is on the verge of launching its 3rd generation Ryzen "Matisse" processors that are widely expected to take the performance crown from Intel. At its Computex 2019 reveal, AMD CEO Dr Lisa Su claimed that these processors beat the competition in all areas, including gaming. Motherboard manufacturers threw their weight behind AMD by pulling out their most premium brands for the AMD "Valhalla" desktop platform that consists of these processors, mated with an AMD X570 chipset motherboard. Ahead of its E3 2019 keynote Monday afternoon, Intel has come out with a challenge. Chipzilla dares AMD to beat it in "real-world gaming."

At its "gaming performance for the real world" address in Los Angeles Jon Carvill, VP of marketing, challenged AMD to beat it in real world gaming with its upcoming processors. "So you're going to hear a lot about gaming CPUs this week," he began. "They may or may not come from certain three letter acronyms. That said, here's what I want to challenge you. I want to challenge you to challenge them. If they want this crown come beat us in in real world gaming, real world gaming should be the defining criteria that we use to assess the world's best gaming CPU. I challenge you to challenge anyone that wants to compete for this crown to come meet us in real world gaming. That's the measure that we're going to stand by."

Intel laid rest to speculation that post 9th generation, it could replace its Core brand with something else. The 10th generation Core processors, built around the 10 nm "Ice Lake" microachitecture, will feature the first noteworthy IPC increments since "Skylake" thanks to their new "Sunny Cove" CPU cores. These will also feature DLBoost, a fixed-function matrix-multiplication hardware that speeds up deep-neural net building and training by 5x, as well as certain AVX-512 instructions. The cores will be optimized to cope with 2.4 Gbps 802.11ax Wi-Fi and faster Ethernet standards. The first of these chips will target mobile computing platforms, and will be quad-core parts like the dies pictured below. To save notebook PCB real-estate, Intel will put the processor and PCH dies into a multi-chip module. It will be quite a wait for the desktop implementation, but at least you know what their case-badges look like.

AMD CEO Dr. Lisa Su at her 2019 Computex keynote address announced the 3rd generation Ryzen desktop processor family, which leverages the company's Zen 2 microarchitecture, and are built on the 7 nm silicon fabrication process at TSMC. Designed for the AM4 CPU socket, with backwards compatibility for older AMD 300-series and 400-series chipset motherboards, these processors are multi-chip modules of up to two 8-core "Zen 2" CPU chiplets, and a 14 nm I/O controller die that packs the dual-channel DDR4 memory controller and PCI-Express gen 4.0 root complex, along with some SoC connectivity. AMD claims an IPC increase of 15 percent over Zen 1, and higher clock speeds leveraging 7 nm, which add up to significantly higher performance over the current generation. AMD bolstered the core's FPU (floating-point unit), and doubled the cache sizes.

AMD unveiled three high-end SKUs for now, the $329 Ryzen 7 3700X, the $399 Ryzen 7 3800X, and the $499 Ryzen 9 3900X. The 3700X and 3800X are 8-core/16-thread parts with a single CPU chiplet. The 3700X is clocked at 3.60 GHz with 4.40 GHz maximum boost frequency, just 65 Watts TDP and will be beat Intel's Core i7-9700K both at gaming and productivity. The 3800X tops that with 3.90 GHz nominal, 4.50 GHz boost, 105W TDP, and beat the Core i9-9900K at gaming and productivity. AMD went a step further at launched the new Ryzen 9 brand with the 3900X, which is a 12-core/24-thread processor clocked at 3.80 GHz, which 4.60 boost, 72 MB of total cache, 105W TDP, and performance that not only beats the i9-9900K, but also the i9-9920X 12-core/24-thread HEDT processor despite two fewer memory channels. AMD focused on gaming performance with Zen 2, with wider FPU, improved branch prediction, and several micro-architectural improvements contributing to a per-core performance that's higher than Intel's. The processors go on sale on 7/7/2019.

An AMD-based system's most important performance pairing lies in the CPU and system RAM, as a million articles written ever since the introduction of AMD's first generation Ryzen CPUs have shown (remember the races for Samsung B-die based memory?). There are even tools that allow you to eke out the most performance out of your AMD system via fine memory overclocking and timings adjustment, which just goes to show the importance the enthusiast community derives from such tiny details that maximize your AMD Zen-based CPU performance. Now, notorious leaker @momomo_us has seemingly confirmed that AMD has worked wonders on its memory controller, achieving a base JEDEC 3200 MHz specification - up from the previously officially supported DDR4-2666 speeds in the first-gen Ryzen (updated to DDR4-2933 speeds on the 12 nm update).

Intel put out interesting details about its upcoming 10 nanometer "Ice Lake" CPU microarchitecture rollout in its recent quarterly financial results call. The company has started qualification of its 10 nm "Ice Lake" processors. This involves sending engineering samples to OEMs, system integrators and other relevant industry partners, and getting the chips approved for their future product designs. The first implementation of "Ice Lake" will not be a desktop processor, but rather a low-power mobile SoC designed for ultraportables, codenamed "Ice Lake-U." This SoC packs a 4-core/8-thread CPU based on the "Sunny Cove" core design, and Gen11 GT2 integrated graphics with 64 execution units and nearly 1 TFLOP/s compute power. This SoC will also support WiFi 6 and LPDDR4X memory.

Intel CEO Bob Swan also remarked that the company has doubled its 10 nm yield expectations. "On the [10 nm] process technology front, our teams executed well in Q1 and our velocity is increasing," he said, adding "We remain on track to have volume client systems on shelves for the holiday selling season. And over the past four months, the organization drove a nearly 2X improvement in the rate at which 10nm products move through our factories." Intel is prioritizing enterprise over desktop, as "Ice Lake-U" will be followed by "Ice Lake-SP" Xeon rollout in 2020. There was no mention of desktop implementations such as "Ice Lake-S." Intel is rumored to be preparing a stopgap microarchitecture for the desktop platform to compete with AMD "Matisse" Zen 2 AM4 processors, codenamed "Comet Lake." This is essentially a Skylake 10-core die fabbed on existing 14 nm++ node. AMD in its CES keynote announced an achievement of per-core performance parity with Intel, so it could be interesting to see how Intel hopes 10 "Skylake" cores match up to 12-16 "Zen 2" cores.

AMD "Zen 3" microarchitecture could be designed for the enhanced 7 nm+ EUV (extreme ultraviolet) silicon fabrication node at TSMC, which promises a significant 20 percent increase in transistor densities compared to the 7 nm DUV (deep ultraviolet) node on which its "Zen 2" processors are being built. In addition, the node will also reduce power consumption by up to 10 percent at the same operational load. In a late-2018 interview, CTO Mark Papermaster stated AMD's design goal with "Zen 3" would be to prioritize energy-efficiency, and that it would present "modest" performance improvements (read: IPC improvements) over "Zen 2." AMD made it clear that it won't drag 7 nm DUV over more than one microarchitecture (Zen 2), and that "Zen 3" will debut in 2020 on 7 nm+ EUV.

Intel late Tuesday made a boat-load of enterprise-relevant product announcements, including the all important update to its Xeon Scalable enterprise processor product-stack, with the addition of the new 56-core Xeon Scalable "Cascade Lake" processor. This chip is believed to be Intel's first response to the upcoming AMD 7 nm EPYC "Rome" processor with 64 cores and a monolithic memory interface. The 56-core "Cascade Lake" is a multi-chip module (MCM) of two 28-core dies, each with a 6-channel DDR4 memory interface, totaling 12-channel for the package. Each of the two 28-core dies are built on the existing 14 nm++ silicon fabrication process, and the IPC of each of the 56 cores are largely unchanged since "Skylake." Intel however, has added several HPC and AI-relevant instruction-sets.

To begin with, Intel introduced DL Boost, which could be a fixed-function hardware matrix multiplier that accelerates building and training of AI deep-learning neural networks. Next up, are hardware mitigation against several speculative execution CPU security vulnerabilities that haunted the computing world since early-2018, including certain variants of "Spectre" and "Meltdown." A hardware fix presents lesser performance impact compared to a software fix in the form of a firmware patch. Intel has added support for Optane Persistent Memory, which is the company's grand vision for what succeeds volatile primary memory such as DRAM. Currently slower than DRAM but faster than SSDs, Optane Persistent Memory is non-volatile, and its contents can be made to survive power-outages. This allows sysadmins to power-down entire servers to scale down with workloads, without worrying about long wait times to restore uptime when waking up those servers. Among the CPU instruction-sets added include AVX-512 and AES-NI.

Intel's upcoming "Ice Lake" die could be the company's biggest processor innovation in a decade, combining new clean-slate design "Sunny Cove" CPU cores, and a new integrated graphics solution based on the company's Gen11 architecture. "Sunny Cove" introduces significant IPC (single-thread performance) gains over "Coffee Lake," introduces new ISA instruction sets, including AVX-512; and a brand new uncore component; while the Gen11 graphics core is Intel's first iGPU to reach the 1 TFLOP/s mark. Intel demonstrated the ultra-low power "Ice Lake-U" SoC platform in its 2018 Architecture Day briefing.

This "Ice Lake-U" chip, with its TDP in the ballpark of 15 W, was shown ripping through 7-zip and "Tekken 7." With 7-zip, Intel was trying to demonstrate vector-AES and SHA-NI improving archive encryption performance by 75 percent over "Skylake." The Gen11 iGPU was shown providing a smoother gameplay than Skylake with Gen9, although the company neither mentioned resolution, nor frame-rates. Anandtech wagers it's above 30 fps.

Intel today unveiled its first clean-slate CPU core micro-architecture since "Nehalem," codenamed "Sunny Cove." Over the past decade, the 9-odd generations of Core processors were based on incrementally refined descendants of "Nehalem," running all the way down to "Coffee Lake." Intel now wants a clean-slate core design, much like AMD "Zen" is a clean-slate compared to "Stars" or to a large extent even "Bulldozer." This allows Intel to introduce significant gains in IPC (single-thread performance) over the current generation. Intel's IPC growth curve over the past three micro-architectures has remained flat, and only grew single-digit percentages over the generations prior.

It's important to note here, that "Sunny Cove" is the codename for the core design. Intel's earlier codenaming was all-encompassing, covering not just cores, but also uncore, and entire dies. It's up to Intel's future chip-designers to design dies with many of these cores, a future-generation iGPU such as Gen11, and a next-generation uncore that probably integrates PCIe gen 4.0 and DDR5 memory. Intel details "Sunny Cove" as far as mentioning IPC gains, a new ISA (new instruction sets and hardware capabilities, including AVX-512), and improved scalability (ability to increase core-counts without running into latency problems).

AMD reportedly put out its IPC (instructions per clock) performance guidance for its upcoming "Zen 2" micro-architecture in a version of its Next Horizon investor meeting, and the numbers are staggering. The next-generation CPU architecture provides a massive 29 percent IPC uplift over the original "Zen" architecture. While not developed for the enterprise segment, the stopgap "Zen+" architecture brought about 3-5 percent IPC uplifts over "Zen" on the backs of faster on-die caches and improved Precision Boost algorithms. "Zen 2" is being developed for the 7 nm silicon fabrication process, and on the "Rome" MCM, is part of the 8-core chiplets that aren't subdivided into CCX (8 cores per CCX).

According to Expreview, AMD conducted DKERN + RSA test for integer and floating point units, to arrive at a performance index of 4.53, compared to 3.5 of first-generation Zen, which is a 29.4 percent IPC uplift (loosely interchangeable with single-core performance). "Zen 2" goes a step beyond "Zen+," with its designers turning their attention to critical components that contribute significantly toward IPC - the core's front-end, and the number-crunching machinery, FPU. The front-end of "Zen" and "Zen+" cores are believed to be refinements of previous-generation architectures such as "Excavator." Zen 2 gets a brand-new front-end that's better optimized to distribute and collect workloads between the various on-die components of the core. The number-crunching machinery gets bolstered by 256-bit FPUs, and generally wider execution pipelines and windows. These come together yielding the IPC uplift. "Zen 2" will get its first commercial outing with AMD's 2nd generation EPYC "Rome" 64-core enterprise processors.Update Nov 14: AMD has issued the following statement regarding these claims.

As we demonstrated at our Next Horizon event last week, our next-generation AMD EPYC server processor based on the new 'Zen 2' core delivers significant performance improvements as a result of both architectural advances and 7nm process technology. Some news media interpreted a 'Zen 2' comment in the press release footnotes to be a specific IPC uplift claim. The data in the footnote represented the performance improvement in a microbenchmark for a specific financial services workload which benefits from both integer and floating point performance improvements and is not intended to quantify the IPC increase a user should expect to see across a wide range of applications. We will provide additional details on 'Zen 2' IPC improvements, and more importantly how the combination of our next-generation architecture and advanced 7nm process technology deliver more performance per socket, when the products launch.

AMD "Zen" CPU architecture brought the company back to competitive relevance in the processor market. It got an incremental update in the form of "Zen+" which saw the implementation of an improved 12 nm process, and improved multi-core boosting algorithm, along with improvements to the cache subsystem. AMD is banking on Zen 2 to not only add IPC (instructions per clock) improvements; but also a new round of core-count increases. Bits n Chips has information that Zen 2 is making significant IPC gains.

According to the Italian tech publication, we could expect Zen 2 IPC gains of 13 percent over Zen+, which in turn posted 2-5% IPC gains over the original Zen. Bits n Chips notes that these IPC gains were tested in scientific tasks, and not in gaming. There is no gaming performance data at the moment. AMD is expected to debut Zen 2 with its 2nd generation EPYC enterprise processors by the end of the year, built on the 7 nm silicon fabrication process. This roughly 16 percent IPC gain versus the original Zen, coupled with higher clocks, and possibly more cores, could complete the value proposition of 2nd gen EPYC. Zen 2-based client-segment products can be expected only in 2019.

With the swanky Core i9-9900K and Core i7-9700K eight-core chips getting all the attention, the less glamorous Core i5-9600K is taking shape, which could bring a little more performance to the $250 price-point. This 6-core/6-thread chip succeeds the current-gen i5-8600K, and has the same 9 MB of L3 cache. With not much in the way of micro-architectural IPC improvements, barring silicon-level hardening against certain vulnerabilities, which could improve speculative execution performance (versus processors with software patches that inflict performance penalties); Intel has dialed up clock speeds. The chip is clocked at 3.70 GHz, with a maximum Turbo Boost frequency of 4.60 GHz, compared to the 3.60 GHz nominal and 4.30 GHz Turbo Boost frequencies of its predecessor.

The higher clocks seem to bring the i5-9600K a touch higher than the i5-8600K in terms of GeekBench scores, although still nowhere close to the i7-8700 (non-K). The i5-8600K, if you'll recall, beat some of its pricier previous-generation siblings such as the i7-7700, in multi-threaded tests. Someone with access to an i5-9600K put it through GeekBench 4. The chip scores 6,015 points in the single-core test or about 3.7 percent faster than its predecessor (the i5-8600K typically scores 5,800 points), coming from the 300 MHz higher single-core boost. The multi-core score is 23,393 points, which is a meager 2 percent faster (the i5-8600K typically scores around 23,000 points). The generational jump in performance for the mid-range hence seems to have stagnated. At best the i5-9600K will repair the uncertain price/performance equation the i5-8600K has against the AMD Ryzen 5 2600X.

Intel is giving final touches to its 9th generation Core "Whiskey Lake-U" processors for Ultrabooks and other ULV platforms. Successors to 8th Gen "Kaby Lake Refresh" chips, these 15-Watt SoCs may not pack a newer microarchitecture in terms of IPC increases, but Intel is building them on the latest iteration of its 14 nm node, along with tweaks made to their Turbo Boost algorithm, which combined with higher boost clocks, should offer better performance than the previous generation.

The lineup begins with the Core i3-8145U, successor to the i3-8130U. This 2-core/4-thread chip is has a lower nominal clock at 2.10 GHz (vs. 2.20 GHz of its predecessor), but significantly higher boost clocks of 3.90 GHz (vs. 3.40 GHz of the i3-8130U). The Core i5-8265U and top-end i7-8565U are both 4-core/8-thread chips with a nominal clocks of 1.60 GHz and 1.80 GHz, respectively. The i5-8265U has a boost clock of 4.10 GHz and 6 MB of L3 cache; while the i7-8565U tops that with 4.70 GHz boost clocks, and 8 MB of L3 cache. All three chips have 15W TDP, configurable to 25W by applying the "high performance" power scheme.

Intel's client desktop processor lineup is under tremendous pressure owing to competition from AMD, with the company having to roll out entire processor generations over mere 2-3 quarters. You'll recount that Intel was merrily trotting around with its barely-innovative 7th Gen "Kaby Lake" family in early 2017, when AMD stunned the industry with an outperforming product lineup. The 7th generation barely lasted its planned product cycle, before Intel rushed in a pathetic sub-$500 Core X lineup, and the 8th generation "Coffee Lake" with 50-100% core-count increases. Even that is proving insufficient in the wake of 2nd generation AMD Ryzen "Pinnacle Ridge," and Intel is cutting short its product cycle with the 9th generation Core "Whiskey Lake" (or "Coffee Lake" Refresh) series, that further increase core-counts.

"Whiskey Lake" was originally planned for Q1-2019 alongside the 14 nm original Z390 chipset. Intel wasn't expecting AMD to rebound with Ryzen 2000 series (particularly the tangible IPC increases and improved multi-core boosting). And so, it decided to rush through with a new product generation yet again. The Z370 is being re-branded to Z390 (with an improved CPU VRM reference design), and what was originally meant to come out in Q1-2019, could come out by Q4-2018, at the very earliest by October. Intel reportedly planned availability sooner, but realized that distributors have heaps of unsold 8th generation Core inventory, and motherboard vendors aren't fully ready for the chip. Since getting a 9th gen Core chip doesn't warrant a new motherboard, customers would be inclined to pick up 9th generation chip with their existing boards, or any new 300-series board. This would kill the prospects of selling 8th generation Core CPUs.

A post via Chiphell makes some substantial claims on AMD's upcoming Zen 2 microarchitecture, built on the 7 nm process. AMD has definitely won the core-count war once again (albeit with a much more decisive blow to Intel's dominance than with Bulldozer), but the IPC battle has been an uphill one against Intel's slow, but sure, improvement in that area over the years. AMD did say, at the time they introduced the Zen architecture, that they had a solid understanding on Zen's choke points and its improveable bits and pieces - and took it to heart to deliver just that.

It looks like AMD's processor product launch cycle is on steroids, and keeping up (or even ahead) of Intel. After launching the first 12 nm processor architecture with "Zen+," the company is giving final touches to what it hopes to be the world's first 7 nanometer processor architecture, with "Zen 2." The company will reportedly begin sampling the chip within 2018, to enable volume production and market launch in 2019. Speaking at an investors conference call following the company's Q1-2018 Results release, AMD CEO Dr. Lisa Su confirmed the 7 nm roll-out strategy of her company.

"We have a 7nm GPU based on Vega that we'll sample later this year. We have a 7nm server CPU that we'll sample later this year. And then, obviously, we have a number of products that are planned for 2019 as well. So it's a very, very busy product season for us. But we're pleased with the sort of the execution on the product roadmap," Dr. Su said. Unlike Zen+, Zen 2 is a major update to the company's processor micro-architecture, and presents the company with opportunities to improve several silicon-level specifications, such as the number of cores per CCX, the IPC of each core, the core-count of the die, the cache hierarchy, and the overall energy-efficiency.

AAEON, an award-winning developer of embedded systems, is pleased to announce the release of the BOXER-6640, an embedded controller with a 6th or 7th Generation Intel Core Desktop Processor and support for DDR4 memory.

The BOXER-6640 is purpose built for factory automation and machine vision applications. With two LAN ports, four USB3.0 ports, and three USB2.0 ports, it can be connected to a range of cameras and sensors, and its 8-bit DIO enables it to control connected systems based on digital inputs. As it also has a VGA port and two further combined HDMI and DP ports for dual display output, this controller can easily serve as the hub of an effective HMI solution.

AAEON, a leading developer of Industry 4.0 solutions, announces the release of the BOXER-6640M embedded Box PC. This feature-rich ruggedized device supports high frames per second (FPS) cameras and dynamic facial recognition software, making it ideal for both machine vision and digital surveillance applications.

"With its combination of nine LAN ports and a 6th or 7th Generation Intel Core Desktop Processor, the BOXER-6640M achieves a level of performance few other systems can match," said system platform division product manager Roy Huang. While it is normal to see PCs fitted with either a powerful processor or a large number of LAN ports, it's rare to find both features on the same machine. The BOXER-6640M also features eight USB 3.0 ports to meet the growing demand for USB camera support.

At a press event, AMD confirmed that its 2nd generation Ryzen desktop processors will debut in Q1-2018 (before April). It also clarified that "2nd Generation" does not equal "Zen2" (a micro-architecture that succeeds "Zen"). 2nd Generation Ryzen processors are based on two silicons, the 12 nm "Pinnacle Ridge," which is a GPU-devoid silicon with up to eight CPU cores; and "Raven Ridge," which is an APU combining up to 4 CPU cores with an iGPU based on the "Vega" graphics architecture. The core CPU micro-architecture is still "Zen." The "Pinnacle Ridge" silicon takes advantage of the optical shrink to 12 nm to increase clock speeds, with minimal impact on power-draw.

AMD is also launching a new generation of chipset, under the AMD 400-series. There's not much known about these chipsets. Hopefully they feature PCIe gen 3.0 general purpose lanes. The second-generation Ryzen processors and APUs will carry the 2000-series model numbering, with clear differentiation between chips with iGPU and those without. Both product lines will work on socket AM4 motherboards, including existing ones based on AMD 300-series chipset (requiring a BIOS update). AMD is reserving "Zen2," the IPC-increasing successor of "Zen" for 2019. The "Mattise" silicon will drive the multi-core CPU product-line, while the "Picasso" silicon will drive the APU line. Both these chips will run on existing AM4 motherboards, as AMD plans to keep AM4 as its mainstream-desktop socket till 2020.

AMD is reportedly accelerating launch of its first GPU architecture built on the 7 nanometer process, codenamed "Navi." Graphics cards based on the first implementation of "Navi" could launch as early as by Q3-2018 (between July and September). Besides IPC increments with its core number-crunching machinery, "Navi" will introduce a slew of memory and GPU virtualization technologies.

AMD will take its multi-chip module (MCM) approach of building high-performance GPUs a step further, by placing multiple GPU dies with their HBM stacks on a single package. The company could leverage its InfinityFabric as a high-bandwidth interconnect between the GPU dies (dubbed "GPU module"), with an I/O controller die interfacing the MCM with the host machine. With multi-GPU on the decline for games, it remains to be seen how those multiple GPU modules are visible to the operating system. In the run up to "Navi," AMD could give its current "Vega" architecture a refresh on a refined 14 nm+ process, to increase clock speeds.

Not to be held back by silicon fabrication process limitations like in the past, AMD will build its second-generation Ryzen CPUs and Radeon Vega GPUs on the new 12 nanometer LP (low power) FinFET process by GlobalFoundries. From the looks of it, "2nd generation Ryzen" doesn't seem to be the same as "Zen2" (a micro-architectural advancement due to be built on the 7 nm process), and is more likely an optical shrink of existing 14 nm IP to the 12 nm process, giving AMD the headroom to increase yields, and clock speeds across the board. The 12 nm switch allows AMD to roll out a new "generation" of Ryzen processors as early as the first half of 2018.

The "Vega 10" silicon could be another key piece of AMD IP on the receiving end of an optical shrink to 12 nm, which will give AMD much needed power savings, letting it increase clock speeds, and probably implement faster standards of HBM2 memory, such as 2.00 GT/s. AMD will likely label this shrunk down silicon "Vega 20." There's also the possibility of AMD building a bigger new GPUs altogether. In 2019, the company will give its CPU and GPU lineups major micro-architectural upgrades, and the switch to the 7 nm node. The new "Zen2" micro-architecture with IPC increases and new ISA instruction-sets, will be launched on the CPU side, and the new "Navi" graphics architecture will take center-stage.

Disclaimer: take this post with a bucket of salt. However, the information here, if true, could heavily impact AMD's RX Vega cards' stock at launch and in the subsequent days, so, we're sharing this so our readers can decide on whether they want to pull the trigger for a Vega card at launch, as soon as possible, or risk what would seem like the equivalent of a mining Black Friday crowd gobbling up AMD's RX Vega models' stock. Remember that AMD has already justified delays for increased stock so as to limit the impact of miners on the available supply.

The information has been put out by two different sources already. The first source we encountered (and which has been covered by some media outlets solo) has been one post from one of OC UK's staff, Gibbo, who in a forum post, said "Seems the hash rate on VEGA is 70-100 per card, which is insanely good. Trying to devise some kind of plan so gamers can get them at MSRP without the miners wiping all the stock out within 5 minutes of product going live."

AMD, at its post-Ryzen 7 launch Reddit AMA, disclosed some juicy details about its other upcoming socket AM4 chips, beginning with the rest of the Ryzen 5 and Ryzen 3 "Summit Ridge" processor roll-out, and a little bit about its 8th generation socket AM4 APU, codenamed "Raven Ridge." To begin with, AMD CEO Lisa Su stated that "Raven Ridge" will also be sold under the Ryzen brand. This would mark a departure from the less-than-stellar A-series branding for its performance APUs. "Raven Ridge" likely combines a "Zen" quad-core CPU complex (CCX) with an integrated GPU based on one of AMD's newer GPU architectures (either "Polaris" or "Vega").

The range-topping Ryzen 7 series will lead the company's lineup throughout Q1, with six-core and quad-core Ryzen 5 and Ryzen 3 series launches being scheduled for later this year. Our older reports pinned Ryzen 5 series rollout for Q2, and Ryzen 3 series for the second half of 2017. This is likely also when the company rolls out "Raven Ridge" initially as mobile Ryzen products (BGA packages, which will likely also be used in AIOs), and later as desktop socket AM4 parts.

Let's quietly approach the elephant in the room: Intel's pricing structure will hardly stand the onslaught of AMD's Ryzen, which, if early benchmarks are to be believed, has apparently caught Intel with its pants down. Even purely from the leaks that have been following us non-stop in the last several months, it's obvious that AMD managed to outdo itself in the best way possible, managing to develop an architecture which offers up to 52% more performance than their previous one. Intel, which was enjoying the sun-shaded comfort of carrying a virtual, high-performance x86 monopoly, grew stagnant in innovation, ensuring it would stretch its bottom-line by way of minimal R&D investment - just enough to be able to name their improvements as a "new generation" of processors each year.

This in turn has led to an interesting outlook in the high-performance x86 market: customers aren't blind, and they see when a company is stretching its fingers in their pockets. A stagnant performance increase on Intel's customer processors with almost a decade of single-digit increments and paralyzed core-counts to an (admittedly strong) architecture have taken away a lot of customers' goodwill towards Intel. That Intel still has strong brand cognition is a no-brainer, but it doesn't have as much brand credit these days, on account of the low performance gains, and tick-tock falter, than it did in the days of Athlon 64. AMD has the benefit of being the underdog, of coming up with something new, fresh and performant (with headlines claiming it is the latest revival of a sleeping giant)... and those are all points that put pressure on Intel to reignite interest on its products.

At the International Solid-State Circuits Conference held earlier this month, some solid information has come to surface on a subject near and dear to many enthusiast hearts right now: AMD's upcoming Ryzen CPU line.

As far as credibility, the information comes in fairly convincing form. AMD's claims are backed with die shots of actual AMD Ryzen cores and further supported by more shots of their CCX (core complex) modules. From these shots, we can guess at several things, and further more see evidence for several of their claims.