Korean DRAM and NAND flash giant SK Hynix brought its latest memory innovations to the 2020 International CES. The star attraction at their booth was the "4D NAND" technology, and some of the first client-segment SSDs based on it. As a concept, 4D NAND surfaced way back in August 2018, and no, it doesn't involve the 4th dimension. Traditional 3D NAND chips use charge-trap flash (CTF) stacks spatially located next to a peripheral block that's responsible for wiring out all of those CTF stacks. In 4D NAND, the peripheral block is stacked along with the CTF stack itself, conserving real-estate on the 2-D plane (which can then be spent on increasing density). We caught two 128-layer 4D NAND-based client-segment drives inbound for 2020, the Platinum P31 M.2 NVMe, and Gold P31 M.2 NVMe. The already launched Gold S31 SATA drive was also there.

SK hynix Inc. presents its innovative semiconductor technologies leading the 4th Industrial Revolution at CES 2020, the world's largest trade show for IT and consumer electronics in Las Vegas, USA, from January 7-10, 2020. In line with its "Memory Centric World" theme, SK hynix depicts a futuristic city which effectively utilizes enormous amounts of data. The Company also showcases its semiconductor solutions across six crucial business fields - artificial intelligence (AI), augmented reality (AR) / virtual reality (VR), automotive, Internet of Things (IoT), big data and 5G.

Headlining at CES 2020 are SK hynix's memory solutions including HBM2E, DDR5 for servers, and SSD, which are already highly regarded and widely used in 4th industrial fields such as 5G and AI for their stability, speed, power consumption and density excellence. Other cutting-edge products set to make headlines in January are the Company's highly durable LPDDR4X and eMMC 5.1, which are optimized for automobiles. What's more, SK hynix is displaying its LPDDR5 and UFS that enhance the performance of 5G smartphones as well as CIS (CMOS Image Sensor) which is essential in establishing effective environments for AR/VR and IoT.

Intel's Core "Tiger Lake" microarchitecture could be a point of transition between DDR4 and DDR5 for the company. Prototypes of devices based on the ultra-compact "Tiger Lake-Y" SoC were earlier shown featuring LPDDR4X memory, although a new device, possibly a prototyping platform, in the regulatory queue with the Eurasian Economic Commission describes itself as featuring a "Tiger Lake-U" chip meant for thin and light notebooks and convertibles. This device features newer LPDDR5 memory, according to its regulatory filing.

LPDDR5 succeeds LPDDR4X as the industry's next low-power memory standard, offering data-rates of up to 6,400 MT/s (versus up to 4,266 MT/s of LPDDR4X), and consumes up to 30 percent less power. This prototype at the EEC is sure to be using unreleased LPDDR5 memory chips as DRAM majors Samsung and SK Hynix plan to ship their DDR5-based memory solutions only by the end of this year, although mass-production of the chips have already started at Samsung, in PoP form-factors. A successor to the 10th generation Core "Ice Lake," "Tiger Lake" will be Intel's second CPU microarchitecture designed for its 10 nm silicon fabrication node.

SK hynix Inc. today announced financial results for its third quarter 2019 ended on September 30, 2019. The consolidated third quarter revenue was 6.84 trillion won while the operating profit amounted to 473 billion won and the net income 495 billion won. Operating margin and net margin for the quarter was 7%.

The revenue in the third quarter increased by 6% quarter-over-quarter (QoQ) as demand began to pick up. However, the operating profit fell by 26% QoQ as DRAM unit cost reduction was not enough to offset the price drop. DRAM bit shipments increased by 23% QoQ as the Company actively responded to the new products in the mobile market and purchases from some data center customers also increased. DRAM prices remained weak during the quarter, leading to a 16% drop in the average selling price, with the decline smaller than the previous quarter.

Samsung Electronics, the world leader in advanced memory technology, today announced that it has begun mass producing the industry's first 12-gigabit ( Gb) LPDDR5 mobile DRAM, which has been optimized for enabling 5G and AI features in future smartphones. The new mobile memory comes just five months after announcing mass production of the 12 GB LPDDR4X, further reinforcing the company's premium memory lineup. Samsung also plans to start mass producing 12-gigabyte (GB) LPDDR5 packages later this month, each combining eight of the 12 Gb chips, in line with growing demand for higher smartphone performance and capacity from premium smartphone manufacturers.

"With mass production of the 12 Gb LPDDR5 built on Samsung's latest second-generation 10-nanometer (nm) class process, we are thrilled to be supporting the timely launch of 5G flagship smartphones for our customers worldwide," said Jung-bae Lee, executive vice president of DRAM Product & Technology, Samsung Electronics. "Samsung remains committed to rapidly introducing next-generation mobile memory technologies that deliver greater performance and higher capacity, as we continue to aggressively drive growth of the premium memory market."

Samsung Electronics Co., Ltd., the world leader in advanced memory technology, today announced that it has developed a 3rd-generation 10-nanometer-class (1z-nm) eight-gigabit (Gb) Double Data Rate 4 (DDR4) DRAM for the first time in the industry. In just 16 months since it began mass producing the 2nd-generation 10nm-class (1y-nm) 8Gb DDR4, development of 1z-nm 8Gb DDR4 without the use of Extreme Ultra-Violet (EUV) processing has pushed the limits of DRAM scaling even further.

As 1z-nm becomes the industry's smallest memory process node, Samsung is now primed to respond to increasing market demands with its new DDR4 DRAM that has more than 20-percent higher manufacturing productivity compared to the previous 1y-nm version. Mass production of the 1z-nm 8Gb DDR4 will begin within the second half of this year to accommodate next-generation enterprise servers and high-end PCs expected to be launched in 2020.

JEDEC Solid State Technology Association, the global leader in standards development for the microelectronics industry, today announced the publication of JESD209-5, Low Power Double Data Rate 5 (LPDDR5). LPDDR5 will eventually operate at an I/O rate of 6400 MT/s, 50% higher than that of the first version of LPDDR4, which will significantly boost memory speed and efficiency for a variety of applications including mobile computing devices such as smartphones, tablets, and ultra-thin notebooks. In addition, LPDDR5 offers new features designed for mission critical applications such as automotive. Developed by JEDEC's JC-42.6 Subcommittee for Low Power Memories, LPDDR5 is available for download from the JEDEC website.

With the doubling of memory throughput over the previous version of the standard (LPDDR5 is being published with a data rate of 6400 MT/s, compared to 3200 MT/s for LPDDR4 at its publication in 2014), LPDDR5 promises to have an enormous impact on the performance and capabilities of the next generation of portable electronic devices. To achieve this performance improvement, LPDDR5 architecture was redesigned; moving to 16Banks programmable architecture and multi-clocking architecture.

Samsung Electronics, the world leader in advanced memory technology, today announced that it has successfully developed the industry's first 10-nanometer (nm) class* 8-gigabit (Gb) LPDDR5 DRAM. Since bringing the first 8Gb LPDDR4 to mass production in 2014, Samsung has been setting the stage to transition to the LPDDR5 standard for use in upcoming 5G and Artificial Intelligence (AI)-powered mobile applications.

The newly-developed 8Gb LPDDR5 is the latest addition to Samsung's premium DRAM lineup, which includes 10nm-class 16Gb GDDR6 DRAM (in volume production since December 2017) and 16Gb DDR5 DRAM (developed in February).