Micron Technology, Inc., today announced volume shipment of 1α (1-alpha) node DRAM products built using the world's most advanced DRAM process technology and offering major improvements in bit density, power and performance. This milestone reinforces Micron's competitive strength and complements its recent breakthroughs with the world's fastest graphics memory and the first-to-ship 176-layer NAND.

"This 1α node achievement confirms Micron's excellence in DRAM and is a direct result of Micron's relentless commitment to cutting-edge design and technology," said Scott DeBoer, executive vice president of technology and products at Micron. "With a 40% improvement in memory density over our previous 1z DRAM node, this advancement will create a solid foundation for future product and memory innovation."

Micron plans to integrate the 1α node across its DRAM product portfolio this year to support all environments that use DRAM today. The applications for this new DRAM technology are extensive and far reaching—enhancing performance in everything from mobile devices to smart vehicles.

SK hynix Inc. today announced financial results for its third quarter 2020 ended on September 30, 2020. The consolidated revenue of third quarter 2020 was 8.129 trillion won while the operating profit amounted to 1.3 trillion won, and the net income 1.078 trillion won. Operating margin for the quarter was 16% and net margin was 13%.

Despite the Company saw the recovery of mobile DRAM demand in the quarter, both the revenue and operating profit decreased by 6% and 33% quarter-over-quarter (QoQ) respectively, as the server DRAM and SSD demands weakened, and the overall semiconductor memory price flow turned downwards in the quarter. For DRAM, SK hynix proactively responded to rising demands of mobile and graphics DRAM, and the expansion of consumer electronics DRAM demand as well. As a result, in spite of decreased server DRAM demand, the Company's DRAM bit shipment in the quarter still increased by 4% QoQ. However, due to the unfavorable price of server DRAM and other certain DRAM products, the average selling price decreased by 7% QoQ.

Micron Technology, Inc., today announced the launch of uMCP5, the industry's first universal flash storage (UFS) multichip package with low-power DDR5 (LPDDR5) DRAM. Now ready for mass production, Micron's uMCP5 combines high-performance, high-density and low-power memory and storage in one compact package, equipping smartphones to handle data-intensive 5G workloads with dramatically increased speed and power efficiency. The multichip package uses Micron's LPDDR5 memory, high-reliability NAND and leading-edge UFS 3.1 controller to power advanced mobile features previously only seen in costly flagship devices using discrete products, such as stand-alone memory and storage. Now available on other high-end phones, these emerging technologies—such as image recognition, advanced artificial intelligence (AI), multicamera support, augmented reality (AR) and high-resolution displays—are becoming accessible to more consumers.

"Moving 5G's potential from hype to reality will require smartphones that can support the immense volumes of data flowing through the network and next-gen applications," said Raj Talluri, senior vice president and general manager of Micron's Mobile Business Unit. "Our uMCP5 combines the fastest memory and storage in a single package, unleashing new possibilities for 5G's disruptive, data-rich technologies right at consumers' fingertips."

Samsung Electronics, the world leader in advanced memory technology, today announced that its second production line in Pyeongtaek, Korea, has commenced mass production of the industry's first 16-gigabit (Gb) LPDDR5 mobile DRAM, using extreme ultraviolet (EUV) technology. Built on Samsung's third-generation 10 nm-class (1z) process, the new 16Gb LPDDR5 boasts the highest mobile memory performance and largest capacity to enable more consumers to enjoy the full benefits of 5G and AI features in next-generation smartphones.

"The 1z-based 16Gb LPDDR5 elevates the industry to a new threshold, overcoming a major developmental hurdle in DRAM scaling at advanced nodes," said Jung-bae Lee, executive vice president of DRAM Product & Technology at Samsung Electronics. "We will continue to expand our premium DRAM lineup and exceed customer demands, as we lead in growing the overall memory market."

A May 2020 report put together with info from multiple sources pointed towards AMD's client-segment product roadmap going as far into the future as 2022. The roadmap was partial, with a few missing bits. VideoCardz attempted to reconstruct the roadmap based on new information from one of the primary sources of the May leak, @MeibuW. According to the roadmap, 2020 will see AMD debut its 4th Gen Ryzen "Vermeer" desktop processors featuring "Zen 3" CPU cores, built on TSMC N7e or N7P silicon fabrication process, and offering PCIe Gen 4. The "Renoir" APU silicon combining up to 8 "Zen 2" CPU cores with a 512-SP "Vega" iGPU debuted on the mobile platform, and recently launched on the desktop platform as an OEM-exclusive. It remains to be seen if AMD launches this in the DIY retail channel.

2021 is when three new codenames from AMD get some air-time. "Warhol" is codename for the 5th Gen Ryzen part that succeeds "Vermeer." Interestingly, it too is shown as a combination of "Zen 3" CPU cores, PCIe Gen 4, and 7 nm. Perhaps AMD could innovate in areas such as DRAM (switch to PC DDR5), and maybe increase core counts. DDR5 could herald a new socket, after 4 years of AM4. The second silicon bound for 2021 is "Van Gogh," an APU that combines "Zen 2" CPU cores with an RDNA2 iGPU. Interestingly, "Cezanne," bound for the same year, has the opposite CPU+iGPU combination - a newer gen "Zen 3" CPU component, and an older gen "Vega" iGPU. The two chips could target different markets, looking at their I/O, with "Van Gogh" supporting LPDDR5 memory.

A lot is riding for Intel on its 11th Gen Core "Tiger Lake" system-on-chip (SoC), which will launch exclusively on mobile platforms, hoping to dominate the 7 W thru 15 W ultraportable form-factors in 2020, while eventually scaling up to the 25 W thru 45 W H-segment form-factors in 2021, with a variant that is rumored to double core-counts. The chip is built on Intel's new 10 nm SuperFin silicon fabrication node that enables a double digit percentage energy efficiency growth over 10 nm, allowing Intel to significantly dial up clock speeds without impacting the power envelope. The CPU and iGPU make up the two key components of the "Tiger Lake" SoC.

The CPU component on the "Tiger Lake" processors that launch in a few weeks from now features four "Willow Cove" CPU cores. Coupled with HyperThreading, this ends up being a 4-core/8-thread setup, although much of Intel's innovation is in giving these cores significant IPC increases over the "Skylake" core powering "Comet Lake" processors, and compared to the "Sunny Cove" cores powering "Ice Lake" a minor IPC (although major net performance increase from clock speeds). The "Willow Cove" CPU core appears to be a derivative of the "Sunny Cove" core, designed to take advantage of the 10 nm SuperFin node, along with three key innovations.

SK hynix Inc. today announced financial results for its second quarter 2020 ended on June 30, 2020. The consolidated revenue of second quarter 2020 was 8.607 trillion won while the operating profit amounted to 1.947 trillion won, and the net income 1.264 trillion won. Operating margin for the quarter was 23% and net margin was 15%.

Despite uncertainties of business environment due to COVID-19, both the Company's revenue and operating income increased by 20% and 143% quarter-over-quarter (QoQ) respectively, as the surging demand for server memory maintained favorable memory price while numerous factors including the increase of the main products' yield rate led to cost reduction.

AMD is expected to support the next-generation DDR5 memory standard by 2022, according to a MyDrivers report citing industry sources. We are close to a change in memory standards, with the 5-year old DDR4 memory standard beginning a gradual phase out over the next 3 years. Leading DRAM manufacturers such as SK Hynix have already hinted mass-production of the next-generation DDR5 memory to commence within 2020. Much like with DDR4, Intel could be the first to market with processors that support it, likely with its "Sapphire Rapids" Xeon processors. AMD, on the other hand, could debut support for the standard only with its "Zen 4" microarchitecture slated for 2021 technology announcements, with 2022 availability.

AMD "Zen 4" will see a transition to a new silicon fabrication process, likely TSMC 5 nm-class. It will be an inflection point for the company from an I/O standpoint, as it sees the introduction of DDR5 memory support across enterprise and desktop platforms, LPDDR5 on the mobile platform, and PCI-Express gen 5.0 across the board. Besides a generational bandwidth doubling, PCIe gen 5.0 is expected to introduce several industry-standard features that help with hyper-scalability in the enterprise segment, benefiting compute clusters with multiple scalar processors, such as AMD's CDNA2. Intel introduced many of these features with its proprietary CXL interconnect. AMD's upcoming "Zen 3" microarchitecture, scheduled for within 2020 with market presence in 2021, is expected to stick with DDR4, LPDDR4x, and PCI-Express gen 4.0 standards. DDR5 will enable data-rates ranging between 3200 to 8400 MHz, densities such as single-rank 32 GB UDIMMs, and a few new physical-layer features such as same-bank refresh.

Micron Technology, Inc., together with Motorola, today announced integration of Micron's low-power DDR5 (LPDDR5) DRAM into Motorola's new motorola edge+ smartphone, bringing the full potential of the 5G experience to consumers. Micron and Motorola worked in close collaboration to enable the edge+ to reach 5G network speeds that require maximum processing power coupled with high bandwidth memory and storage.

With 12 gigabytes (GB) of industry-leading Micron LPDDR5 DRAM memory, motorola edge+ delivers a smooth, lag-free consumer experience. The new phone takes advantage of the faster data speeds and lower latency of 5G to increase the performance of cloud-based applications such as gaming and streaming entertainment.

Micron Technology, Inc., today announced it began sampling the industry's first universal flash storage (UFS) multichip package (uMCP) with low-power DDR5 (LPDDR5) DRAM. The uMCP provides high-density and low-power storage designed to fit on slim and compact midrange smartphone designs.

Micron's new uMCP5 packaging builds on the company's innovation and leadership in multichip form factors. Micron uMCPs combine low-power DRAM with NAND and an onboard controller, using 40% less space compared to a two-chip solution. This optimized configuration saves power, reduces memory footprint and enables smaller and more agile smartphone designs.

Samsung Electronics, a world leader in advanced memory technology, today announced that it has begun mass producing the industry's first 16-gigabyte (GB) LPDDR5 mobile DRAM package for next-generation premium smartphones. Following mass production of the industry-first 12 GB LPDDR5 in July, 2019, the new 16 GB advancement will lead the premium mobile memory market with added capacity that enables enhanced 5G and AI features including graphic-rich gaming and smart photography.

"Samsung has been committed to bringing memory technologies to the cutting edge in allowing consumers to enjoy amazing experiences through their mobile devices. We are excited to stay true to that commitment with our new, top-of-the-line mobile solution for global device manufacturers," said Cheol Choi, senior vice president of memory sales & marketing, Samsung Electronics. "With the introduction of a new product lineup based on our next-generation process technology later this year, Samsung will be able to fully address future memory demands from global customers."

Micron Technology, Inc., today announced it has shipped the world's first low-power DDR5 DRAM in mass production to be used in the soon-to-be-released Xiaomi Mi 10 smartphone. As Xiaomi's memory technology partner, Micron provides LPDDR5 DRAM with superior power efficiency and faster data access speeds to meet growing consumer demand for artificial intelligence (AI) and 5G functionality in smartphones.

"Micron's leadership in delivering the industry's first low-power DDR5 DRAM for use in a smartphone will accelerate enablement of 5G and AI applications," said Dr. Raj Talluri, senior vice president and general manager of the Mobile Business Unit at Micron. "Our customers and partners require next-generation memory solutions, based on the latest process technology, that drive unmatched power and performance to support 5G and AI systems. Micron's LPDDR5 DRAM addresses those requirements with a 50% increase in data access speeds and more than 20% power efficiency compared to previous generations."

"We value Micron's long-standing leadership and innovation in memory," said Chang Cheng, vice president at Xiaomi Group. "Micron's LPDDR5 DRAM market-leading features ensure our Xiaomi Mi 10 smartphone will remain power-efficient while still offering incredible performance and greater stability. We believe LPDDR5 will be the standard configuration for all flagship devices in 2020."

Korean DRAM and NAND flash giant SK Hynix brought its latest memory innovations to the 2020 International CES. The star attraction at their booth was the "4D NAND" technology, and some of the first client-segment SSDs based on it. As a concept, 4D NAND surfaced way back in August 2018, and no, it doesn't involve the 4th dimension. Traditional 3D NAND chips use charge-trap flash (CTF) stacks spatially located next to a peripheral block that's responsible for wiring out all of those CTF stacks. In 4D NAND, the peripheral block is stacked along with the CTF stack itself, conserving real-estate on the 2-D plane (which can then be spent on increasing density). We caught two 128-layer 4D NAND-based client-segment drives inbound for 2020, the Platinum P31 M.2 NVMe, and Gold P31 M.2 NVMe. The already launched Gold S31 SATA drive was also there.

SK hynix Inc. presents its innovative semiconductor technologies leading the 4th Industrial Revolution at CES 2020, the world's largest trade show for IT and consumer electronics in Las Vegas, USA, from January 7-10, 2020. In line with its "Memory Centric World" theme, SK hynix depicts a futuristic city which effectively utilizes enormous amounts of data. The Company also showcases its semiconductor solutions across six crucial business fields - artificial intelligence (AI), augmented reality (AR) / virtual reality (VR), automotive, Internet of Things (IoT), big data and 5G.

Headlining at CES 2020 are SK hynix's memory solutions including HBM2E, DDR5 for servers, and SSD, which are already highly regarded and widely used in 4th industrial fields such as 5G and AI for their stability, speed, power consumption and density excellence. Other cutting-edge products set to make headlines in January are the Company's highly durable LPDDR4X and eMMC 5.1, which are optimized for automobiles. What's more, SK hynix is displaying its LPDDR5 and UFS that enhance the performance of 5G smartphones as well as CIS (CMOS Image Sensor) which is essential in establishing effective environments for AR/VR and IoT.

Intel's Core "Tiger Lake" microarchitecture could be a point of transition between DDR4 and DDR5 for the company. Prototypes of devices based on the ultra-compact "Tiger Lake-Y" SoC were earlier shown featuring LPDDR4X memory, although a new device, possibly a prototyping platform, in the regulatory queue with the Eurasian Economic Commission describes itself as featuring a "Tiger Lake-U" chip meant for thin and light notebooks and convertibles. This device features newer LPDDR5 memory, according to its regulatory filing.

LPDDR5 succeeds LPDDR4X as the industry's next low-power memory standard, offering data-rates of up to 6,400 MT/s (versus up to 4,266 MT/s of LPDDR4X), and consumes up to 30 percent less power. This prototype at the EEC is sure to be using unreleased LPDDR5 memory chips as DRAM majors Samsung and SK Hynix plan to ship their DDR5-based memory solutions only by the end of this year, although mass-production of the chips have already started at Samsung, in PoP form-factors. A successor to the 10th generation Core "Ice Lake," "Tiger Lake" will be Intel's second CPU microarchitecture designed for its 10 nm silicon fabrication node.

SK hynix Inc. today announced financial results for its third quarter 2019 ended on September 30, 2019. The consolidated third quarter revenue was 6.84 trillion won while the operating profit amounted to 473 billion won and the net income 495 billion won. Operating margin and net margin for the quarter was 7%.

The revenue in the third quarter increased by 6% quarter-over-quarter (QoQ) as demand began to pick up. However, the operating profit fell by 26% QoQ as DRAM unit cost reduction was not enough to offset the price drop. DRAM bit shipments increased by 23% QoQ as the Company actively responded to the new products in the mobile market and purchases from some data center customers also increased. DRAM prices remained weak during the quarter, leading to a 16% drop in the average selling price, with the decline smaller than the previous quarter.

Samsung Electronics, the world leader in advanced memory technology, today announced that it has begun mass producing the industry's first 12-gigabit ( Gb) LPDDR5 mobile DRAM, which has been optimized for enabling 5G and AI features in future smartphones. The new mobile memory comes just five months after announcing mass production of the 12 GB LPDDR4X, further reinforcing the company's premium memory lineup. Samsung also plans to start mass producing 12-gigabyte (GB) LPDDR5 packages later this month, each combining eight of the 12 Gb chips, in line with growing demand for higher smartphone performance and capacity from premium smartphone manufacturers.

"With mass production of the 12 Gb LPDDR5 built on Samsung's latest second-generation 10-nanometer (nm) class process, we are thrilled to be supporting the timely launch of 5G flagship smartphones for our customers worldwide," said Jung-bae Lee, executive vice president of DRAM Product & Technology, Samsung Electronics. "Samsung remains committed to rapidly introducing next-generation mobile memory technologies that deliver greater performance and higher capacity, as we continue to aggressively drive growth of the premium memory market."

Samsung Electronics Co., Ltd., the world leader in advanced memory technology, today announced that it has developed a 3rd-generation 10-nanometer-class (1z-nm) eight-gigabit (Gb) Double Data Rate 4 (DDR4) DRAM for the first time in the industry. In just 16 months since it began mass producing the 2nd-generation 10nm-class (1y-nm) 8Gb DDR4, development of 1z-nm 8Gb DDR4 without the use of Extreme Ultra-Violet (EUV) processing has pushed the limits of DRAM scaling even further.

As 1z-nm becomes the industry's smallest memory process node, Samsung is now primed to respond to increasing market demands with its new DDR4 DRAM that has more than 20-percent higher manufacturing productivity compared to the previous 1y-nm version. Mass production of the 1z-nm 8Gb DDR4 will begin within the second half of this year to accommodate next-generation enterprise servers and high-end PCs expected to be launched in 2020.

JEDEC Solid State Technology Association, the global leader in standards development for the microelectronics industry, today announced the publication of JESD209-5, Low Power Double Data Rate 5 (LPDDR5). LPDDR5 will eventually operate at an I/O rate of 6400 MT/s, 50% higher than that of the first version of LPDDR4, which will significantly boost memory speed and efficiency for a variety of applications including mobile computing devices such as smartphones, tablets, and ultra-thin notebooks. In addition, LPDDR5 offers new features designed for mission critical applications such as automotive. Developed by JEDEC's JC-42.6 Subcommittee for Low Power Memories, LPDDR5 is available for download from the JEDEC website.

With the doubling of memory throughput over the previous version of the standard (LPDDR5 is being published with a data rate of 6400 MT/s, compared to 3200 MT/s for LPDDR4 at its publication in 2014), LPDDR5 promises to have an enormous impact on the performance and capabilities of the next generation of portable electronic devices. To achieve this performance improvement, LPDDR5 architecture was redesigned; moving to 16Banks programmable architecture and multi-clocking architecture.

Samsung Electronics, the world leader in advanced memory technology, today announced that it has successfully developed the industry's first 10-nanometer (nm) class* 8-gigabit (Gb) LPDDR5 DRAM. Since bringing the first 8Gb LPDDR4 to mass production in 2014, Samsung has been setting the stage to transition to the LPDDR5 standard for use in upcoming 5G and Artificial Intelligence (AI)-powered mobile applications.

The newly-developed 8Gb LPDDR5 is the latest addition to Samsung's premium DRAM lineup, which includes 10nm-class 16Gb GDDR6 DRAM (in volume production since December 2017) and 16Gb DDR5 DRAM (developed in February).