AMD is planning to crash Intel's big 12th Gen Core "Alder Lake-P" mobile processor launch with its own next-gen launch, the Ryzen 6000 mobile processor series. These chips are the company's first built on the TSMC N6 (6 nm) silicon fabrication process, and combine up to 8 "Zen 3+" CPU cores, with a next-generation iGPU based on the RDNA2 graphics architecture. The company has given the Media CoreNext and Video CoreNext engines incremental updates, according to a leaked slide scored by VideoCardz.

Ryzen 6000 "Rembrandt" processors come with hardware-accelerated decode of the AV1 video format. The Display CoreNext (display I/O engine) now supports DisplayPort 2.0, complete with DSC, UHBR10, HDR10+, and variable refresh-rate. The HDR pipeline has awareness for the various display panel types, including OLED and mini-LED. The iGPU on "Rembrandt" features up to 12 compute units (768 stream processors). It remains to be seen if Ray Accelerators are featured, as that would make this the first iGPU (on the PC platform) with DirectX 12 Ultimate support.

China's technology reliance on 3rd party companies seems to be getting smaller. One of the leading technology companies in China, Huawei, has designed a laptop powered by a custom 5 nm Kirin SoC with DDR5 memory. Called the Dyna Cloud L420, Huawei has prepared this model for the Chinese market to provide a fully functional laptop that will get the job done, with no risk of the potential security backdoors implemented in the processor. Powered by a brand new Kirin 9006C SoC manufactured on TSMC's 5 nm process, it features eight unknown cores running at 3.1 GHz frequency. We assume that those are custom cores designed by Huawei. This SoC is accompanied by 8 GB of LPDDR5 memory, with 256 GB and 512 GB UFS 3.1 configurations storage options.

When it comes to the rest of the laptop, it rocks a 14-inch 2160x1440 display. I/O options are solid as well, as this machine has an HDMI video output, two USB-A, one USB-C, and Gigabit Ethernet using a mini-RJ45 port. Connectivity is provided by Wi-Fi 6 and Bluetooth 4.2. There is a 56 W/h battery that provides the juice to keep it running when it comes to the battery. And to complete all of that, this laptop officially only supports Huawei's proprietary Kirin OS (KOS) and Unity OS (UOS), with expected support for HarmonyOS in the future. Pricing and availability information is a mistery at the present date.

During Samsung's Tech Day 2021, the company presented some interesting insights about the future of system memory technologies and how it plans to execute its production. Starting with the latest DDR5 standard, the company intends to follow JEDEC documents and offer some overclocking modules that surpass the specification advised by JEDEC. While the DDR5 standard specifies memory modules with 6,400 MT/s, Samsung will develop modules capable of overclocking up to 8,400 MT/s. These are not yet confirmed as they are still in the development phase. However, we can expect to see them in the later life of DDR5 memory.

The company also talked about the DDR6 standard, which is supposedly twice as fast as DDR5. The new DDR6 standard is still in early development, and all we know so far is that the number of memory channels per module is seeing a twofold increase over DDR5 to four channels. The number of memory banks also increases to 64. In addition to DDR6 for desktop and server use cases, the company is also working on Low Power DDR6 (LPDDR6) for mobile applications. While the company's LPDDR5 memory goes into volume production using the 1a-nm process at the beginning of 2022, the LPDDR6 is still in early development. The base speed for DDR6 modules will allegedly arrive at 12,800 MT/s, while overclocking modules will join the party at up to 17,000 MT/s. Mobile-oriented LPDDR6 version is also supposed to come with up to 17,000 MT/s speeds.

SK hynix announced that it has received an ISO 26262: 2018 FSM (Functional Safety Management) certification, the international standard for functional safety in automotive semiconductors. The global automotive functional safety certification institute, TUV Nord, conducted the assessment. Both companies commemorated the distinction by hosting an online ceremony. In attendance at the ceremony were Daeyong Shim, Head of Automotive Business, and Junho Song, Head of Quality System, from SK hynix and Bianca Pfuff, Profit Center Manager Functional Safety and Deputy Head of Certification Body SEECERT, and Josef Neumann, Senior Project Manager Functional Safety, from TUV Nord.

The ISO 26262 is the international standard for automobile functional safety established by the International Organization for Standardization (ISO) in 2011 to prevent accidents caused by automotive electrical and electronic systems failures. This certification awarded to SK hynix, ISO 26262: 2018, is the latest version with additional requirements for automotive semiconductors. In the automotive industry, safety, quality, and reliability are paramount. Therefore, it is becoming essential that producers of car electronic device related to safety meet ISO 26262 standards.

Synopsys, Inc. today announced the industry's first complete HBM3 IP solution, including controller, PHY, and verification IP for 2.5D multi-die package systems. HBM3 technology helps designers meet essential high-bandwidth and low-power memory requirements for system-on-chip (SoC) designs targeting high-performance computing, AI and graphics applications. Synopsys' DesignWare HBM3 Controller and PHY IP, built on silicon-proven HBM2E IP, leverage Synopsys' interposer expertise to provide a low-risk solution that enables high memory bandwidth at up to 921 GB/s.

The Synopsys verification solution, including Verification IP with built-in coverage and verification plans, off-the-shelf HBM3 memory models for ZeBu emulation, and HAPS prototyping system, accelerates verification from HBM3 IP to SoCs. To accelerate development of HBM3 system designs, Synopsys' 3DIC Compiler multi-die design platform provides a fully integrated architectural exploration, implementation and system-level analysis solution.

Intel is expected to announce their desktop Alder Lake processors later this month on October 28th and it would appear that laptop processors could enter production as early as November. These revelations come from a leaked roadmap published by Wccftech that lists the Alder Lake-P and Alder Lake-M processor families for launch in Q4 2021 and Q1 2022 respectively. The production window for Alder Lake-P opens November 8th and closes March 13th while for Alder Lake-M that period is from January 17th to April 17th.

The roadmap lists Alder Lake-P processors as featuring a TDP between 12 W to 45 W and Alder Lake-M covering 7 W to 15 W. The two platforms will both feature up to 96 Xe graphics Execution units along with Thunderbolt 4 and WiFi 6E connectivity. Alder Lake-P will include PCIe 5.0 and DDR5 support with no mention of DDR4 compatibility while Alder Lake-M will get PCIe 4.0 and LPDDR4X/LPDDR5. The mobile lineup is divided into 3 groups of which the flagship H55 was not mentioned in the roadmap indicating a post Q1 2022 release.

Samsung Electronics the world leader in advanced memory technology, today showcased its latest advancements with processing-in-memory (PIM) technology at Hot Chips 33—a leading semiconductor conference where the most notable microprocessor and IC innovations are unveiled each year. Samsung's revelations include the first successful integration of its PIM-enabled High Bandwidth Memory (HBM-PIM) into a commercialized accelerator system, and broadened PIM applications to embrace DRAM modules and mobile memory, in accelerating the move toward the convergence of memory and logic.

In February, Samsung introduced the industry's first HBM-PIM (Aquabolt-XL), which incorporates the AI processing function into Samsung's HBM2 Aquabolt, to enhance high-speed data processing in supercomputers and AI applications. The HBM-PIM has since been tested in the Xilinx Virtex Ultrascale+ (Alveo) AI accelerator, where it delivered an almost 2.5X system performance gain as well as more than a 60% cut in energy consumption.

MediaTek today announced the new Dimensity 920 and Dimensity 810 chipsets, the latest additions to its Dimensity 5G family. This debut gives smartphone makers the ability to provide boosted performance, brilliant imaging and smarter displays to their customers.

Designed for powerful 5G smartphones, the Dimensity 920 balances performance, power and cost to provide an incredible mobile experience. Built using the 6nm high-performance manufacturing node, it supports intelligent displays and hardware-based 4K HDR video capture, while also offering a 9% boost in gaming performance compared to its predecessor, the Dimensity 900.

JEDEC Solid State Technology Association, the global leader in standards development for the microelectronics industry, today announced the publication of JESD209-5B, Low Power Double Data Rate 5 (LPDDR5). JESD209-5B includes both an update to the LPDDR5 standard that is focused on improving performance, power and flexibility, and a new LPDDR5X standard, which is an optional extension to LPDDR5.

Taken together, LPDDR5 and LPDDR5X are designed to significantly boost memory speed and efficiency for a variety of uses including mobile devices, such as 5G smartphones and artificial intelligence (AI) applications. Developed by JEDEC's JC-42.6 Subcommittee for Low Power Memories, JESD209-5B is available for download from the JEDEC website.

Valve today announced its first big splash into the console market with Steam Deck, a device out to eat the Nintendo Switch's lunch. The announcement comes as yet another feather in AMD's cap for its semi-custom SoC business, benefiting from being the only company with an x86-64 CPU license and having a cutting-edge graphics hardware IP. Built on the 7 nm node at TSMC, the semi-custom chip at the heart of the Steam Deck is designed for extended gameplay on battery, and is a monolithic silicon that combines CPU, GPU, and core-logic.

The yet-unnamed semi-custom chip features a 4-core/8-thread CPU based on the "Zen 2" microarchitecture, with a nominal clock speed of 2.40 GHz, and up to 3.50 GHz boost. The CPU component offers an FP32 throughput of 448 GFLOP/s. The GPU is based on AMD's latest RDNA2 graphics architecture—the same one powering the Xbox Series X, PlayStation 5, and Radeon RX 6900 XT—and is comprised of 8 RDNA2 compute units (512 stream processors). The GPU operates at an engine clock speed of 1.10 GHz to 1.60 GHz, with peak compute power of 1.6 TFLOP/s. The silicon uses a unified memory interface, and a cutting-edge LPDDR5 memory controller.

A next-generation Microsoft Surface Pro X with Windows 11 was shown running a Microsoft-branded processor that's expected to be a design collaboration between the company and Qualcomm, in a bid to develop a high performance/Watt solution rivaling the Apple M1. Microsoft's contribution to this is the x86-64 emulation heavily integrated into Windows 11, letting you run native x86-64 apps seamlessly, with the OS handling the hardware abstraction much like WOW64.

Called the Microsoft SQ2, the silicon features an 8-core/8-thread CPU, and an iGPU that meets the minimum requirements of Windows 11 for its standard UI, with just enough power for web-browsing with high-res videos. The CPU runs at speeds of up to 3.15 GHz, and has a fairly advanced memory system that includes a 3-level cache and LPDDR5 memory.

Samsung Electronics Co., Ltd., the world leader in advanced memory technology, today announced that it has begun mass producing its latest smartphone memory solution, the LPDDR5 UFS-based multichip package (uMCP). Samsung's uMCP integrates the fastest LPDDR5 DRAM with the latest UFS 3.1 NAND flash, delivering flagship-level performance to a much broader range of smartphone users.

"Samsung's new LPDDR5 uMCP is built upon our rich legacy of memory advancements and packaging know-how, enabling consumers to enjoy uninterrupted streaming, gaming and mixed reality experiences even in lower-tier devices," said Young-soo Sohn, vice president of the Memory Product Planning Team at Samsung Electronics. "As 5G-compatible devices become more mainstream, we anticipate that our latest multichip package innovation will accelerate the market transition to 5G and beyond, and help to bring the metaverse into our everyday lives a lot faster."

MediaTek today announced the new Dimensity 900 5G chipset, the latest addition to its Dimensity 5G family. The Dimensity 900 chipset, built on the 6nm high-performance manufacturing node, supports Wi-Fi 6 connectivity, ultra-fast FHD+ 120Hz displays and a 108MP main camera for an all-around incredible experience. "Dimensity 900 brings a suite of connectivity, display and 4K HDR visual enhancements to high-tier 5G smartphones and gives brands great design flexibility for their 5G portfolios," said Dr. JC Hsu, Corporate VP and GM of MediaTek's Wireless Communications Business Unit. "The chipset's support for 5G and Wi-Fi 6 ensures users get the most of out their devices with super-fast and reliable connectivity."

The Dimensity 900 chipset is integrated with a 5G New Radio (NR) sub-6GHz modem with carrier aggregation and support for bandwidth up to 120 MHz. The chipset is equipped with an 8-core central processing unit (CPU) consisting of two Arm Cortex-A78 processors with a clock speed of up to 2.4 GHz and six Arm Cortex-A55 cores operating at up to 2.00 GHz. Dimensity 900 supports flagship LPDDR5 memory and UFS 3.1 storage, and can adapt to a 120 Hz screen refresh rate, bringing excellent performance improvements and a seamless experience to 5G mobile devices.

NVIDIA today announced its first data center CPU, an Arm-based processor that will deliver 10x the performance of today's fastest servers on the most complex AI and high performance computing workloads.

The result of more than 10,000 engineering years of work, the NVIDIA Grace CPU is designed to address the computing requirements for the world's most advanced applications—including natural language processing, recommender systems and AI supercomputing—that analyze enormous datasets requiring both ultra-fast compute performance and massive memory. It combines energy-efficient Arm CPU cores with an innovative low-power memory subsystem to deliver high performance with great efficiency.

SK hynix Inc announced that it has started mass-production of 18 GB (gigabyte) LPDDR5 mobile DRAM, which offers the largest capacity in the industry. This product will be equipped in premium smartphones to support an optimal environment for games with high resolution image and also high quality videos. SK hynix also expects that application will continue expanding to include the latest technologies, including ultra-high-performance camera applications and artificial intelligence (AI).

"This product will improve the processing speed and image quality by expanding the data temporary storage space, as the capacity increases compared to the previous 16 GB product," an official from the company said. The new product runs at up to 6,400 Mbps (megabits-per-second), around 20% faster than the mobile DRAM (LPDDR5 with 5,500 Mbps) for existing smartphones, a data rate that is capable of transferring ten 5 GB FHD (Full-HD) movies per second.

Micron Technology, Inc. today announced that it has begun sampling the industry's first automotive low-power DDR5 DRAM (LPDDR5) memory that is hardware-evaluated to meet the most stringent Automotive Safety Integrity Level (ASIL), ASIL D. The solution is part of Micron's new portfolio of memory and storage products targeted for automotive functional safety based on the International Organization for Standardization (ISO) 26262 standard.

Micron's functional safety-evaluated DRAM is compatible with advanced-driver assistance system (ADAS) technologies, including adaptive cruise control, automatic emergency braking systems, lane departure warning and blind spot detection systems. Micron's LPDDR5's high performance, superior power efficiency and low latency provide the requisite performance and headroom to keep pace with increasing bandwidth requirements of next-generation automotive systems.

"Autonomous vehicles promise to make our roads safer, but they need powerful, trusted memory that can enable real-time decision-making in extreme environments," said Kris Baxter, corporate vice president and general manager of Micron's Embedded Business Unit. "To fulfill this growing market need, we've optimized our automotive LPDDR5 to deliver the utmost performance, quality and reliability for the smart, safe cars of tomorrow."

Driven by such factors as the continued development of autonomous driving technologies and the build-out of 5G infrastructure, the demand for automotive memories will undergo a rapid growth going forward, according to TrendForce's latest investigations. Take Tesla, which is the automotive industry leader in the application of autonomous vehicle technologies, as an example. Tesla has adopted GDDR5 DRAM products from the Model S and X onward because it has also adopted Nvidia's solutions for CPU and GPU. The GDDR5 series had the highest bandwidth at the time to complement these processors. The DRAM content has therefore reached at least 8 GB for vehicles across all model series under Tesla. The Model 3 is further equipped with 14 GB of DRAM, and the next-generation of Tesla vehicles will have 20 GB. If content per box is used as a reference for comparison, then Tesla far surpasses manufacturers of PCs and smartphones in DRAM consumption. TrendForce forecasts that the average DRAM content of cars will continue to grow in the next three years, with a CAGR of more than 30% for the period.

Micron Technology, Inc., today announced volume shipment of 1α (1-alpha) node DRAM products built using the world's most advanced DRAM process technology and offering major improvements in bit density, power and performance. This milestone reinforces Micron's competitive strength and complements its recent breakthroughs with the world's fastest graphics memory and the first-to-ship 176-layer NAND.

"This 1α node achievement confirms Micron's excellence in DRAM and is a direct result of Micron's relentless commitment to cutting-edge design and technology," said Scott DeBoer, executive vice president of technology and products at Micron. "With a 40% improvement in memory density over our previous 1z DRAM node, this advancement will create a solid foundation for future product and memory innovation."

Micron plans to integrate the 1α node across its DRAM product portfolio this year to support all environments that use DRAM today. The applications for this new DRAM technology are extensive and far reaching—enhancing performance in everything from mobile devices to smart vehicles.

SK hynix Inc. today announced financial results for its third quarter 2020 ended on September 30, 2020. The consolidated revenue of third quarter 2020 was 8.129 trillion won while the operating profit amounted to 1.3 trillion won, and the net income 1.078 trillion won. Operating margin for the quarter was 16% and net margin was 13%.

Despite the Company saw the recovery of mobile DRAM demand in the quarter, both the revenue and operating profit decreased by 6% and 33% quarter-over-quarter (QoQ) respectively, as the server DRAM and SSD demands weakened, and the overall semiconductor memory price flow turned downwards in the quarter. For DRAM, SK hynix proactively responded to rising demands of mobile and graphics DRAM, and the expansion of consumer electronics DRAM demand as well. As a result, in spite of decreased server DRAM demand, the Company's DRAM bit shipment in the quarter still increased by 4% QoQ. However, due to the unfavorable price of server DRAM and other certain DRAM products, the average selling price decreased by 7% QoQ.

Micron Technology, Inc., today announced the launch of uMCP5, the industry's first universal flash storage (UFS) multichip package with low-power DDR5 (LPDDR5) DRAM. Now ready for mass production, Micron's uMCP5 combines high-performance, high-density and low-power memory and storage in one compact package, equipping smartphones to handle data-intensive 5G workloads with dramatically increased speed and power efficiency. The multichip package uses Micron's LPDDR5 memory, high-reliability NAND and leading-edge UFS 3.1 controller to power advanced mobile features previously only seen in costly flagship devices using discrete products, such as stand-alone memory and storage. Now available on other high-end phones, these emerging technologies—such as image recognition, advanced artificial intelligence (AI), multicamera support, augmented reality (AR) and high-resolution displays—are becoming accessible to more consumers.

"Moving 5G's potential from hype to reality will require smartphones that can support the immense volumes of data flowing through the network and next-gen applications," said Raj Talluri, senior vice president and general manager of Micron's Mobile Business Unit. "Our uMCP5 combines the fastest memory and storage in a single package, unleashing new possibilities for 5G's disruptive, data-rich technologies right at consumers' fingertips."

Samsung Electronics, the world leader in advanced memory technology, today announced that its second production line in Pyeongtaek, Korea, has commenced mass production of the industry's first 16-gigabit (Gb) LPDDR5 mobile DRAM, using extreme ultraviolet (EUV) technology. Built on Samsung's third-generation 10 nm-class (1z) process, the new 16Gb LPDDR5 boasts the highest mobile memory performance and largest capacity to enable more consumers to enjoy the full benefits of 5G and AI features in next-generation smartphones.

"The 1z-based 16Gb LPDDR5 elevates the industry to a new threshold, overcoming a major developmental hurdle in DRAM scaling at advanced nodes," said Jung-bae Lee, executive vice president of DRAM Product & Technology at Samsung Electronics. "We will continue to expand our premium DRAM lineup and exceed customer demands, as we lead in growing the overall memory market."

A May 2020 report put together with info from multiple sources pointed towards AMD's client-segment product roadmap going as far into the future as 2022. The roadmap was partial, with a few missing bits. VideoCardz attempted to reconstruct the roadmap based on new information from one of the primary sources of the May leak, @MeibuW. According to the roadmap, 2020 will see AMD debut its 4th Gen Ryzen "Vermeer" desktop processors featuring "Zen 3" CPU cores, built on TSMC N7e or N7P silicon fabrication process, and offering PCIe Gen 4. The "Renoir" APU silicon combining up to 8 "Zen 2" CPU cores with a 512-SP "Vega" iGPU debuted on the mobile platform, and recently launched on the desktop platform as an OEM-exclusive. It remains to be seen if AMD launches this in the DIY retail channel.

2021 is when three new codenames from AMD get some air-time. "Warhol" is codename for the 5th Gen Ryzen part that succeeds "Vermeer." Interestingly, it too is shown as a combination of "Zen 3" CPU cores, PCIe Gen 4, and 7 nm. Perhaps AMD could innovate in areas such as DRAM (switch to PC DDR5), and maybe increase core counts. DDR5 could herald a new socket, after 4 years of AM4. The second silicon bound for 2021 is "Van Gogh," an APU that combines "Zen 2" CPU cores with an RDNA2 iGPU. Interestingly, "Cezanne," bound for the same year, has the opposite CPU+iGPU combination - a newer gen "Zen 3" CPU component, and an older gen "Vega" iGPU. The two chips could target different markets, looking at their I/O, with "Van Gogh" supporting LPDDR5 memory.

A lot is riding for Intel on its 11th Gen Core "Tiger Lake" system-on-chip (SoC), which will launch exclusively on mobile platforms, hoping to dominate the 7 W thru 15 W ultraportable form-factors in 2020, while eventually scaling up to the 25 W thru 45 W H-segment form-factors in 2021, with a variant that is rumored to double core-counts. The chip is built on Intel's new 10 nm SuperFin silicon fabrication node that enables a double digit percentage energy efficiency growth over 10 nm, allowing Intel to significantly dial up clock speeds without impacting the power envelope. The CPU and iGPU make up the two key components of the "Tiger Lake" SoC.

The CPU component on the "Tiger Lake" processors that launch in a few weeks from now features four "Willow Cove" CPU cores. Coupled with HyperThreading, this ends up being a 4-core/8-thread setup, although much of Intel's innovation is in giving these cores significant IPC increases over the "Skylake" core powering "Comet Lake" processors, and compared to the "Sunny Cove" cores powering "Ice Lake" a minor IPC (although major net performance increase from clock speeds). The "Willow Cove" CPU core appears to be a derivative of the "Sunny Cove" core, designed to take advantage of the 10 nm SuperFin node, along with three key innovations.

SK hynix Inc. today announced financial results for its second quarter 2020 ended on June 30, 2020. The consolidated revenue of second quarter 2020 was 8.607 trillion won while the operating profit amounted to 1.947 trillion won, and the net income 1.264 trillion won. Operating margin for the quarter was 23% and net margin was 15%.

Despite uncertainties of business environment due to COVID-19, both the Company's revenue and operating income increased by 20% and 143% quarter-over-quarter (QoQ) respectively, as the surging demand for server memory maintained favorable memory price while numerous factors including the increase of the main products' yield rate led to cost reduction.

AMD is expected to support the next-generation DDR5 memory standard by 2022, according to a MyDrivers report citing industry sources. We are close to a change in memory standards, with the 5-year old DDR4 memory standard beginning a gradual phase out over the next 3 years. Leading DRAM manufacturers such as SK Hynix have already hinted mass-production of the next-generation DDR5 memory to commence within 2020. Much like with DDR4, Intel could be the first to market with processors that support it, likely with its "Sapphire Rapids" Xeon processors. AMD, on the other hand, could debut support for the standard only with its "Zen 4" microarchitecture slated for 2021 technology announcements, with 2022 availability.

AMD "Zen 4" will see a transition to a new silicon fabrication process, likely TSMC 5 nm-class. It will be an inflection point for the company from an I/O standpoint, as it sees the introduction of DDR5 memory support across enterprise and desktop platforms, LPDDR5 on the mobile platform, and PCI-Express gen 5.0 across the board. Besides a generational bandwidth doubling, PCIe gen 5.0 is expected to introduce several industry-standard features that help with hyper-scalability in the enterprise segment, benefiting compute clusters with multiple scalar processors, such as AMD's CDNA2. Intel introduced many of these features with its proprietary CXL interconnect. AMD's upcoming "Zen 3" microarchitecture, scheduled for within 2020 with market presence in 2021, is expected to stick with DDR4, LPDDR4x, and PCI-Express gen 4.0 standards. DDR5 will enable data-rates ranging between 3200 to 8400 MHz, densities such as single-rank 32 GB UDIMMs, and a few new physical-layer features such as same-bank refresh.